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+ support for "xor mmreg,mmreg" for initialising global floating point

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regvars

git-svn-id: trunk@29978 -
This commit is contained in:
Jonas Maebe 2015-02-23 22:56:59 +00:00
parent 03f8a15904
commit b40a4d1b5a
1 changed files with 26 additions and 0 deletions
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26
compiler/aarch64/cgcpu.pas
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@ -78,6 +78,8 @@ interface
procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize: tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); override;
procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize: tcgsize; mmreg, intreg: tregister; shuffle: pmmshuffle); override;
procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle); override;
{ comparison operations }
procedure a_cmp_const_reg_label(list: TAsmList; size: tcgsize; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);override;
procedure a_cmp_reg_reg_label(list: TAsmList; size: tcgsize; cmp_op: topcmp; reg1, reg2: tregister; l: tasmlabel);override;
@ -1050,6 +1052,30 @@ implementation
end;
procedure tcgaarch64.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
begin
case op of
{ "xor Vx,Vx" is used to initialize global regvars to 0 }
OP_XOR:
begin
if (src<>dst) or
(reg_cgsize(src)<>size) or
assigned(shuffle) then
internalerror(2015011401);
case size of
OS_F32,
OS_F64:
list.concat(taicpu.op_reg_const(A_MOVI,makeregsize(dst,OS_F64),0));
else
internalerror(2015011402);
end;
end
else
internalerror(2015011403);
end;
end;
procedure tcgaarch64.a_load_reg_ref_unaligned(list: TAsmList; fromsize, tosize: tcgsize; register: tregister; const ref: treference);
var
href: treference;