+ x86: optimziation MovMov2MovMov 2

git-svn-id: trunk@45582 -
This commit is contained in:
florian 2020-06-03 20:29:00 +00:00
parent f5489b5678
commit b776d48367

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@ -2492,8 +2492,8 @@ unit aoptx86;
{$endif i386} {$endif i386}
; ;
end; end;
end; end
(* { movl [mem1],reg1 { movl [mem1],reg1
movl [mem1],reg2 movl [mem1],reg2
to to
@ -2501,16 +2501,18 @@ unit aoptx86;
movl [mem1],reg1 movl [mem1],reg1
movl reg1,reg2 movl reg1,reg2
} }
else if (taicpu(p).oper[0]^.typ = top_ref) and else if MatchOpType(taicpu(p),top_ref,top_reg) and
(taicpu(p).oper[1]^.typ = top_reg) and MatchOpType(taicpu(hp1),top_ref,top_reg) and
(taicpu(hp1).oper[0]^.typ = top_ref) and (taicpu(p).opsize = taicpu(hp1).opsize) and
(taicpu(hp1).oper[1]^.typ = top_reg) and RefsEqual(taicpu(p).oper[0]^.ref^,taicpu(hp1).oper[0]^.ref^) and
(taicpu(p).opsize = taicpu(hp1).opsize) and (taicpu(p).oper[0]^.ref^.volatility=[]) and
RefsEqual(TReference(taicpu(p).oper[0]^^),taicpu(hp1).oper[0]^^.ref^) and (taicpu(hp1).oper[0]^.ref^.volatility=[]) and
(taicpu(p).oper[1]^.reg<>taicpu(hp1).oper[0]^^.ref^.base) and not(SuperRegistersEqual(taicpu(p).oper[1]^.reg,taicpu(hp1).oper[0]^.ref^.base)) and
(taicpu(p).oper[1]^.reg<>taicpu(hp1).oper[0]^^.ref^.index) then not(SuperRegistersEqual(taicpu(p).oper[1]^.reg,taicpu(hp1).oper[0]^.ref^.index)) then
taicpu(hp1).loadReg(0,taicpu(p).oper[1]^.reg) begin
else*) DebugMsg(SPeepholeOptimization + 'MovMov2MovMov 2',p);
taicpu(hp1).loadReg(0,taicpu(p).oper[1]^.reg);
end;
{ movl const1,[mem1] { movl const1,[mem1]
movl [mem1],reg1 movl [mem1],reg1