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* cleaning up tcgsize: it makes no sense to declare every combination and type

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the different vector types must be either handled in the high level cg or
    by using the shuffle parameter

git-svn-id: trunk@43860 -
This commit is contained in:
florian 2020-01-04 21:54:53 +00:00
parent 51c31d1005
commit b7c6e01b03
8 changed files with 52 additions and 260 deletions
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44
compiler/cgbase.pas
View File

@ -191,14 +191,9 @@ interface
OS_S8, OS_S16, OS_S32, OS_S64, OS_S128, OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
{ single, double, extended, comp, float128 } { single, double, extended, comp, float128 }
OS_F32, OS_F64, OS_F80, OS_C64, OS_F128, OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
{ multi-media sizes: split in byte, word, dword, ... } { multi-media sizes, describes only the register size but not how it is split,
{ entities, then the signed counterparts } this information must be passed separately }
OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512, OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128, OS_MS256, OS_MS512,
{ multi-media sizes: single-precision floating-point }
OS_MF32, OS_MF128, OS_MF256, OS_MF512,
{ multi-media sizes: double-precision floating-point }
OS_MD64, OS_MD128, OS_MD256, OS_MD512);
{ Register types } { Register types }
TRegisterType = ( TRegisterType = (
@ -348,12 +343,7 @@ interface
{ floating point values } { floating point values }
4, 8, 10, 8, 16, 4, 8, 10, 8, 16,
{ multimedia values } { multimedia values }
1, 2, 4, 8, 16, 32, 64, 1, 2, 4, 8, 16, 32, 64);
1, 2, 4, 8, 16, 32, 64,
{ single-precision multimedia values }
4, 16, 32, 64,
{ double-precision multimedia values }
8, 16, 32, 64);
tfloat2tcgsize: array[tfloattype] of tcgsize = tfloat2tcgsize: array[tfloattype] of tcgsize =
(OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128); (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
@ -393,10 +383,7 @@ interface
OS_8, OS_16, OS_32, OS_64, OS_128, OS_8, OS_16, OS_32, OS_64, OS_128,
OS_F32, OS_F64, OS_F80, OS_C64, OS_F128, OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512, OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
OS_MF32, OS_MF128,OS_MF256,OS_MF512,
OS_MD64, OS_MD128,OS_MD256,OS_MD512);
tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO, tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
@ -404,10 +391,7 @@ interface
OS_S8, OS_S16, OS_S32, OS_S64, OS_S128, OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
OS_F32, OS_F64, OS_F80, OS_C64, OS_F128, OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128,OS_MS256,OS_MS512, OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256,OS_M512);
OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128,OS_MS256,OS_MS512,
OS_MF32, OS_MF128,OS_MF256,OS_MF512,
OS_MD64, OS_MD128,OS_MD256,OS_MD512);
tcgloc2str : array[TCGLoc] of string[12] = ( tcgloc2str : array[TCGLoc] of string[12] = (
@ -761,13 +745,13 @@ implementation
begin begin
case a of case a of
4: 4:
result := OS_MF32; result := OS_M32;
16: 16:
result := OS_MF128; result := OS_M128;
32: 32:
result := OS_MF256; result := OS_M256;
64: 64:
result := OS_MF512; result := OS_M512;
else else
result := int_cgsize(a); result := int_cgsize(a);
end; end;
@ -777,13 +761,13 @@ implementation
begin begin
case a of case a of
8: 8:
result := OS_MD64; result := OS_M64;
16: 16:
result := OS_MD128; result := OS_M128;
32: 32:
result := OS_MD256; result := OS_M256;
64: 64:
result := OS_MD512; result := OS_M512;
else else
result := int_cgsize(a); result := int_cgsize(a);
end; end;

9
compiler/cgobj.pas
View File

@ -1143,8 +1143,7 @@ implementation
OS_F64, OS_F64,
OS_F128: OS_F128:
a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar); a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
OS_M8..OS_M128, OS_M8..OS_M512:
OS_MS8..OS_MS128:
a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil); a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
else else
internalerror(2010053101); internalerror(2010053101);
@ -1349,8 +1348,7 @@ implementation
OS_F64, OS_F64,
OS_F128: OS_F128:
a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar); a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
OS_M8..OS_M128, OS_M8..OS_M512:
OS_MS8..OS_MS128:
a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil); a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
else else
internalerror(2010053102); internalerror(2010053102);
@ -1406,8 +1404,7 @@ implementation
OS_F64, OS_F64,
OS_F128: OS_F128:
a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar); a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
OS_M8..OS_M128, OS_M8..OS_M512:
OS_MS8..OS_MS128:
a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil); a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
else else
internalerror(2010053102); internalerror(2010053102);

16
compiler/defutil.pas
View File

@ -1569,19 +1569,19 @@ implementation
case TFloatDef(tarraydef(def).elementdef).floattype of case TFloatDef(tarraydef(def).elementdef).floattype of
s32real: s32real:
case def.size of case def.size of
4: result:=OS_MF32; 4: result:=OS_M32;
16: result:=OS_MF128; 16: result:=OS_M128;
32: result:=OS_MF256; 32: result:=OS_M256;
64: result:=OS_MF512; 64: result:=OS_M512;
else else
internalerror(2017121400); internalerror(2017121400);
end; end;
s64real: s64real:
case def.size of case def.size of
8: result:=OS_MD64; 8: result:=OS_M64;
16: result:=OS_MD128; 16: result:=OS_M128;
32: result:=OS_MD256; 32: result:=OS_M256;
64: result:=OS_MD512; 64: result:=OS_M512;
else else
internalerror(2017121401); internalerror(2017121401);
end; end;

3
compiler/hlcgobj.pas
View File

@ -1072,8 +1072,7 @@ implementation
OS_F64, OS_F64,
OS_F128: OS_F128:
a_loadmm_ref_reg(list,location^.def,location^.def,tmpref,location^.register,mms_movescalar); a_loadmm_ref_reg(list,location^.def,location^.def,tmpref,location^.register,mms_movescalar);
OS_M8..OS_M128, OS_M8..OS_M128:
OS_MS8..OS_MS128:
a_loadmm_ref_reg(list,location^.def,location^.def,tmpref,location^.register,nil); a_loadmm_ref_reg(list,location^.def,location^.def,tmpref,location^.register,nil);
else else
internalerror(2010053101); internalerror(2010053101);

5
compiler/m68k/cpubase.pas
View File

@ -339,10 +339,7 @@ unit cpubase;
tcgsize2opsize: Array[tcgsize] of topsize = tcgsize2opsize: Array[tcgsize] of topsize =
(S_NO,S_B,S_W,S_L,S_L,S_NO,S_B,S_W,S_L,S_L,S_NO, (S_NO,S_B,S_W,S_L,S_L,S_NO,S_B,S_W,S_L,S_L,S_NO,
S_FS,S_FD,S_FX,S_NO,S_NO, S_FS,S_FD,S_FX,S_NO,S_NO,
S_NO,S_NO,S_NO,S_NO,S_NO,S_NO, S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,
S_NO,S_NO,S_NO,S_NO,S_NO,
S_NO,S_NO,S_NO,S_NO,S_NO);
function is_calljmp(o:tasmop):boolean; function is_calljmp(o:tasmop):boolean;

223
compiler/x86/cgx86.pas
View File

@ -158,26 +158,17 @@ unit cgx86;
TCGSize2OpSize: Array[tcgsize] of topsize = TCGSize2OpSize: Array[tcgsize] of topsize =
(S_NO,S_B,S_W,S_L,S_Q,S_XMM,S_B,S_W,S_L,S_Q,S_XMM, (S_NO,S_B,S_W,S_L,S_Q,S_XMM,S_B,S_W,S_L,S_Q,S_XMM,
S_FS,S_FL,S_FX,S_IQ,S_FXX, S_FS,S_FL,S_FX,S_IQ,S_FXX,
S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM, S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM);
S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM,S_ZMM,
S_NO,S_XMM,S_YMM,S_ZMM,
S_NO,S_XMM,S_YMM,S_ZMM);
{$elseif defined(i386)} {$elseif defined(i386)}
TCGSize2OpSize: Array[tcgsize] of topsize = TCGSize2OpSize: Array[tcgsize] of topsize =
(S_NO,S_B,S_W,S_L,S_L,S_T,S_B,S_W,S_L,S_L,S_L, (S_NO,S_B,S_W,S_L,S_L,S_T,S_B,S_W,S_L,S_L,S_L,
S_FS,S_FL,S_FX,S_IQ,S_FXX, S_FS,S_FL,S_FX,S_IQ,S_FXX,
S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM, S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM);
S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM,S_ZMM,
S_NO,S_XMM,S_YMM,S_ZMM,
S_NO,S_XMM,S_YMM,S_ZMM);
{$elseif defined(i8086)} {$elseif defined(i8086)}
TCGSize2OpSize: Array[tcgsize] of topsize = TCGSize2OpSize: Array[tcgsize] of topsize =
(S_NO,S_B,S_W,S_W,S_W,S_T,S_B,S_W,S_W,S_W,S_W, (S_NO,S_B,S_W,S_W,S_W,S_T,S_B,S_W,S_W,S_W,S_W,
S_FS,S_FL,S_FX,S_IQ,S_FXX, S_FS,S_FL,S_FX,S_IQ,S_FXX,
S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM, S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,S_ZMM);
S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM,S_ZMM,
S_NO,S_XMM,S_YMM,S_ZMM,
S_NO,S_XMM,S_YMM,S_ZMM);
{$endif} {$endif}
{$ifndef NOTARGETWIN} {$ifndef NOTARGETWIN}
@ -294,17 +285,11 @@ unit cgx86;
OS_M64: OS_M64:
result:=rg[R_MMREGISTER].getregister(list,R_SUBQ); result:=rg[R_MMREGISTER].getregister(list,R_SUBQ);
OS_M128, OS_M128,
OS_F128, OS_F128:
OS_MF128,
OS_MD128:
result:=rg[R_MMREGISTER].getregister(list,R_SUBMMX); { R_SUBMMWHOLE seems a bit dangerous and ambiguous, so changed to R_SUBMMX. [Kit] } result:=rg[R_MMREGISTER].getregister(list,R_SUBMMX); { R_SUBMMWHOLE seems a bit dangerous and ambiguous, so changed to R_SUBMMX. [Kit] }
OS_M256, OS_M256:
OS_MF256,
OS_MD256:
result:=rg[R_MMREGISTER].getregister(list,R_SUBMMY); result:=rg[R_MMREGISTER].getregister(list,R_SUBMMY);
OS_M512, OS_M512:
OS_MF512,
OS_MD512:
result:=rg[R_MMREGISTER].getregister(list,R_SUBMMZ); result:=rg[R_MMREGISTER].getregister(list,R_SUBMMZ);
else else
internalerror(200506041); internalerror(200506041);
@ -1420,14 +1405,12 @@ unit cgx86;
if fromsize=tosize then if fromsize=tosize then
{ needs correct size in case of spilling } { needs correct size in case of spilling }
case fromsize of case fromsize of
OS_F32, OS_F32:
OS_MF128:
if UseAVX then if UseAVX then
instr:=taicpu.op_reg_reg(A_VMOVAPS,S_NO,reg1,reg2) instr:=taicpu.op_reg_reg(A_VMOVAPS,S_NO,reg1,reg2)
else else
instr:=taicpu.op_reg_reg(A_MOVAPS,S_NO,reg1,reg2); instr:=taicpu.op_reg_reg(A_MOVAPS,S_NO,reg1,reg2);
OS_F64, OS_F64:
OS_MD128:
if UseAVX then if UseAVX then
instr:=taicpu.op_reg_reg(A_VMOVAPD,S_NO,reg1,reg2) instr:=taicpu.op_reg_reg(A_VMOVAPD,S_NO,reg1,reg2)
else else
@ -1437,27 +1420,13 @@ unit cgx86;
instr:=taicpu.op_reg_reg(A_VMOVQ,S_NO,reg1,reg2) instr:=taicpu.op_reg_reg(A_VMOVQ,S_NO,reg1,reg2)
else else
instr:=taicpu.op_reg_reg(A_MOVQ,S_NO,reg1,reg2); instr:=taicpu.op_reg_reg(A_MOVQ,S_NO,reg1,reg2);
OS_M128, OS_MS128: OS_M128:
if UseAVX then if UseAVX then
instr:=taicpu.op_reg_reg(A_VMOVDQA,S_NO,reg1,reg2) instr:=taicpu.op_reg_reg(A_VMOVDQA,S_NO,reg1,reg2)
else else
instr:=taicpu.op_reg_reg(A_MOVDQA,S_NO,reg1,reg2); instr:=taicpu.op_reg_reg(A_MOVDQA,S_NO,reg1,reg2);
OS_MF256, OS_M256,
OS_MF512: OS_M512:
if UseAVX then
instr:=taicpu.op_reg_reg(A_VMOVAPS,S_NO,reg1,reg2)
else
{ SSE doesn't support 512-bit vectors }
InternalError(2018012931);
OS_MD256,
OS_MD512:
if UseAVX then
instr:=taicpu.op_reg_reg(A_VMOVAPD,S_NO,reg1,reg2)
else
{ SSE doesn't support 512-bit vectors }
InternalError(2018012932);
OS_M256, OS_MS256,
OS_M512, OS_MS512:
if UseAVX then if UseAVX then
instr:=taicpu.op_reg_reg(A_VMOVDQA,S_NO,reg1,reg2) instr:=taicpu.op_reg_reg(A_VMOVDQA,S_NO,reg1,reg2)
else else
@ -1544,39 +1513,7 @@ unit cgx86;
op := A_VMOVQ op := A_VMOVQ
else else
op := A_MOVQ; op := A_MOVQ;
OS_MF128: OS_M128:
{ Use XMM transfer of packed singles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 16 then
op := A_VMOVAPS
else
op := A_VMOVUPS
end
else
begin
if GetRefAlignment(tmpref) = 16 then
op := A_MOVAPS
else
op := A_MOVUPS
end;
OS_MD128:
{ Use XMM transfer of packed doubles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 16 then
op := A_VMOVAPD
else
op := A_VMOVUPD
end
else
begin
if GetRefAlignment(tmpref) = 16 then
op := A_MOVAPD
else
op := A_MOVUPD
end;
OS_M128, OS_MS128:
{ Use XMM integer transfer } { Use XMM integer transfer }
if UseAVX then if UseAVX then
begin begin
@ -1590,33 +1527,9 @@ unit cgx86;
if GetRefAlignment(tmpref) = 16 then if GetRefAlignment(tmpref) = 16 then
op := A_MOVDQA op := A_MOVDQA
else else
op := A_MOVDQU op := A_MOVDQU;
end; end;
OS_MF256: OS_M256:
{ Use YMM transfer of packed singles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 32 then
op := A_VMOVAPS
else
op := A_VMOVUPS
end
else
{ SSE doesn't support 256-bit vectors }
InternalError(2018012934);
OS_MD256:
{ Use YMM transfer of packed doubles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 32 then
op := A_VMOVAPD
else
op := A_VMOVUPD
end
else
{ SSE doesn't support 256-bit vectors }
InternalError(2018012935);
OS_M256, OS_MS256:
{ Use YMM integer transfer } { Use YMM integer transfer }
if UseAVX then if UseAVX then
begin begin
@ -1627,32 +1540,8 @@ unit cgx86;
end end
else else
{ SSE doesn't support 256-bit vectors } { SSE doesn't support 256-bit vectors }
InternalError(2018012936); Internalerror(2020010401);
OS_MF512: OS_M512:
{ Use ZMM transfer of packed singles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 64 then
op := A_VMOVAPS
else
op := A_VMOVUPS
end
else
{ SSE doesn't support 512-bit vectors }
InternalError(2018012937);
OS_MD512:
{ Use ZMM transfer of packed doubles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 64 then
op := A_VMOVAPD
else
op := A_VMOVUPD
end
else
{ SSE doesn't support 512-bit vectors }
InternalError(2018012938);
OS_M512, OS_MS512:
{ Use ZMM integer transfer } { Use ZMM integer transfer }
if UseAVX then if UseAVX then
begin begin
@ -1718,37 +1607,7 @@ unit cgx86;
op := A_VMOVQ op := A_VMOVQ
else else
op := A_MOVQ; op := A_MOVQ;
OS_MF128: OS_M128:
{ Use XMM transfer of packed singles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 16 then
op := A_VMOVAPS
else
op := A_VMOVUPS
end else
begin
if GetRefAlignment(tmpref) = 16 then
op := A_MOVAPS
else
op := A_MOVUPS
end;
OS_MD128:
{ Use XMM transfer of packed doubles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 16 then
op := A_VMOVAPD
else
op := A_VMOVUPD
end else
begin
if GetRefAlignment(tmpref) = 16 then
op := A_MOVAPD
else
op := A_MOVUPD
end;
OS_M128, OS_MS128:
{ Use XMM integer transfer } { Use XMM integer transfer }
if UseAVX then if UseAVX then
begin begin
@ -1763,29 +1622,7 @@ unit cgx86;
else else
op := A_MOVDQU op := A_MOVDQU
end; end;
OS_MF256: OS_M256:
{ Use XMM transfer of packed singles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 32 then
op := A_VMOVAPS
else
op := A_VMOVUPS
end else
{ SSE doesn't support 256-bit vectors }
InternalError(2018012940);
OS_MD256:
{ Use XMM transfer of packed doubles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 32 then
op := A_VMOVAPD
else
op := A_VMOVUPD
end else
{ SSE doesn't support 256-bit vectors }
InternalError(2018012941);
OS_M256, OS_MS256:
{ Use XMM integer transfer } { Use XMM integer transfer }
if UseAVX then if UseAVX then
begin begin
@ -1796,29 +1633,7 @@ unit cgx86;
end else end else
{ SSE doesn't support 256-bit vectors } { SSE doesn't support 256-bit vectors }
InternalError(2018012942); InternalError(2018012942);
OS_MF512: OS_M512:
{ Use XMM transfer of packed singles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 64 then
op := A_VMOVAPS
else
op := A_VMOVUPS
end else
{ SSE doesn't support 512-bit vectors }
InternalError(2018012943);
OS_MD512:
{ Use XMM transfer of packed doubles }
if UseAVX then
begin
if GetRefAlignment(tmpref) = 64 then
op := A_VMOVAPD
else
op := A_VMOVUPD
end else
{ SSE doesn't support 512-bit vectors }
InternalError(2018012944);
OS_M512, OS_MS512:
{ Use XMM integer transfer } { Use XMM integer transfer }
if UseAVX then if UseAVX then
begin begin

6
compiler/x86/cpubase.pas
View File

@ -463,11 +463,11 @@ implementation
else else
internalerror(2009071902); internalerror(2009071902);
end; end;
OS_M128,OS_MS128,OS_MF128,OS_MD128: OS_M128:
cgsize2subreg:=R_SUBMMX; cgsize2subreg:=R_SUBMMX;
OS_M256,OS_MS256,OS_MF256,OS_MD256: OS_M256:
cgsize2subreg:=R_SUBMMY; cgsize2subreg:=R_SUBMMY;
OS_M512,OS_MS512,OS_MF512,OS_MD512: OS_M512:
cgsize2subreg:=R_SUBMMZ; cgsize2subreg:=R_SUBMMZ;
OS_NO: OS_NO:
{ error message should have been thrown already before, so avoid only { error message should have been thrown already before, so avoid only

6
compiler/x86/rax86.pas
View File

@ -1906,11 +1906,11 @@ begin
asize:=OT_BITS64; asize:=OT_BITS64;
OS_F80 : OS_F80 :
asize:=OT_BITS80; asize:=OT_BITS80;
OS_128,OS_M128,OS_MS128: OS_128,OS_M128:
asize := OT_BITS128; asize := OT_BITS128;
OS_M256,OS_MS256: OS_M256:
asize := OT_BITS256; asize := OT_BITS256;
OS_M512,OS_MS512: OS_M512:
asize := OT_BITS512; asize := OT_BITS512;
else else
; ;