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* ti8086moddivnode.pass_generate_code converted to 16-bit. Note that this code
is still not active, due to the cpuneedsdiv32helper define, but will eventually be enabled for 16-bit divisions. git-svn-id: trunk@26062 -
This commit is contained in:
nickysn
parent
11800f0804
commit
bd083c0b8e
@ -61,7 +61,7 @@ implementation
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ti8086moddivnode
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*****************************************************************************}
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function log2(i : dword) : dword;
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function log2(i : word) : word;
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begin
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result:=0;
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i:=i shr 1;
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@ -79,9 +79,9 @@ implementation
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power:longint;
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hl:Tasmlabel;
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op:Tasmop;
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e : longint;
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d,l,r,s,m,a,n,t : dword;
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m_low,m_high,j,k : qword;
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e : smallint;
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d,l,r,s,m,a,n,t : word;
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m_low,m_high,j,k : dword;
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begin
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secondpass(left);
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if codegenerror then
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@ -90,7 +90,7 @@ implementation
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if codegenerror then
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exit;
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if is_64bitint(resultdef) then
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if is_64bitint(resultdef) or is_32bitint(resultdef) then
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{ should be handled in pass_1 (JM) }
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internalerror(200109052);
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{ put numerator in register }
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@ -107,39 +107,39 @@ implementation
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"Cardinal($ffffffff) div 16" overflows! (JM) }
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if is_signed(left.resultdef) Then
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begin
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if (current_settings.optimizecputype <> cpu_386) and
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if (current_settings.optimizecputype > cpu_386) and
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not(cs_opt_size in current_settings.optimizerswitches) then
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{ use a sequence without jumps, saw this in
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comp.compilers (JM) }
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begin
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{ no jumps, but more operations }
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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emit_reg_reg(A_MOV,S_L,hreg1,hreg2);
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{If the left value is signed, hreg2=$ffffffff, otherwise 0.}
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emit_const_reg(A_SAR,S_L,31,hreg2);
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emit_reg_reg(A_MOV,S_W,hreg1,hreg2);
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{If the left value is signed, hreg2=$ffff, otherwise 0.}
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emit_const_reg(A_SAR,S_W,15,hreg2);
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{If signed, hreg2=right value-1, otherwise 0.}
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emit_const_reg(A_AND,S_L,tordconstnode(right).value.svalue-1,hreg2);
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emit_const_reg(A_AND,S_W,tordconstnode(right).value.svalue-1,hreg2);
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{ add to the left value }
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emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
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emit_reg_reg(A_ADD,S_W,hreg2,hreg1);
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{ do the shift }
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emit_const_reg(A_SAR,S_L,power,hreg1);
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emit_const_reg(A_SAR,S_W,power,hreg1);
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end
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else
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begin
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{ a jump, but less operations }
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emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
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emit_reg_reg(A_TEST,S_W,hreg1,hreg1);
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current_asmdata.getjumplabel(hl);
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NS,hl);
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if power=1 then
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emit_reg(A_INC,S_L,hreg1)
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emit_reg(A_INC,S_W,hreg1)
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else
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emit_const_reg(A_ADD,S_L,tordconstnode(right).value.svalue-1,hreg1);
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emit_const_reg(A_ADD,S_W,tordconstnode(right).value.svalue-1,hreg1);
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cg.a_label(current_asmdata.CurrAsmList,hl);
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emit_const_reg(A_SAR,S_L,power,hreg1);
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emit_const_reg(A_SAR,S_W,power,hreg1);
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end
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end
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else
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emit_const_reg(A_SHR,S_L,power,hreg1);
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emit_const_reg(A_SHR,S_W,power,hreg1);
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location.register:=hreg1;
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end
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else
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@ -148,85 +148,85 @@ implementation
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begin
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e:=tordconstnode(right).value.svalue;
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d:=abs(e);
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{ Determine algorithm (a), multiplier (m), and shift factor (s) for 32-bit
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{ Determine algorithm (a), multiplier (m), and shift factor (s) for 16-bit
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signed integer division. Based on: Granlund, T.; Montgomery, P.L.:
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"Division by Invariant Integers using Multiplication". SIGPLAN Notices,
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Vol. 29, June 1994, page 61.
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}
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l:=log2(d);
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j:=qword($80000000) mod qword(d);
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k:=(qword(1) shl (32+l)) div (qword($80000000-j));
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m_low:=((qword(1)) shl (32+l)) div d;
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m_high:=(((qword(1)) shl (32+l)) + k) div d;
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j:=dword($8000) mod dword(d);
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k:=(dword(1) shl (16+l)) div (dword($8000-j));
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m_low:=((dword(1)) shl (16+l)) div d;
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m_high:=(((dword(1)) shl (16+l)) + k) div d;
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while ((m_low shr 1) < (m_high shr 1)) and (l > 0) do
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begin
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m_low:=m_low shr 1;
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m_high:=m_high shr 1;
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dec(l);
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end;
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m:=dword(m_high);
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m:=word(m_high);
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s:=l;
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if (m_high shr 31)<>0 then
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if (m_high shr 15)<>0 then
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a:=1
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else
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a:=0;
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_const_reg(A_MOV,S_L,aint(m),NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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emit_reg(A_IMUL,S_L,hreg1);
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emit_reg_reg(A_MOV,S_L,hreg1,NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_AX);
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emit_const_reg(A_MOV,S_W,aint(m),NR_AX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_DX);
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emit_reg(A_IMUL,S_W,hreg1);
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emit_reg_reg(A_MOV,S_W,hreg1,NR_AX);
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if a<>0 then
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begin
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emit_reg_reg(A_ADD,S_L,NR_EAX,NR_EDX);
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emit_reg_reg(A_ADD,S_W,NR_AX,NR_DX);
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{
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printf ("; dividend: memory location or register other than EAX or EDX\n");
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printf ("; dividend: memory location or register other than AX or DX\n");
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printf ("\n");
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printf ("MOV EAX, 0%08LXh\n", m);
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printf ("MOV AX, 0%08LXh\n", m);
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printf ("IMUL dividend\n");
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printf ("MOV EAX, dividend\n");
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printf ("ADD EDX, EAX\n");
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if (s) printf ("SAR EDX, %d\n", s);
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printf ("SHR EAX, 31\n");
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printf ("ADD EDX, EAX\n");
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if (e < 0) printf ("NEG EDX\n");
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printf ("MOV AX, dividend\n");
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printf ("ADD DX, AX\n");
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if (s) printf ("SAR DX, %d\n", s);
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printf ("SHR AX, 15\n");
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printf ("ADD DX, AX\n");
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if (e < 0) printf ("NEG DX\n");
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printf ("\n");
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printf ("; quotient now in EDX\n");
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printf ("; quotient now in DX\n");
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}
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end;
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{
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printf ("; dividend: memory location of register other than EAX or EDX\n");
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printf ("; dividend: memory location of register other than AX or DX\n");
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printf ("\n");
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printf ("MOV EAX, 0%08LXh\n", m);
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printf ("MOV AX, 0%08LXh\n", m);
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printf ("IMUL dividend\n");
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printf ("MOV EAX, dividend\n");
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if (s) printf ("SAR EDX, %d\n", s);
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printf ("SHR EAX, 31\n");
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printf ("ADD EDX, EAX\n");
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if (e < 0) printf ("NEG EDX\n");
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printf ("MOV AX, dividend\n");
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if (s) printf ("SAR DX, %d\n", s);
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printf ("SHR AX, 15\n");
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printf ("ADD DX, AX\n");
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if (e < 0) printf ("NEG DX\n");
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printf ("\n");
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printf ("; quotient now in EDX\n");
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printf ("; quotient now in DX\n");
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}
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if s<>0 then
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emit_const_reg(A_SAR,S_L,s,NR_EDX);
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emit_const_reg(A_SHR,S_L,31,NR_EAX);
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emit_reg_reg(A_ADD,S_L,NR_EAX,NR_EDX);
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emit_const_reg(A_SAR,S_W,s,NR_DX);
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emit_const_reg(A_SHR,S_W,15,NR_AX);
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emit_reg_reg(A_ADD,S_W,NR_AX,NR_DX);
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if e<0 then
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emit_reg(A_NEG,S_L,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_reg(A_NEG,S_W,NR_DX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_DX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register)
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,location.register)
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end
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else
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begin
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d:=tordconstnode(right).value.svalue;
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if d>=$80000000 then
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if d>=$8000 then
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begin
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emit_const_reg(A_CMP,S_L,aint(d),hreg1);
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emit_const_reg(A_CMP,S_W,aint(d),hreg1);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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emit_const_reg(A_MOV,S_L,0,location.register);
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emit_const_reg(A_SBB,S_L,-1,location.register);
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emit_const_reg(A_MOV,S_W,0,location.register);
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emit_const_reg(A_SBB,S_W,-1,location.register);
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end
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else
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begin
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@ -243,19 +243,19 @@ implementation
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SIGPLAN Notices, Vol. 29, June 1994, page 61.
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}
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l:=log2(t)+1;
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j:=qword($ffffffff) mod qword(t);
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k:=(qword(1) shl (32+l)) div (qword($ffffffff-j));
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m_low:=((qword(1)) shl (32+l)) div t;
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m_high:=(((qword(1)) shl (32+l)) + k) div t;
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j:=dword($ffff) mod dword(t);
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k:=(dword(1) shl (16+l)) div (dword($ffff-j));
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m_low:=((dword(1)) shl (16+l)) div t;
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m_high:=(((dword(1)) shl (16+l)) + k) div t;
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while ((m_low shr 1) < (m_high shr 1)) and (l>0) do
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begin
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m_low:=m_low shr 1;
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m_high:=m_high shr 1;
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l:=l-1;
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end;
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if (m_high shr 32)=0 then
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if (m_high shr 16)=0 then
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begin
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m:=dword(m_high);
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m:=word(m_high);
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s:=l;
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a:=0;
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end
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@ -267,12 +267,12 @@ implementation
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else
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begin
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s:=log2(t);
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m_low:=(qword(1) shl (32+s)) div qword(t);
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r:=dword(((qword(1)) shl (32+s)) mod qword(t));
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m_low:=(dword(1) shl (16+s)) div dword(t);
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r:=word(((dword(1)) shl (16+s)) mod dword(t));
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if (r < ((t>>1)+1)) then
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m:=dword(m_low)
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m:=word(m_low)
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else
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m:=dword(m_low)+1;
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m:=word(m_low)+1;
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a:=1;
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end;
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{ Reduce multiplier for either algorithm to smallest possible }
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@ -283,72 +283,72 @@ implementation
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end;
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{ Adjust multiplier for reduction of even divisors }
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inc(s,n);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_const_reg(A_MOV,S_L,aint(m),NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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emit_reg(A_MUL,S_L,hreg1);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_AX);
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emit_const_reg(A_MOV,S_W,aint(m),NR_AX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_DX);
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emit_reg(A_MUL,S_W,hreg1);
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if a<>0 then
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begin
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{
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printf ("; dividend: register other than EAX or memory location\n");
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printf ("; dividend: register other than AX or memory location\n");
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printf ("\n");
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printf ("MOV EAX, 0%08lXh\n", m);
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printf ("MOV AX, 0%08lXh\n", m);
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printf ("MUL dividend\n");
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printf ("ADD EAX, 0%08lXh\n", m);
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printf ("ADC EDX, 0\n");
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if (s) printf ("SHR EDX, %d\n", s);
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printf ("ADD AX, 0%08lXh\n", m);
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printf ("ADC DX, 0\n");
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if (s) printf ("SHR DX, %d\n", s);
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printf ("\n");
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printf ("; quotient now in EDX\n");
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printf ("; quotient now in DX\n");
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}
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emit_const_reg(A_ADD,S_L,aint(m),NR_EAX);
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emit_const_reg(A_ADC,S_L,0,NR_EDX);
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emit_const_reg(A_ADD,S_W,aint(m),NR_AX);
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emit_const_reg(A_ADC,S_W,0,NR_DX);
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end;
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if s<>0 then
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emit_const_reg(A_SHR,S_L,aint(s),NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_const_reg(A_SHR,S_W,aint(s),NR_DX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_DX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register)
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,location.register)
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end;
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end
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end
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end
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else
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begin
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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emit_reg_reg(A_MOV,S_L,hreg1,NR_EAX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_AX);
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emit_reg_reg(A_MOV,S_W,hreg1,NR_AX);
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cg.getcpuregister(current_asmdata.CurrAsmList,NR_DX);
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{Sign extension depends on the left type.}
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if torddef(left.resultdef).ordtype=u32bit then
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emit_reg_reg(A_XOR,S_L,NR_EDX,NR_EDX)
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if torddef(left.resultdef).ordtype=u16bit then
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emit_reg_reg(A_XOR,S_W,NR_DX,NR_DX)
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else
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emit_none(A_CDQ,S_NO);
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emit_none(A_CWD,S_NO);
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{Division depends on the right type.}
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if Torddef(right.resultdef).ordtype=u32bit then
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if Torddef(right.resultdef).ordtype=u16bit then
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op:=A_DIV
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else
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op:=A_IDIV;
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if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
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emit_ref(op,S_L,right.location.reference)
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emit_ref(op,S_W,right.location.reference)
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else if right.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
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emit_reg(op,S_L,right.location.register)
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emit_reg(op,S_W,right.location.register)
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else
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begin
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,right.location.size);
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hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u32inttype,right.location,hreg1);
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emit_reg(op,S_L,hreg1);
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hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u16inttype,right.location,hreg1);
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emit_reg(op,S_W,hreg1);
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end;
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{Copy the result into a new register. Release EAX & EDX.}
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
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{Copy the result into a new register. Release AX & DX.}
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_DX);
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cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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if nodetype=divn then
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EAX,location.register)
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register)
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else
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,location.register);
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end;
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end;
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