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+ first work for esp32-c3 support

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This commit is contained in:
florian 2023-01-28 21:28:19 +01:00
parent fc6c3cf487
commit bedd4edc72
5 changed files with 93 additions and 16 deletions
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4
compiler/riscv/agrvgas.pas
View File

@ -233,8 +233,8 @@ unit agrvgas;
const
arch_str: array[boolean,tcputype] of string[10] = (
{$ifdef RISCV32}
('','rv32imac','rv32ima','rv32im','rv32i','rv32e'),
('','rv32imafdc','rv32imafd','rv32imfd','rv32ifd','rv32efd')
('','rv32imac','rv32ima','rv32im','rv32i','rv32e','rv32imc'),
('','rv32imafdc','rv32imafd','rv32imfd','rv32ifd','rv32efd','rv32imcfd')
{$endif RISCV32}
{$ifdef RISCV64}
('','rv64imac','rv64ima','rv64im','rv64i'),

15
compiler/riscv32/cpuinfo.pas
View File

@ -39,7 +39,8 @@ Type
cpu_rv32ima,
cpu_rv32im,
cpu_rv32i,
cpu_rv32e
cpu_rv32e,
cpu_rv32imc
);
tfputype =
@ -79,7 +80,8 @@ Type
ct_ch32v305rb,
ct_ch32v307rc,
ct_ch32v307wc,
ct_ch32V307vc
ct_ch32V307vc,
ct_esp32c3
);
tcontrollerdatatype = record
@ -130,7 +132,8 @@ Const
(controllertypestr:'CH32V305RB'; controllerunitstr:'CH32V307'; cputype:cpu_rv32imac; fputype:fpu_fd; flashbase:$00000000; flashsize:$00020000; srambase:$20000000; sramsize:$00008000),
(controllertypestr:'CH32V307RC'; controllerunitstr:'CH32V307'; cputype:cpu_rv32imac; fputype:fpu_fd; flashbase:$00000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000),
(controllertypestr:'CH32V307WC'; controllerunitstr:'CH32V307'; cputype:cpu_rv32imac; fputype:fpu_fd; flashbase:$00000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000),
(controllertypestr:'CH32V307VC'; controllerunitstr:'CH32V307'; cputype:cpu_rv32imac; fputype:fpu_fd; flashbase:$00000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000)
(controllertypestr:'CH32V307VC'; controllerunitstr:'CH32V307'; cputype:cpu_rv32imac; fputype:fpu_fd; flashbase:$00000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000),
(controllertypestr:'ESP32C3'; controllerunitstr:'ESP32C3'; cputype:cpu_rv32imc; fputype:fpu_none; flashbase:$00000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000)
);
{$POP}
@ -152,7 +155,8 @@ Const
'RV32IMA',
'RV32IM',
'RV32I',
'RV32E'
'RV32E',
'RV32IMC'
);
fputypestr : array[tfputype] of string[8] = (
@ -192,7 +196,8 @@ Const
{ cpu_rv32ima } [CPURV_HAS_MUL,CPURV_HAS_ATOMIC],
{ cpu_rv32im } [CPURV_HAS_MUL],
{ cpu_rv32i } [],
{ cpu_rv32e } [CPURV_HAS_16REGISTERS]
{ cpu_rv32e } [CPURV_HAS_16REGISTERS],
{ cpu_rv32imc } [CPURV_HAS_MUL,CPURV_HAS_COMPACT]
);
Implementation

3
compiler/riscv32/cputarg.pas
View File

@ -40,6 +40,9 @@ implementation
{$endif}
{$ifndef NOTARGETEMBEDDED}
,t_embed
{$ifndef NOTARGETFREERTOS}
,t_freertos
{$endif}
{$endif}
{**************************************

71
compiler/systems/i_freertos.pas
View File

@ -785,7 +785,76 @@ unit i_freertos;
llvmdatalayout : 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S32';
);
implementation
system_riscv32_freertos_info : tsysteminfo =
(
system : system_riscv32_freertos;
name : 'FreeRTOS';
shortname : 'freertos';
flags : [tf_needs_symbol_size,tf_files_case_sensitive,tf_requires_proper_alignment,
tf_smartlink_sections,tf_init_final_units_by_calls];
cpu : cpu_xtensa;
unit_env : '';
extradefines : '';
exeext : '';
defext : '.def';
scriptext : '.sh';
smartext : '.sl';
unitext : '.ppu';
unitlibext : '.ppl';
asmext : '.s';
objext : '.o';
resext : '.res';
resobjext : '.or';
sharedlibext : '.so';
staticlibext : '.a';
staticlibprefix : 'libp';
sharedlibprefix : 'lib';
sharedClibext : '.so';
staticClibext : '.a';
staticClibprefix : 'lib';
sharedClibprefix : 'lib';
importlibprefix : 'libimp';
importlibext : '.a';
Cprefix : '';
newline : #10;
dirsep : '/';
assem : as_gas;
assemextern : as_gas;
link : ld_none;
linkextern : ld_freertos;
ar : ar_gnu_ar;
res : res_none;
dbg : dbg_dwarf2;
script : script_unix;
endian : endian_little;
alignment :
(
procalign : 4;
loopalign : 4;
jumpalign : 0;
jumpalignskipmax : 0;
coalescealign : 0;
coalescealignskipmax: 0;
constalignmin : 0;
constalignmax : 4;
varalignmin : 0;
varalignmax : 4;
localalignmin : 4;
localalignmax : 16;
recordalignmin : 0;
recordalignmax : 8;
maxCrecordalign : 8
);
first_parm_offset : 8;
stacksize : 65536;
stackalign : 16;
abi : abi_xtensa_windowed;
llvmdatalayout : 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S32';
);
implementation
initialization
{$ifdef CPUARM}

16
compiler/systems/t_freertos.pas
View File

@ -1623,17 +1623,17 @@ initialization
{$endif arm}
{$ifdef avr}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_avr_embedded_info);
{$endif avr}
{$ifdef i386}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_i386_embedded_info);
{$endif i386}
{$ifdef x86_64}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_x86_64_embedded_info);
{$endif x86_64}
@ -1646,22 +1646,22 @@ initialization
{$endif i8086}
{$ifdef mipsel}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_mipsel_embedded_info);
{$endif mipsel}
{$ifdef m68k}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_m68k_embedded_info);
{$endif m68k}
{$ifdef riscv32}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterTarget(system_riscv32_embedded_info);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_riscv32_freertos_info);
{$endif riscv32}
{$ifdef riscv64}
RegisterLinker(ld_freertos,TLinkerEmbedded);
RegisterLinker(ld_freertos,TlinkerFreeRTOS);
RegisterTarget(system_riscv64_embedded_info);
{$endif riscv64}