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+ KNI instructions

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This commit is contained in:
peter 1999-08-12 14:36:01 +00:00
parent 631d19fc85
commit bfe185d206
6 changed files with 2095 additions and 374 deletions
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15
compiler/cpuasm.pas
View File

@ -1,6 +1,6 @@
{
$Id$
Copyright (c) 1999 by Florian Klaempfl
Copyright (c) 1999 by Florian Klaempfl and Peter Vreman
Contains the assembler object for the i386
@ -1116,7 +1116,8 @@ begin
201,
202,
209,
210 : ;
210,
217,218,219 : ;
216 :
begin
inc(codes);
@ -1422,8 +1423,11 @@ begin
201,
202,
209,
210 :
210,
217,218,219 :
begin
{ these are dissambler hints or 32 bit prefixes which
are not needed }
end;
31,
48,49,50,
@ -1492,7 +1496,10 @@ end;
end.
{
$Log$
Revision 1.1 1999-08-04 00:22:57 florian
Revision 1.2 1999-08-12 14:36:01 peter
+ KNI instructions
Revision 1.1 1999/08/04 00:22:57 florian
* renamed i386asm and i386base to cpuasm and cpubase
Revision 1.17 1999/08/01 23:55:53 michael

362
compiler/cpubase.pas
View File

@ -1,6 +1,6 @@
{
$Id$
Copyright (c) 1999 by Florian Klaempfl
Copyright (c) 1999 by Florian Klaempfl and Peter Vreman
Contains the base types for the i386
@ -35,8 +35,8 @@ uses
const
{ Size of the instruction table converted by nasmconv.pas }
instabentries = 1103;
maxinfolen = 7;
instabentries = 1292;
maxinfolen = 8;
{ By default we want everything }
{$define ATTOP}
@ -107,6 +107,7 @@ const
OT_REG16 = $00201002;
OT_REG32 = $00201004;
OT_MMXREG = $00201008; { MMX registers }
OT_XMMREG = $00201010; { Katmai registers }
OT_MEMORY = $00204000; { register number in 'basereg' }
OT_MEM8 = $00204001;
OT_MEM16 = $00204002;
@ -144,28 +145,39 @@ const
{ so UNITY == IMMEDIATE | ONENESS }
OT_UNITY = $00802000; { for shift/rotate instructions }
{ Instruction flags }
IF_SM = $0001; { size match first operand }
IF_SM2 = $0002; { size match first two operands }
IF_SB = $0004; { unsized operands can't be non-byte }
IF_SW = $0008; { unsized operands can't be non-word }
IF_SD = $0010; { unsized operands can't be nondword }
IF_8086 = $0000; { 8086 instruction }
IF_186 = $0100; { 186+ instruction }
IF_286 = $0200; { 286+ instruction }
IF_386 = $0300; { 386+ instruction }
IF_486 = $0400; { 486+ instruction }
IF_PENT = $0500; { Pentium instruction }
IF_P6 = $0600; { P6 instruction }
IF_CYRIX = $0800; { Cyrix-specific instruction }
IF_PMASK = $0F00; { the mask for processor types }
IF_PRIV = $1000; { it's a privileged instruction }
IF_UNDOC = $2000; { it's an undocumented instruction }
IF_FPU = $4000; { it's an FPU instruction }
IF_MMX = $8000; { it's an MMX instruction }
{Instruction flags }
IF_SM = $00000001; { size match first two operands }
IF_SM2 = $00000002;
IF_SB = $00000004; { unsized operands can't be non-byte }
IF_SW = $00000008; { unsized operands can't be non-word }
IF_SD = $00000010; { unsized operands can't be nondword }
IF_AR0 = $00000020; { SB, SW, SD applies to argument 0 }
IF_AR1 = $00000040; { SB, SW, SD applies to argument 1 }
IF_AR2 = $00000060; { SB, SW, SD applies to argument 2 }
IF_ARMASK = $00000060; { mask for unsized argument spec }
IF_PRIV = $00000100; { it's a privileged instruction }
IF_SMM = $00000200; { it's only valid in SMM }
IF_PROT = $00000400; { it's protected mode only }
IF_UNDOC = $00001000; { it's an undocumented instruction }
IF_FPU = $00002000; { it's an FPU instruction }
IF_MMX = $00004000; { it's an MMX instruction }
IF_3DNOW = $00008000; { it's a 3DNow! instruction }
IF_SSE = $00010000; { it's a SSE (KNI, MMX2) instruction }
IF_PMASK = $FF000000; { the mask for processor types }
IF_PFMASK = $F001FF00; { the mask for disassembly "prefer" }
IF_8086 = $00000000; { 8086 instruction }
IF_186 = $01000000; { 186+ instruction }
IF_286 = $02000000; { 286+ instruction }
IF_386 = $03000000; { 386+ instruction }
IF_486 = $04000000; { 486+ instruction }
IF_PENT = $05000000; { Pentium instruction }
IF_P6 = $06000000; { P6 instruction }
IF_KATMAI = $07000000; { Katmai instructions }
IF_CYRIX = $10000000; { Cyrix-specific instruction }
IF_AMD = $20000000; { AMD-specific instruction }
{ added flags }
IF_PRE = $10000; { it's a prefix instruction }
IF_PASS2 = $20000; { if the instruction can change in a second pass }
IF_PRE = $40000000; { it's a prefix instruction }
IF_PASS2 = $80000000; { if the instruction can change in a second pass }
type
TAsmOp=(A_None,
@ -196,7 +208,7 @@ type
A_FUCOMI, A_FUCOMIP, A_FUCOMP, A_FUCOMPP, A_FWAIT,A_FXAM, A_FXCH,
A_FXTRACT, A_FYL2X, A_FYL2XP1, A_HLT, A_IBTS, A_ICEBP, A_IDIV,
A_IMUL, A_IN, A_INC, A_INSB, A_INSD, A_INSW, A_INT,
A_INT01, A_INT1, A_INT3, A_INTO, A_INVD, A_INVLPG, A_IRET,
A_INT01, A_INT1, A_INT03, A_INT3, A_INTO, A_INVD, A_INVLPG, A_IRET,
A_IRETD, A_IRETW, A_JCXZ, A_JECXZ, A_JMP, A_LAHF, A_LAR, A_LDS,
A_LEA, A_LEAVE, A_LES, A_LFS, A_LGDT, A_LGS, A_LIDT, A_LLDT,
A_LMSW, A_LOADALL, A_LOADALL286, A_LODSB, A_LODSD, A_LODSW,
@ -220,14 +232,27 @@ type
A_PSUBSIW, A_PSUBSW, A_PSUBUSB, A_PSUBUSW, A_PSUBW, A_PUNPCKHBW,
A_PUNPCKHDQ, A_PUNPCKHWD, A_PUNPCKLBW, A_PUNPCKLDQ, A_PUNPCKLWD,
A_PUSH, A_PUSHA, A_PUSHAD, A_PUSHAW, A_PUSHF, A_PUSHFD,
A_PUSHFW, A_PXOR, A_RCL, A_RCR, A_RDMSR, A_RDPMC, A_RDTSC,
A_PUSHFW, A_PXOR, A_RCL, A_RCR, A_RDSHR, A_RDMSR, A_RDPMC, A_RDTSC,
A_RESB, A_RET, A_RETF, A_RETN,
A_ROL, A_ROR, A_RSM, A_SAHF, A_SAL, A_SALC, A_SAR, A_SBB,
A_ROL, A_ROR, A_RSDC, A_RSLDT, A_RSM, A_SAHF, A_SAL, A_SALC, A_SAR, A_SBB,
A_SCASB, A_SCASD, A_SCASW, A_SGDT, A_SHL, A_SHLD, A_SHR, A_SHRD,
A_SIDT, A_SLDT, A_SMI, A_SMSW, A_STC, A_STD, A_STI, A_STOSB,
A_STOSD, A_STOSW, A_STR, A_SUB, A_TEST, A_UMOV, A_VERR, A_VERW,
A_WAIT, A_WBINVD, A_WRMSR, A_XADD, A_XBTS, A_XCHG, A_XLAT, A_XLATB,
A_XOR, A_CMOVcc, A_Jcc, A_SETcc
A_SIDT, A_SLDT, A_SMI, A_SMINT, A_SMINTOLD, A_SMSW, A_STC, A_STD, A_STI, A_STOSB,
A_STOSD, A_STOSW, A_STR, A_SUB, A_SVDC, A_SVLDT, A_SVTS, A_SYSCALL, A_SYSENTER,
A_SYSEXIT, A_SYSRET, A_TEST, A_UD1, A_UD2, A_UMOV, A_VERR, A_VERW,
A_WAIT, A_WBINVD, A_WRSHR, A_WRMSR, A_XADD, A_XBTS, A_XCHG, A_XLAT, A_XLATB,
A_XOR, A_CMOVcc, A_Jcc, A_SETcc,
A_ADDPS, A_ADDSS, A_ANDNPS, A_ANDPS, A_CMPEQPS, A_CMPEQSS, A_CMPLEPS,
A_CMPLESS, A_CMPLTPS, A_CMPLTSS, A_CMPNEQPS, A_CMPNEQSS, A_CMPNLEPS,
A_CMPNLESS, A_CMPNLTPS, A_CMPNLTSS, A_CMPORDPS, A_CMPORDSS, A_CMPUNORDPS, A_CMPUNORDSS,
A_CMPPS, A_CMPSS, A_COMISS, A_CVTPI2PS, A_CVTPS2PI, A_CVTSI2SS, A_CVTSS2SI,
A_CVTTPS2PI, A_CVTTSS2SI, A_DIVPS, A_DIVSS, A_LDMXCSR, A_MAXPS, A_MAXSS, A_MINPS,
A_MINSS, A_MOVAPS, A_MOVHPS, A_MOVLHPS, A_MOVLPS, A_MOVHLPS, A_MOVMSKPS,
A_MOVNTPS, A_MOVSS, A_MOVUPS, A_MULPS, A_MULSS, A_ORPS, A_RCPPS, A_RCPSS,
A_RSQRTPS, A_RSQRTSS, A_SHUFPS, A_SQRTPS, A_SQRTSS, A_STMXCSR, A_SUBPS, A_SUBSS,
A_UCOMISS, A_UNPCKHPS, A_UNPCKLPS, A_XORPS, A_FXRSTOR, A_FXSAVE, A_PREFETCHNTA,
A_PREFETCHT0, A_PREFETCHT1,A_PREFETCHT2,
A_SFENCE, A_MASKMOVQ, A_MOVNTQ, A_PAVGB, A_PAVGW, A_PEXTRW, A_PINSRW, A_PMAXSW,
A_PMAXUB, A_PMINSW, A_PMINUB, A_PMOVMSKB, A_PMULHUW, A_PSADBW, A_PSHUFW
);
op2strtable=array[tasmop] of string[10];
@ -253,63 +278,74 @@ const
'lock','rep','repe','repne','repnz','repz',
'segcs','seges','segds','segfs','seggs','segss',
{ normal }
'aaa', 'aad', 'aam', 'aas', 'adc', 'add', 'and', 'arpl',
'bound', 'bsf', 'bsr', 'bswap', 'bt', 'btc', 'btr', 'bts',
'call', 'cbw', 'cdq', 'clc', 'cld', 'cli', 'clts', 'cmc', 'cmp',
'cmpsb', 'cmpsd', 'cmpsw', 'cmpxchg', 'cmpxchg486', 'cmpxchg8b',
'cpuid', 'cwd', 'cwde', 'daa', 'das', 'dec', 'div', 'emms',
'enter', 'equ', 'f2xm1', 'fabs',
'fadd', 'faddp', 'fbld', 'fbstp', 'fchs', 'fclex', 'fcmovb',
'fcmovbe', 'fcmove', 'fcmovnb', 'fcmovnbe', 'fcmovne',
'fcmovnu', 'fcmovu', 'fcom', 'fcomi', 'fcomip', 'fcomp',
'fcompp', 'fcos', 'fdecstp', 'fdisi', 'fdiv', 'fdivp', 'fdivr',
'aaa','aad','aam','aas','adc','add','and','arpl',
'bound','bsf','bsr','bswap','bt','btc','btr','bts',
'call','cbw','cdq','clc','cld','cli','clts','cmc','cmp',
'cmpsb','cmpsd','cmpsw','cmpxchg','cmpxchg486','cmpxchg8b',
'cpuid','cwd','cwde','daa','das','dec','div','emms',
'enter','equ','f2xm1','fabs',
'fadd','faddp','fbld','fbstp','fchs','fclex','fcmovb',
'fcmovbe','fcmove','fcmovnb','fcmovnbe','fcmovne',
'fcmovnu','fcmovu','fcom','fcomi','fcomip','fcomp',
'fcompp','fcos','fdecstp','fdisi','fdiv','fdivp','fdivr',
'fdivrp',
'femms',
'feni', 'ffree', 'fiadd', 'ficom', 'ficomp', 'fidiv',
'fidivr', 'fild', 'fimul', 'fincstp', 'finit', 'fist', 'fistp',
'fisub', 'fisubr', 'fld', 'fld1', 'fldcw', 'fldenv', 'fldl2e',
'fldl2t', 'fldlg2', 'fldln2', 'fldpi', 'fldz', 'fmul', 'fmulp',
'fnclex', 'fndisi', 'fneni', 'fninit', 'fnop', 'fnsave',
'fnstcw', 'fnstenv', 'fnstsw', 'fpatan', 'fprem', 'fprem1',
'fptan', 'frndint', 'frstor', 'fsave', 'fscale', 'fsetpm',
'fsin', 'fsincos', 'fsqrt', 'fst', 'fstcw', 'fstenv', 'fstp',
'fstsw', 'fsub', 'fsubp', 'fsubr', 'fsubrp', 'ftst', 'fucom',
'fucomi', 'fucomip', 'fucomp', 'fucompp', 'fwait', 'fxam', 'fxch',
'fxtract', 'fyl2x', 'fyl2xp1', 'hlt', 'ibts', 'icebp', 'idiv',
'imul', 'in', 'inc', 'insb', 'insd', 'insw', 'int',
'int01', 'int1', 'int3', 'into', 'invd', 'invlpg', 'iret',
'iretd', 'iretw', 'jcxz', 'jecxz', 'jmp', 'lahf', 'lar', 'lds',
'lea', 'leave', 'les', 'lfs', 'lgdt', 'lgs', 'lidt', 'lldt',
'lmsw', 'loadall', 'loadall286', 'lodsb', 'lodsd', 'lodsw',
'loop', 'loope', 'loopne', 'loopnz', 'loopz', 'lsl', 'lss',
'ltr', 'mov', 'movd', 'movq', 'movsb', 'movsd', 'movsw',
'movsx', 'movzx', 'mul', 'neg', 'nop', 'not', 'or', 'out',
'outsb', 'outsd', 'outsw', 'packssdw', 'packsswb', 'packuswb',
'paddb', 'paddd', 'paddsb', 'paddsiw', 'paddsw', 'paddusb',
'paddusw', 'paddw', 'pand', 'pandn', 'paveb',
'pavgusb', 'pcmpeqb',
'pcmpeqd', 'pcmpeqw', 'pcmpgtb', 'pcmpgtd', 'pcmpgtw',
'feni','ffree','fiadd','ficom','ficomp','fidiv',
'fidivr','fild','fimul','fincstp','finit','fist','fistp',
'fisub','fisubr','fld','fld1','fldcw','fldenv','fldl2e',
'fldl2t','fldlg2','fldln2','fldpi','fldz','fmul','fmulp',
'fnclex','fndisi','fneni','fninit','fnop','fnsave',
'fnstcw','fnstenv','fnstsw','fpatan','fprem','fprem1',
'fptan','frndint','frstor','fsave','fscale','fsetpm',
'fsin','fsincos','fsqrt','fst','fstcw','fstenv','fstp',
'fstsw','fsub','fsubp','fsubr','fsubrp','ftst','fucom',
'fucomi','fucomip','fucomp','fucompp','fwait','fxam','fxch',
'fxtract','fyl2x','fyl2xp1','hlt','ibts','icebp','idiv',
'imul','in','inc','insb','insd','insw','int',
'int01','int1','int03','int3','into','invd','invlpg','iret',
'iretd','iretw','jcxz','jecxz','jmp','lahf','lar','lds',
'lea','leave','les','lfs','lgdt','lgs','lidt','lldt',
'lmsw','loadall','loadall286','lodsb','lodsd','lodsw',
'loop','loope','loopne','loopnz','loopz','lsl','lss',
'ltr','mov','movd','movq','movsb','movsd','movsw',
'movsx','movzx','mul','neg','nop','not','or','out',
'outsb','outsd','outsw','packssdw','packsswb','packuswb',
'paddb','paddd','paddsb','paddsiw','paddsw','paddusb',
'paddusw','paddw','pand','pandn','paveb',
'pavgusb','pcmpeqb',
'pcmpeqd','pcmpeqw','pcmpgtb','pcmpgtd','pcmpgtw',
'pdistib',
'pf2id', 'pfacc', 'pfadd', 'pfcmpeq', 'pfcmpge', 'pfcmpgt',
'pfmax', 'pfmin', 'pfmul', 'pfrcp', 'pfrcpit1', 'pfrcpit2',
'pfrsqit1', 'pfrsqrt', 'pfsub', 'pfsubr', 'pi2fd',
'pmachriw', 'pmaddwd', 'pmagw', 'pmulhriw', 'pmulhrwa', 'pmulhrwc',
'pmulhw', 'pmullw', 'pmvgezb', 'pmvlzb', 'pmvnzb',
'pmvzb', 'pop', 'popa', 'popad', 'popaw', 'popf', 'popfd',
'popfw', 'por',
'prefetch', 'prefetchw', 'pslld', 'psllq', 'psllw', 'psrad', 'psraw',
'psrld', 'psrlq', 'psrlw', 'psubb', 'psubd', 'psubsb',
'psubsiw', 'psubsw', 'psubusb', 'psubusw', 'psubw', 'punpckhbw',
'punpckhdq', 'punpckhwd', 'punpcklbw', 'punpckldq', 'punpcklwd',
'push', 'pusha', 'pushad', 'pushaw', 'pushf', 'pushfd',
'pushfw', 'pxor', 'rcl', 'rcr', 'rdmsr', 'rdpmc', 'rdtsc',
'resb', 'ret', 'retf', 'retn',
'rol', 'ror', 'rsm', 'sahf', 'sal', 'salc', 'sar', 'sbb',
'scasb', 'scasd', 'scasw', 'sgdt', 'shl', 'shld', 'shr', 'shrd',
'sidt', 'sldt', 'smi', 'smsw', 'stc', 'std', 'sti', 'stosb',
'stosd', 'stosw', 'str', 'sub', 'test', 'umov', 'verr', 'verw',
'wait', 'wbinvd', 'wrmsr', 'xadd', 'xbts', 'xchg', 'xlat', 'xlatb',
'xor','cmov','j','set'
'pf2id','pfacc','pfadd','pfcmpeq','pfcmpge','pfcmpgt',
'pfmax','pfmin','pfmul','pfrcp','pfrcpit1','pfrcpit2',
'pfrsqit1','pfrsqrt','pfsub','pfsubr','pi2fd',
'pmachriw','pmaddwd','pmagw','pmulhriw','pmulhrwa','pmulhrwc',
'pmulhw','pmullw','pmvgezb','pmvlzb','pmvnzb',
'pmvzb','pop','popa','popad','popaw','popf','popfd',
'popfw','por',
'prefetch','prefetchw','pslld','psllq','psllw','psrad','psraw',
'psrld','psrlq','psrlw','psubb','psubd','psubsb',
'psubsiw','psubsw','psubusb','psubusw','psubw','punpckhbw',
'punpckhdq','punpckhwd','punpcklbw','punpckldq','punpcklwd',
'push','pusha','pushad','pushaw','pushf','pushfd',
'pushfw','pxor','rcl','rcr','rdshr','rdmsr','rdpmc','rdtsc',
'resb','ret','retf','retn',
'rol','ror','rsdc','rsldt','rsm','sahf','sal','salc','sar','sbb',
'scasb','scasd','scasw','sgdt','shl','shld','shr','shrd',
'sidt','sldt','smi','smint','smintold','smsw','stc','std','sti','stosb',
'stosd','stosw','str','sub','svdc','svldt','svts','syscall','sysenter',
'sysexit','sysret','test','ud1','ud2','umov','verr','verw',
'wait','wbinvd','wrshr','wrmsr','xadd','xbts','xchg','xlat','xlatb',
'xor','cmov','j','set',
'addps','addss','andnps','andps','cmpeqps','cmpeqss','cmpleps','cmpless','cmpltps',
'cmpltss','cmpneqps','cmpneqss','cmpnleps','cmpnless','cmpnltps','cmpnltss',
'cmpordps','cmpordss','cmpunordps','cmpunordss','cmpps','cmpss','comiss','cvtpi2ps','cvtps2pi',
'cvtsi2ss','cvtss2si','cvttps2pi','cvttss2si','divps','divss','ldmxcsr','maxps',
'maxss','minps','minss','movaps','movhps','movlhps','movlps','movhlps','movmskps',
'movntps','movss','movups','mulps','mulss','orps','rcpps','rcpss','rsqrtps','rsqrtss',
'shufps','sqrtps','sqrtss','stmxcsr','subps','subss','ucomiss','unpckhps','unpcklps',
'xorps','fxrstor','fxsave','prefetchnta','prefetcht0','prefetcht1','prefetcht2',
'sfence','maskmovq','movntq','pavgb','pavgw','pextrw','pinsrw','pmaxsw','pmaxub',
'pminsw','pminub','pmovmskb','pmulhuw','psadbw','pshufw'
);
{$endif INTELOP}
@ -319,62 +355,73 @@ const
'lock','rep','repe','repne','repnz','repz',
'cs','es','ds','fs','gs','ss',
{ normal }
'aaa', 'aad', 'aam', 'aas', 'adc', 'add', 'and', 'arpl',
'bound', 'bsf', 'bsr', 'bswap', 'bt', 'btc', 'btr', 'bts',
'call', 'cbtw', 'cltd', 'clc', 'cld', 'cli', 'clts', 'cmc', 'cmp',
'cmpsb', 'cmpsl', 'cmpsw', 'cmpxchg', 'cmpxchg486', 'cmpxchg8b',
'cpuid', 'cwtd', 'cwtl', 'daa', 'das', 'dec', 'div',
'emms', 'enter', 'equ', 'f2xm1', 'fabs',
'fadd', 'faddp', 'fbld', 'fbstp', 'fchs', 'fclex', 'fcmovb',
'fcmovbe', 'fcmove', 'fcmovnb', 'fcmovnbe', 'fcmovne',
'fcmovnu', 'fcmovu', 'fcom', 'fcomi', 'fcomip', 'fcomp',
'fcompp', 'fcos', 'fdecstp', 'fdisi', 'fdiv', 'fdivp', 'fdivr',
'fdivrp', 'femms',
'feni', 'ffree', 'fiadd', 'ficom', 'ficomp', 'fidiv',
'fidivr', 'fild', 'fimul', 'fincstp', 'finit', 'fist', 'fistp',
'fisub', 'fisubr', 'fld', 'fld1', 'fldcw', 'fldenv', 'fldl2e',
'fldl2t', 'fldlg2', 'fldln2', 'fldpi', 'fldz', 'fmul', 'fmulp',
'fnclex', 'fndisi', 'fneni', 'fninit', 'fnop', 'fnsave',
'fnstcw', 'fnstenv', 'fnstsw', 'fpatan', 'fprem', 'fprem1',
'fptan', 'frndint', 'frstor', 'fsave', 'fscale', 'fsetpm',
'fsin', 'fsincos', 'fsqrt', 'fst', 'fstcw', 'fstenv', 'fstp',
'fstsw', 'fsub', 'fsubp', 'fsubr', 'fsubrp', 'ftst', 'fucom',
'fucomi', 'fucomip', 'fucomp', 'fucompp', 'fwait', 'fxam', 'fxch',
'fxtract', 'fyl2x', 'fyl2xp1', 'hlt', 'ibts', 'icebp', 'idiv',
'imul', 'in', 'inc', 'insb', 'insl', 'insw', 'int',
'int01', 'int1', 'int3', 'into', 'invd', 'invlpg', 'iret',
'iretd', 'iretw', 'jcxz', 'jecxz', 'jmp', 'lahf', 'lar', 'lds',
'lea', 'leave', 'les', 'lfs', 'lgdt', 'lgs', 'lidt', 'lldt',
'lmsw', 'loadall', 'loadall286', 'lodsb', 'lodsl', 'lodsw',
'loop', 'loope', 'loopne', 'loopnz', 'loopz', 'lsl', 'lss',
'ltr', 'mov', 'movd', 'movq', 'movsb', 'movsl', 'movsw',
'movs', 'movz', 'mul', 'neg', 'nop', 'not', 'or', 'out',
'outsb', 'outsl', 'outsw', 'packssd', 'packssw', 'packusw',
'paddb', 'paddd', 'paddsb', 'paddsiw', 'paddsw', 'paddusb',
'paddusw', 'paddw', 'pand', 'pandn', 'paveb',
'pavgusb', 'pcmpeqb',
'pcmpeqd', 'pcmpeqw', 'pcmpgtb', 'pcmpgtd', 'pcmpgtw',
'aaa','aad','aam','aas','adc','add','and','arpl',
'bound','bsf','bsr','bswap','bt','btc','btr','bts',
'call','cbtw','cltd','clc','cld','cli','clts','cmc','cmp',
'cmpsb','cmpsl','cmpsw','cmpxchg','cmpxchg486','cmpxchg8b',
'cpuid','cwtd','cwtl','daa','das','dec','div',
'emms','enter','equ','f2xm1','fabs',
'fadd','faddp','fbld','fbstp','fchs','fclex','fcmovb',
'fcmovbe','fcmove','fcmovnb','fcmovnbe','fcmovne',
'fcmovnu','fcmovu','fcom','fcomi','fcomip','fcomp',
'fcompp','fcos','fdecstp','fdisi','fdiv','fdivp','fdivr',
'fdivrp','femms',
'feni','ffree','fiadd','ficom','ficomp','fidiv',
'fidivr','fild','fimul','fincstp','finit','fist','fistp',
'fisub','fisubr','fld','fld1','fldcw','fldenv','fldl2e',
'fldl2t','fldlg2','fldln2','fldpi','fldz','fmul','fmulp',
'fnclex','fndisi','fneni','fninit','fnop','fnsave',
'fnstcw','fnstenv','fnstsw','fpatan','fprem','fprem1',
'fptan','frndint','frstor','fsave','fscale','fsetpm',
'fsin','fsincos','fsqrt','fst','fstcw','fstenv','fstp',
'fstsw','fsub','fsubp','fsubr','fsubrp','ftst','fucom',
'fucomi','fucomip','fucomp','fucompp','fwait','fxam','fxch',
'fxtract','fyl2x','fyl2xp1','hlt','ibts','icebp','idiv',
'imul','in','inc','insb','insl','insw','int',
'int01','int1','int03','int3','into','invd','invlpg','iret',
'iretd','iretw','jcxz','jecxz','jmp','lahf','lar','lds',
'lea','leave','les','lfs','lgdt','lgs','lidt','lldt',
'lmsw','loadall','loadall286','lodsb','lodsl','lodsw',
'loop','loope','loopne','loopnz','loopz','lsl','lss',
'ltr','mov','movd','movq','movsb','movsl','movsw',
'movs','movz','mul','neg','nop','not','or','out',
'outsb','outsl','outsw','packssd','packssw','packusw',
'paddb','paddd','paddsb','paddsiw','paddsw','paddusb',
'paddusw','paddw','pand','pandn','paveb',
'pavgusb','pcmpeqb',
'pcmpeqd','pcmpeqw','pcmpgtb','pcmpgtd','pcmpgtw',
'pdistib',
'pf2id', 'pfacc', 'pfadd', 'pfcmpeq', 'pfcmpge', 'pfcmpgt',
'pfmax', 'pfmin', 'pfmul', 'pfrcp', 'pfrcpit1', 'pfrcpit2',
'pfrsqit1', 'pfrsqrt', 'pfsub', 'pfsubr', 'pi2fd',
'pmachriw', 'pmaddwd', 'pmagw', 'pmulhriw', 'pmulhrwa', 'pmulhrwc',
'pmulhw', 'pmullw', 'pmvgezb', 'pmvlzb', 'pmvnzb',
'pmvzb', 'pop', 'popa', 'popal', 'popaw', 'popf', 'popfl',
'popfw', 'por',
'prefetch', 'prefetchw', 'pslld', 'psllq', 'psllw', 'psrad', 'psraw',
'psrld', 'psrlq', 'psrlw', 'psubb', 'psubd', 'psubsb',
'psubsiw', 'psubsw', 'psubusb', 'psubusw', 'psubw', 'punpckhbw',
'punpckhdq', 'punpckhwd', 'punpcklbw', 'punpckldq', 'punpcklwd',
'push', 'pusha', 'pushal', 'pushaw', 'pushf', 'pushfl',
'pushfw', 'pxor', 'rcl', 'rcr', 'rdmsr', 'rdpmc', 'rdtsc',
'resb', 'ret', 'retf', 'retn',
'rol', 'ror', 'rsm', 'sahf', 'sal', 'salc', 'sar', 'sbb',
'scasb', 'scasl', 'scasw', 'sgdt', 'shl', 'shld', 'shr', 'shrd',
'sidt', 'sldt', 'smi', 'smsw', 'stc', 'std', 'sti', 'stosb',
'stosl', 'stosw', 'str', 'sub', 'test', 'umov', 'verr', 'verw',
'wait', 'wbinvd', 'wrmsr', 'xadd', 'xbts', 'xchg', 'xlat', 'xlatb',
'xor','cmov','j','set'
'pf2id','pfacc','pfadd','pfcmpeq','pfcmpge','pfcmpgt',
'pfmax','pfmin','pfmul','pfrcp','pfrcpit1','pfrcpit2',
'pfrsqit1','pfrsqrt','pfsub','pfsubr','pi2fd',
'pmachriw','pmaddwd','pmagw','pmulhriw','pmulhrwa','pmulhrwc',
'pmulhw','pmullw','pmvgezb','pmvlzb','pmvnzb',
'pmvzb','pop','popa','popal','popaw','popf','popfl',
'popfw','por',
'prefetch','prefetchw','pslld','psllq','psllw','psrad','psraw',
'psrld','psrlq','psrlw','psubb','psubd','psubsb',
'psubsiw','psubsw','psubusb','psubusw','psubw','punpckhbw',
'punpckhdq','punpckhwd','punpcklbw','punpckldq','punpcklwd',
'push','pusha','pushal','pushaw','pushf','pushfl',
'pushfw','pxor','rcl','rcr','rdshr','rdmsr','rdpmc','rdtsc',
'resb','ret','retf','retn',
'rol','ror','rsdc','rsldt','rsm','sahf','sal','salc','sar','sbb',
'scasb','scasl','scasw','sgdt','shl','shld','shr','shrd',
'sidt','sldt','smi','smint','smintold','smsw','stc','std','sti','stosb',
'stosl','stosw','str','sub','svdc','svldt','svts','syscall','sysenter',
'sysexit','sysret','test','ud1','ud2','umov','verr','verw',
'wait','wbinvd','wrshr','wrmsr','xadd','xbts','xchg','xlat','xlatb',
'xor','cmov','j','set',
'addps','addss','andnps','andps','cmpeqps','cmpeqss','cmpleps','cmpless','cmpltps',
'cmpltss','cmpneqps','cmpneqss','cmpnleps','cmpnless','cmpnltps','cmpnltss',
'cmpordps','cmpordss','cmpunordps','cmpunordss','cmpps','cmpss','comiss','cvtpi2ps','cvtps2pi',
'cvtsi2ss','cvtss2si','cvttps2pi','cvttss2si','divps','divss','ldmxcsr','maxps',
'maxss','minps','minss','movaps','movhps','movlhps','movlps','movhlps','movmskps',
'movntps','movss','movups','mulps','mulss','orps','rcpps','rcpss','rsqrtps','rsqrtss',
'shufps','sqrtps','sqrtss','stmxcsr','subps','subss','ucomiss','unpckhps','unpcklps',
'xorps','fxrstor','fxsave','prefetchnta','prefetcht0','prefetcht1','prefetcht2',
'sfence','maskmovq','movntq','pavgb','pavgw','pextrw','pinsrw','pmaxsw','pmaxub',
'pminsw','pminub','pmovmskb','pmulhuw','psadbw','pshufw'
);
att_nosuffix:array[tasmop] of boolean=(
@ -401,24 +448,34 @@ const
false,false,false,false,false,false,false,false,false,false,
false,false,false,false,false,false,false,false,false,false,
{ 200 }
false,true,true,true,true,true,false,false,false,false,
false,false,false,false,false,false,false,false,false,false,
false,false,true,true,true,true,true,false,false,false,
false,false,false,false,false,false,false,false,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,false,false,
false,false,false,false,false,false,false,false,true,true,
true,true,true,true,true,true,true,true,true,true,
false,false,false,false,false,false,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,
{ 300 }
false,false,true,true,false,true,true,true,false,false,
true,false,false,true,true,false,true,true,true,false,false,
false,false,false,false,false,false,false,false,false,false,
false,false,false,false,false,false,false,false,false,false,
false,false,false,false,false,false,false,false,false,false,
false,false,false,false,false,false,false,false,false,false,
false,false,false,false,false,false,false,false,false,false,
false
false,false,false,false,false,false,false,false,false,false,
false,false,false,false,false,false,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
{ 400 }
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true,
true,true,true,true,true,true,true,true,true,true
);
{$endif ATTOP}
@ -477,9 +534,9 @@ type
const
cond2str:array[TAsmCond] of string[3]=('',
'a', 'ae', 'b', 'be', 'c', 'e', 'g', 'ge', 'l', 'le', 'na', 'nae',
'nb', 'nbe', 'nc', 'ne', 'ng', 'nge', 'nl', 'nle', 'no', 'np',
'ns', 'nz', 'o', 'p', 'pe', 'po', 's', 'z'
'a','ae','b','be','c','e','g','ge','l','le','na','nae',
'nb','nbe','nc','ne','ng','nge','nl','nle','no','np',
'ns','nz','o','p','pe','po','s','z'
);
inverse_cond:array[TAsmCond] of TAsmCond=(C_None,
C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
@ -557,7 +614,7 @@ const
OT_REG_CREG,OT_REG_CREG,OT_REG_CREG,OT_REG_CR4,
OT_REG_TREG,OT_REG_TREG,OT_REG_TREG,OT_REG_TREG,OT_REG_TREG,
OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,
OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG,OT_MMXREG
OT_XMMREG,OT_XMMREG,OT_XMMREG,OT_XMMREG,OT_XMMREG,OT_XMMREG,OT_XMMREG,OT_XMMREG
);
{$ifdef INTELOP}
@ -1007,7 +1064,10 @@ begin
end.
{
$Log$
Revision 1.4 1999-08-07 14:20:58 florian
Revision 1.5 1999-08-12 14:36:02 peter
+ KNI instructions
Revision 1.4 1999/08/07 14:20:58 florian
* some small problems fixed
Revision 1.3 1999/08/05 14:58:09 florian

107
compiler/daopt386.pas
View File

@ -406,6 +406,7 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
{A_INT} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
{A_INT01} (Ch: (C_All, C_None, C_None)), { new }
{A_INT1} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_INT03} (Ch: (C_None, C_None, C_None)),
{A_INT3} (Ch: (C_None, C_None, C_None)),
{A_INTO} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
{A_INVD} (Ch: (C_All, C_None, C_None)), { new }
@ -551,6 +552,7 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
{A_PXOR} (Ch: (C_All, C_None, C_None)), { new }
{A_RCL} (Ch: (C_Mop2, C_Rop1, C_RWFlags)),
{A_RCR} (Ch: (C_Mop2, C_Rop1, C_RWFlags)),
{!!!} {A_RDSHR} (Ch: (C_All, C_None, C_None)), { new }
{A_RDMSR} (Ch: (C_WEAX, C_WEDX, C_None)), { new }
{A_RDPMC} (Ch: (C_WEAX, C_WEDX, C_None)), { new }
{A_RDTSC} (Ch: (C_WEAX, C_WEDX, C_None)), { new }
@ -560,6 +562,8 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
{A_RETN} (Ch: (C_All, C_None, C_None)), { new }
{A_ROL} (Ch: (C_Mop2, C_Rop1, C_RWFlags)),
{A_ROR} (Ch: (C_Mop2, C_Rop1, C_RWFlags)),
{!!!} {A_RSDC} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_RSLDT} (Ch: (C_All, C_None, C_None)), { new }
{A_RSM} (Ch: (C_All, C_None, C_None)), { new }
{A_SAHF} (Ch: (C_WFlags, C_REAX, C_None)),
{A_SAL} (Ch: (C_Mop2, C_Rop1, C_RWFlags)),
@ -577,6 +581,8 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
{A_SIDT} (Ch: (C_Wop1, C_None, C_None)),
{A_SLDT} (Ch: (C_Wop1, C_None, C_None)),
{A_SMI} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SMINT} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SMINTOLD} (Ch: (C_All, C_None, C_None)), { new }
{A_SMSW} (Ch: (C_Wop1, C_None, C_None)),
{A_STC} (Ch: (C_WFlags, C_None, C_None)),
{A_STD} (Ch: (C_SDirFlag, C_None, C_None)),
@ -586,12 +592,22 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
{A_STOSW} (Ch: (C_REAX, C_WMemEDI, C_RWEDI)), { new }
{A_STR} (Ch: (C_Wop1, C_None, C_None)),
{A_SUB} (Ch: (C_Mop2, C_Rop1, C_WFlags)),
{!!!} {A_SVDC} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SVLDT} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SVTS} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SYSCALL} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SYSENTER} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SYSEXIT} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_SYSRET} (Ch: (C_All, C_None, C_None)), { new }
{A_TEST} (Ch: (C_WFlags, C_Rop1, C_Rop2)),
{!!!} {A_UD1} (Ch: (C_All, C_None, C_None)), { new }
{!!!} {A_UD2} (Ch: (C_All, C_None, C_None)), { new }
{A_UMOV} (Ch: (C_All, C_None, C_None)), { new }
{A_VERR} (Ch: (C_WFlags, C_None, C_None)),
{A_VERW} (Ch: (C_WFlags, C_None, C_None)),
{A_WAIT} (Ch: (C_None, C_None, C_None)),
{A_WBINVD} (Ch: (C_None, C_None, C_None)), { new }
{!!!} {A_WRSHR} (Ch: (C_All, C_None, C_None)), { new }
{A_WRMSR} (Ch: (C_All, C_None, C_None)), { new }
{A_XADD} (Ch: (C_All, C_None, C_None)), { new }
{A_XBTS} (Ch: (C_All, C_None, C_None)), { new }
@ -601,7 +617,91 @@ Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
{A_XOR} (Ch: (C_Mop2, C_Rop1, C_WFlags)),
{A_CMOV} (Ch: (C_ROp1, C_WOp2, C_RFLAGS)), { new }
{A_J} (Ch: (C_None, C_None, C_None)), { new }
{A_SET} (Ch: (C_WEAX, C_RFLAGS, C_None)) { new }
{A_SET} (Ch: (C_WEAX, C_RFLAGS, C_None)), { new }
{!!!! From here everything is new !!!!!!!!}
{ADDPS} (Ch: (C_All, C_None, C_None)), { new }
{ADDSS} (Ch: (C_All, C_None, C_None)), { new }
{ANDNPS} (Ch: (C_All, C_None, C_None)), { new }
{ANDPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPEQPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPEQSS} (Ch: (C_All, C_None, C_None)), { new }
{CMPLEPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPLESS} (Ch: (C_All, C_None, C_None)), { new }
{CMPLTPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPLTSS} (Ch: (C_All, C_None, C_None)), { new }
{CMPNEQPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPNEQSS} (Ch: (C_All, C_None, C_None)), { new }
{CMPNLEPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPNLESS} (Ch: (C_All, C_None, C_None)), { new }
{CMPNLTPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPNLTSS} (Ch: (C_All, C_None, C_None)), { new }
{CMPORDPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPORDSS} (Ch: (C_All, C_None, C_None)), { new }
{CMPUNORDPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPUNORDSS} (Ch: (C_All, C_None, C_None)), { new }
{CMPPS} (Ch: (C_All, C_None, C_None)), { new }
{CMPSS} (Ch: (C_All, C_None, C_None)), { new }
{COMISS} (Ch: (C_All, C_None, C_None)), { new }
{CVTPI2PS} (Ch: (C_All, C_None, C_None)), { new }
{CVTPS2PI} (Ch: (C_All, C_None, C_None)), { new }
{CVTSI2SS} (Ch: (C_All, C_None, C_None)), { new }
{CVTSS2SI} (Ch: (C_All, C_None, C_None)), { new }
{CVTTPS2PI} (Ch: (C_All, C_None, C_None)), { new }
{CVTTSS2SI} (Ch: (C_All, C_None, C_None)), { new }
{DIVPS} (Ch: (C_All, C_None, C_None)), { new }
{DIVSS} (Ch: (C_All, C_None, C_None)), { new }
{LDMXCSR} (Ch: (C_All, C_None, C_None)), { new }
{MAXPS} (Ch: (C_All, C_None, C_None)), { new }
{MAXSS} (Ch: (C_All, C_None, C_None)), { new }
{MINPS} (Ch: (C_All, C_None, C_None)), { new }
{MINSS} (Ch: (C_All, C_None, C_None)), { new }
{MOVAPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVHPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVLHPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVLPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVHLPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVMSKPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVNTPS} (Ch: (C_All, C_None, C_None)), { new }
{MOVSS} (Ch: (C_All, C_None, C_None)), { new }
{MOVUPS} (Ch: (C_All, C_None, C_None)), { new }
{MULPS} (Ch: (C_All, C_None, C_None)), { new }
{MULSS} (Ch: (C_All, C_None, C_None)), { new }
{ORPS} (Ch: (C_All, C_None, C_None)), { new }
{RCPPS} (Ch: (C_All, C_None, C_None)), { new }
{RCPSS} (Ch: (C_All, C_None, C_None)), { new }
{RSQRTPS} (Ch: (C_All, C_None, C_None)), { new }
{RSQRTSS} (Ch: (C_All, C_None, C_None)), { new }
{SHUFPS} (Ch: (C_All, C_None, C_None)), { new }
{SQRTPS} (Ch: (C_All, C_None, C_None)), { new }
{SQRTSS} (Ch: (C_All, C_None, C_None)), { new }
{STMXCSR} (Ch: (C_All, C_None, C_None)), { new }
{SUBPS} (Ch: (C_All, C_None, C_None)), { new }
{SUBSS} (Ch: (C_All, C_None, C_None)), { new }
{UCOMISS} (Ch: (C_All, C_None, C_None)), { new }
{UNPCKHPS} (Ch: (C_All, C_None, C_None)), { new }
{UNPCKLPS} (Ch: (C_All, C_None, C_None)), { new }
{XORPS} (Ch: (C_All, C_None, C_None)), { new }
{FXRSTOR} (Ch: (C_All, C_None, C_None)), { new }
{FXSAVE} (Ch: (C_All, C_None, C_None)), { new }
{PREFETCHNTA} (Ch: (C_All, C_None, C_None)), { new }
{PREFETCHT0} (Ch: (C_All, C_None, C_None)), { new }
{PREFETCHT1} (Ch: (C_All, C_None, C_None)), { new }
{PREFETCHT2} (Ch: (C_All, C_None, C_None)), { new }
{SFENCE} (Ch: (C_All, C_None, C_None)), { new }
{MASKMOVQ} (Ch: (C_All, C_None, C_None)), { new }
{MOVNTQ} (Ch: (C_All, C_None, C_None)), { new }
{PAVGB} (Ch: (C_All, C_None, C_None)), { new }
{PAVGW} (Ch: (C_All, C_None, C_None)), { new }
{PEXTRW} (Ch: (C_All, C_None, C_None)), { new }
{PINSRW} (Ch: (C_All, C_None, C_None)), { new }
{PMAXSW} (Ch: (C_All, C_None, C_None)), { new }
{PMAXUB} (Ch: (C_All, C_None, C_None)), { new }
{PMINSW} (Ch: (C_All, C_None, C_None)), { new }
{PMINUB} (Ch: (C_All, C_None, C_None)), { new }
{PMOVMSKB} (Ch: (C_All, C_None, C_None)), { new }
{PMULHUW} (Ch: (C_All, C_None, C_None)), { new }
{PSADBW} (Ch: (C_All, C_None, C_None)), { new }
{PSHUFW} (Ch: (C_All, C_None, C_None)) { new }
);
Var
@ -2237,7 +2337,10 @@ End.
{
$Log$
Revision 1.54 1999-08-05 15:01:52 jonas
Revision 1.55 1999-08-12 14:36:03 peter
+ KNI instructions
Revision 1.54 1999/08/05 15:01:52 jonas
* fix in -darithopt code (sometimes crashed on 8/16bit regs)
Revision 1.53 1999/08/04 00:22:59 florian

1535
compiler/i386tab.inc
View File

File diff suppressed because it is too large Load Diff

416
compiler/insns.dat
View File

@ -87,8 +87,8 @@ AND rm32,imm \321\300\1\x81\204\41 386,SM
AND mem,imm8 \300\1\x80\204\21 8086,SM
AND mem,imm16 \320\300\1\x81\204\31 8086,SM
AND mem,imm32 \321\300\1\x81\204\41 386,SM
ARPL mem,reg16 \300\1\x63\101 286,PRIV,SM
ARPL reg16,reg16 \300\1\x63\101 286,PRIV
ARPL mem,reg16 \300\1\x63\101 286,PROT,SM
ARPL reg16,reg16 \300\1\x63\101 286,PROT
BOUND reg16,mem \320\301\1\x62\110 186
BOUND reg32,mem \321\301\1\x62\110 386
BSF reg16,mem \320\301\2\x0F\xBC\110 386,SM
@ -127,6 +127,12 @@ BTS rm32,imm \321\300\2\x0F\xBA\205\25 386,SB
CALL imm \322\1\xE8\64 8086
CALL imm|near \322\1\xE8\64 8086
CALL imm|far \322\1\x9A\34\37 8086,ND
CALL imm16 \320\1\xE8\64 8086
CALL imm16|near \320\1\xE8\64 8086
CALL imm16|far \320\1\x9A\34\37 8086,ND
CALL imm32 \321\1\xE8\64 8086
CALL imm32|near \321\1\xE8\64 8086
CALL imm32|far \321\1\x9A\34\37 8086,ND
CALL imm:imm \322\1\x9A\35\30 8086
CALL imm16:imm \320\1\x9A\31\30 8086
CALL imm:imm16 \320\1\x9A\31\30 8086
@ -173,9 +179,9 @@ CMP rm32,imm \321\300\1\x81\207\41 386,SM
CMP mem,imm8 \300\1\x80\207\21 8086,SM
CMP mem,imm16 \320\300\1\x81\207\31 8086,SM
CMP mem,imm32 \321\300\1\x81\207\41 386,SM
CMPSB void \1\xA6 8086
CMPSD void \321\1\xA7 386
CMPSW void \320\1\xA7 8086
CMPSB void \332\1\xA6 8086
CMPSD void \332\321\1\xA7 386
CMPSW void \332\320\1\xA7 8086
CMPXCHG mem,reg8 \300\2\x0F\xB0\101 PENT,SM
CMPXCHG reg8,reg8 \300\2\x0F\xB0\101 PENT
CMPXCHG mem,reg16 \320\300\2\x0F\xB1\101 PENT,SM
@ -289,7 +295,7 @@ FDIVR fpu0,fpureg \1\xD8\11\xF8 8086,FPU
FDIVRP void \2\xDE\xF9 8086,FPU
FDIVRP fpureg \1\xDE\10\xF8 8086,FPU
FDIVRP fpureg,fpu0 \1\xDE\10\xF8 8086,FPU
FEMMS void \2\x0F\x0E PENT,MMX,FPU
FEMMS void \2\x0F\x0E PENT,3DNOW
FENI void \3\x9B\xDB\xE0 8086,FPU
FFREE fpureg \1\xDD\10\xC0 8086,FPU
FIADD mem32 \300\1\xDA\200 8086,FPU
@ -420,12 +426,12 @@ FXTRACT void \2\xD9\xF4 8086,FPU
FYL2X void \2\xD9\xF1 8086,FPU
FYL2XP1 void \2\xD9\xF9 8086,FPU
GS void \1\x65 386,PRE
HLT void \1\xF4 8086
HLT void \1\xF4 8086,PRIV
IBTS mem,reg16 \320\300\2\x0F\xA7\101 386,SW,UNDOC,ND
IBTS reg16,reg16 \320\300\2\x0F\xA7\101 386,UNDOC,ND
IBTS mem,reg32 \321\300\2\x0F\xA7\101 386,SD,UNDOC,ND
IBTS reg32,reg32 \321\300\2\x0F\xA7\101 386,UNDOC,ND
ICEBP void \1\xF1 P6,ND
ICEBP void \1\xF1 386,ND
IDIV rm8 \300\1\xF6\207 8086
IDIV rm16 \320\300\1\xF7\207 8086
IDIV rm32 \321\300\1\xF7\207 386
@ -463,12 +469,13 @@ INSB void \1\x6C 186
INSD void \321\1\x6D 386
INSW void \320\1\x6D 186
INT imm \1\xCD\24 8086,SB
INT01 void \1\xF1 P6,ND
INT1 void \1\xF1 P6
INT01 void \1\xF1 386,ND
INT1 void \1\xF1 386
INT03 void \1\xCC 8086,ND
INT3 void \1\xCC 8086
INTO void \1\xCE 8086
INVD void \2\x0F\x08 486
INVLPG mem \300\2\x0F\x01\207 486
INVD void \2\x0F\x08 486,PRIV
INVLPG mem \300\2\x0F\x01\207 486,PRIV
IRET void \322\1\xCF 8086
IRETD void \321\1\xCF 386
IRETW void \320\1\xCF 8086
@ -476,8 +483,14 @@ JCXZ imm \320\1\xE3\50 8086
JECXZ imm \321\1\xE3\50 386
JMP imm|short \1\xEB\50 8086
JMP imm \322\1\xE9\64 8086,PASS2
JMP imm|near \322\1\xE9\64 8086,PASS2
JMP imm|near \322\1\xE9\64 8086,ND,PASS2
JMP imm|far \322\1\xEA\34\37 8086,ND
JMP imm16 \320\1\xE9\64 8086,PASS2
JMP imm16|near \320\1\xE9\64 8086,ND,PASS2
JMP imm16|far \320\1\xEA\34\37 8086,ND,PASS2
JMP imm32 \321\1\xE9\64 8086,PASS2
JMP imm32|near \321\1\xE9\64 8086,ND,PASS2
JMP imm32|far \321\1\xEA\34\37 8086,ND,PASS2
JMP imm:imm \322\1\xEA\35\30 8086
JMP imm16:imm \320\1\xEA\31\30 8086
JMP imm:imm16 \320\1\xEA\31\30 8086
@ -495,10 +508,10 @@ JMP mem \322\300\1\xFF\204 8086
JMP mem16 \320\300\1\xFF\204 8086
JMP mem32 \321\300\1\xFF\204 386
LAHF void \1\x9F 8086
LAR reg16,mem \320\301\2\x0F\x02\110 286,PRIV,SM
LAR reg16,reg16 \320\301\2\x0F\x02\110 286,PRIV
LAR reg32,mem \321\301\2\x0F\x02\110 286,PRIV,SM
LAR reg32,reg32 \321\301\2\x0F\x02\110 286,PRIV
LAR reg16,mem \320\301\2\x0F\x02\110 286,PROT,SM
LAR reg16,reg16 \320\301\2\x0F\x02\110 286,PROT
LAR reg32,mem \321\301\2\x0F\x02\110 286,PROT,SM
LAR reg32,reg32 \321\301\2\x0F\x02\110 286,PROT
LDS reg16,mem \320\301\1\xC5\110 8086
LDS reg32,mem \321\301\1\xC5\110 8086
LEA reg16,mem \320\301\1\x8D\110 8086
@ -513,9 +526,9 @@ LGDT mem \300\2\x0F\x01\202 286,PRIV
LGS reg16,mem \320\301\2\x0F\xB5\110 386
LGS reg32,mem \321\301\2\x0F\xB5\110 386
LIDT mem \300\2\x0F\x01\203 286,PRIV
LLDT mem \300\1\x0F\17\202 286,PRIV
LLDT mem16 \300\1\x0F\17\202 286,PRIV
LLDT reg16 \300\1\x0F\17\202 286,PRIV
LLDT mem \300\1\x0F\17\202 286,PROT,PRIV
LLDT mem16 \300\1\x0F\17\202 286,PROT,PRIV
LLDT reg16 \300\1\x0F\17\202 286,PROT,PRIV
LMSW mem \300\2\x0F\x01\206 286,PRIV
LMSW mem16 \300\2\x0F\x01\206 286,PRIV
LMSW reg16 \300\2\x0F\x01\206 286,PRIV
@ -540,15 +553,15 @@ LOOPNZ imm,reg_ecx \311\1\xE0\50 386
LOOPZ imm \312\1\xE1\50 8086
LOOPZ imm,reg_cx \310\1\xE1\50 8086
LOOPZ imm,reg_ecx \311\1\xE1\50 386
LSL reg16,mem \320\301\2\x0F\x03\110 286,PRIV,SM
LSL reg16,reg16 \320\301\2\x0F\x03\110 286,PRIV
LSL reg32,mem \321\301\2\x0F\x03\110 286,PRIV,SM
LSL reg32,reg32 \321\301\2\x0F\x03\110 286,PRIV
LSL reg16,mem \320\301\2\x0F\x03\110 286,PROT,SM
LSL reg16,reg16 \320\301\2\x0F\x03\110 286,PROT
LSL reg32,mem \321\301\2\x0F\x03\110 286,PROT,SM
LSL reg32,reg32 \321\301\2\x0F\x03\110 286,PROT
LSS reg16,mem \320\301\2\x0F\xB2\110 386
LSS reg32,mem \321\301\2\x0F\xB2\110 386
LTR mem \300\1\x0F\17\203 286,PRIV
LTR mem16 \300\1\x0F\17\203 286,PRIV
LTR reg16 \300\1\x0F\17\203 286,PRIV
LTR mem \300\1\x0F\17\203 286,PROT,PRIV
LTR mem16 \300\1\x0F\17\203 286,PROT,PRIV
LTR reg16 \300\1\x0F\17\203 286,PROT,PRIV
MOV mem,reg_cs \320\300\1\x8C\201 8086,SM
MOV mem,reg_dess \320\300\1\x8C\101 8086,SM
MOV mem,reg_fsgs \320\300\1\x8C\101 386,SM
@ -570,14 +583,14 @@ MOV reg_eax,mem_offs \301\321\1\xA1\35 386,SM
MOV mem_offs,reg_al \300\1\xA2\34 8086,SM
MOV mem_offs,reg_ax \300\320\1\xA3\34 8086,SM
MOV mem_offs,reg_eax \300\321\1\xA3\34 386,SM
MOV reg32,reg_cr4 \2\x0F\x20\204 PENT
MOV reg32,reg_creg \2\x0F\x20\101 386
MOV reg32,reg_dreg \2\x0F\x21\101 386
MOV reg32,reg_treg \2\x0F\x24\101 386
MOV reg_cr4,reg32 \2\x0F\x22\214 PENT
MOV reg_creg,reg32 \2\x0F\x22\110 386
MOV reg_dreg,reg32 \2\x0F\x23\110 386
MOV reg_treg,reg32 \2\x0F\x26\110 386
MOV reg32,reg_cr4 \2\x0F\x20\204 PENT,PRIV
MOV reg32,reg_creg \2\x0F\x20\101 386,PRIV
MOV reg32,reg_dreg \2\x0F\x21\101 386,PRIV
MOV reg32,reg_treg \2\x0F\x24\101 386,PRIV
MOV reg_cr4,reg32 \2\x0F\x22\214 PENT,PRIV
MOV reg_creg,reg32 \2\x0F\x22\110 386,PRIV
MOV reg_dreg,reg32 \2\x0F\x23\110 386,PRIV
MOV reg_treg,reg32 \2\x0F\x26\110 386,PRIV
MOV mem,reg8 \300\1\x88\101 8086,SM
MOV reg8,reg8 \300\1\x88\101 8086
MOV mem,reg16 \320\300\1\x89\101 8086,SM
@ -688,8 +701,8 @@ PANDN mmxreg,mem \301\2\x0F\xDF\110 PENT,MMX,SM
PANDN mmxreg,mmxreg \2\x0F\xDF\110 PENT,MMX
PAVEB mmxreg,mem \301\2\x0F\x50\110 PENT,MMX,SM,CYRIX
PAVEB mmxreg,mmxreg \2\x0F\x50\110 PENT,MMX,CYRIX
PAVGUSB mmxreg,mem \301\2\x0F\x0F\110\01\xBF PENT,MMX,SM,FPU
PAVGUSB mmxreg,mmxreg \2\x0F\x0F\110\01\xBF PENT,MMX,FPU
PAVGUSB mmxreg,mem \301\2\x0F\x0F\110\01\xBF PENT,3DNOW,SM
PAVGUSB mmxreg,mmxreg \2\x0F\x0F\110\01\xBF PENT,3DNOW
PCMPEQB mmxreg,mem \301\2\x0F\x74\110 PENT,MMX,SM
PCMPEQB mmxreg,mmxreg \2\x0F\x74\110 PENT,MMX
PCMPEQD mmxreg,mem \301\2\x0F\x76\110 PENT,MMX,SM
@ -703,40 +716,40 @@ PCMPGTD mmxreg,mmxreg \2\x0F\x66\110 PENT,MMX
PCMPGTW mmxreg,mem \301\2\x0F\x65\110 PENT,MMX,SM
PCMPGTW mmxreg,mmxreg \2\x0F\x65\110 PENT,MMX
PDISTIB mmxreg,mem \301\2\x0F\x54\110 PENT,MMX,SM,CYRIX
PF2ID mmxreg,mem \301\2\x0F\x0F\110\01\x1D PENT,MMX,SM,FPU
PF2ID mmxreg,mmxreg \2\x0F\x0F\110\01\x1D PENT,MMX,FPU
PFACC mmxreg,mem \301\2\x0F\x0F\110\01\xAE PENT,MMX,SM,FPU
PFACC mmxreg,mmxreg \2\x0F\x0F\110\01\xAE PENT,MMX,FPU
PFADD mmxreg,mem \301\2\x0F\x0F\110\01\x9E PENT,MMX,SM,FPU
PFADD mmxreg,mmxreg \2\x0F\x0F\110\01\x9E PENT,MMX,FPU
PFCMPEQ mmxreg,mem \301\2\x0F\x0F\110\01\xB0 PENT,MMX,SM,FPU
PFCMPEQ mmxreg,mmxreg \2\x0F\x0F\110\01\xB0 PENT,MMX,FPU
PFCMPGE mmxreg,mem \301\2\x0F\x0F\110\01\x90 PENT,MMX,SM,FPU
PFCMPGE mmxreg,mmxreg \2\x0F\x0F\110\01\x90 PENT,MMX,FPU
PFCMPGT mmxreg,mem \301\2\x0F\x0F\110\01\xA0 PENT,MMX,SM,FPU
PFCMPGT mmxreg,mmxreg \2\x0F\x0F\110\01\xA0 PENT,MMX,FPU
PFMAX mmxreg,mem \301\2\x0F\x0F\110\01\xA4 PENT,MMX,SM,FPU
PFMAX mmxreg,mmxreg \2\x0F\x0F\110\01\xA4 PENT,MMX,FPU
PFMIN mmxreg,mem \301\2\x0F\x0F\110\01\x94 PENT,MMX,SM,FPU
PFMIN mmxreg,mmxreg \2\x0F\x0F\110\01\x94 PENT,MMX,FPU
PFMUL mmxreg,mem \301\2\x0F\x0F\110\01\xB4 PENT,MMX,SM,FPU
PFMUL mmxreg,mmxreg \2\x0F\x0F\110\01\xB4 PENT,MMX,FPU
PFRCP mmxreg,mem \301\2\x0F\x0F\110\01\x96 PENT,MMX,SM,FPU
PFRCP mmxreg,mmxreg \2\x0F\x0F\110\01\x96 PENT,MMX,FPU
PFRCPIT1 mmxreg,mem \301\2\x0F\x0F\110\01\xA6 PENT,MMX,SM,FPU
PFRCPIT1 mmxreg,mmxreg \2\x0F\x0F\110\01\xA6 PENT,MMX,FPU
PFRCPIT2 mmxreg,mem \301\2\x0F\x0F\110\01\xB6 PENT,MMX,SM,FPU
PFRCPIT2 mmxreg,mmxreg \2\x0F\x0F\110\01\xB6 PENT,MMX,FPU
PFRSQIT1 mmxreg,mem \301\2\x0F\x0F\110\01\xA7 PENT,MMX,SM,FPU
PFRSQIT1 mmxreg,mmxreg \2\x0F\x0F\110\01\xA7 PENT,MMX,FPU
PFRSQRT mmxreg,mem \301\2\x0F\x0F\110\01\x97 PENT,MMX,SM,FPU
PFRSQRT mmxreg,mmxreg \2\x0F\x0F\110\01\x97 PENT,MMX,FPU
PFSUB mmxreg,mem \301\2\x0F\x0F\110\01\x9A PENT,MMX,SM,FPU
PFSUB mmxreg,mmxreg \2\x0F\x0F\110\01\x9A PENT,MMX,FPU
PFSUBR mmxreg,mem \301\2\x0F\x0F\110\01\xAA PENT,MMX,SM,FPU
PFSUBR mmxreg,mmxreg \2\x0F\x0F\110\01\xAA PENT,MMX,FPU
PI2FD mmxreg,mem \301\2\x0F\x0F\110\01\x0D PENT,MMX,SM,FPU
PI2FD mmxreg,mmxreg \2\x0F\x0F\110\01\x0D PENT,MMX,FPU
PF2ID mmxreg,mem \301\2\x0F\x0F\110\01\x1D PENT,3DNOW,SM
PF2ID mmxreg,mmxreg \2\x0F\x0F\110\01\x1D PENT,3DNOW
PFACC mmxreg,mem \301\2\x0F\x0F\110\01\xAE PENT,3DNOW,SM
PFACC mmxreg,mmxreg \2\x0F\x0F\110\01\xAE PENT,3DNOW
PFADD mmxreg,mem \301\2\x0F\x0F\110\01\x9E PENT,3DNOW,SM
PFADD mmxreg,mmxreg \2\x0F\x0F\110\01\x9E PENT,3DNOW
PFCMPEQ mmxreg,mem \301\2\x0F\x0F\110\01\xB0 PENT,3DNOW,SM
PFCMPEQ mmxreg,mmxreg \2\x0F\x0F\110\01\xB0 PENT,3DNOW
PFCMPGE mmxreg,mem \301\2\x0F\x0F\110\01\x90 PENT,3DNOW,SM
PFCMPGE mmxreg,mmxreg \2\x0F\x0F\110\01\x90 PENT,3DNOW
PFCMPGT mmxreg,mem \301\2\x0F\x0F\110\01\xA0 PENT,3DNOW,SM
PFCMPGT mmxreg,mmxreg \2\x0F\x0F\110\01\xA0 PENT,3DNOW
PFMAX mmxreg,mem \301\2\x0F\x0F\110\01\xA4 PENT,3DNOW,SM
PFMAX mmxreg,mmxreg \2\x0F\x0F\110\01\xA4 PENT,3DNOW
PFMIN mmxreg,mem \301\2\x0F\x0F\110\01\x94 PENT,3DNOW,SM
PFMIN mmxreg,mmxreg \2\x0F\x0F\110\01\x94 PENT,3DNOW
PFMUL mmxreg,mem \301\2\x0F\x0F\110\01\xB4 PENT,3DNOW,SM
PFMUL mmxreg,mmxreg \2\x0F\x0F\110\01\xB4 PENT,3DNOW
PFRCP mmxreg,mem \301\2\x0F\x0F\110\01\x96 PENT,3DNOW,SM
PFRCP mmxreg,mmxreg \2\x0F\x0F\110\01\x96 PENT,3DNOW
PFRCPIT1 mmxreg,mem \301\2\x0F\x0F\110\01\xA6 PENT,3DNOW,SM
PFRCPIT1 mmxreg,mmxreg \2\x0F\x0F\110\01\xA6 PENT,3DNOW
PFRCPIT2 mmxreg,mem \301\2\x0F\x0F\110\01\xB6 PENT,3DNOW,SM
PFRCPIT2 mmxreg,mmxreg \2\x0F\x0F\110\01\xB6 PENT,3DNOW
PFRSQIT1 mmxreg,mem \301\2\x0F\x0F\110\01\xA7 PENT,3DNOW,SM
PFRSQIT1 mmxreg,mmxreg \2\x0F\x0F\110\01\xA7 PENT,3DNOW
PFRSQRT mmxreg,mem \301\2\x0F\x0F\110\01\x97 PENT,3DNOW,SM
PFRSQRT mmxreg,mmxreg \2\x0F\x0F\110\01\x97 PENT,3DNOW
PFSUB mmxreg,mem \301\2\x0F\x0F\110\01\x9A PENT,3DNOW,SM
PFSUB mmxreg,mmxreg \2\x0F\x0F\110\01\x9A PENT,3DNOW
PFSUBR mmxreg,mem \301\2\x0F\x0F\110\01\xAA PENT,3DNOW,SM
PFSUBR mmxreg,mmxreg \2\x0F\x0F\110\01\xAA PENT,3DNOW
PI2FD mmxreg,mem \301\2\x0F\x0F\110\01\x0D PENT,3DNOW,SM
PI2FD mmxreg,mmxreg \2\x0F\x0F\110\01\x0D PENT,3DNOW
PMACHRIW mmxreg,mem \301\2\x0F\x5E\110 PENT,MMX,SM,CYRIX
PMADDWD mmxreg,mem \301\2\x0F\xF5\110 PENT,MMX,SM
PMADDWD mmxreg,mmxreg \2\x0F\xF5\110 PENT,MMX
@ -744,8 +757,8 @@ PMAGW mmxreg,mem \301\2\x0F\x52\110 PENT,MMX,SM,CYRIX
PMAGW mmxreg,mmxreg \2\x0F\x52\110 PENT,MMX,CYRIX
PMULHRIW mmxreg,mem \301\2\x0F\x5D\110 PENT,MMX,SM,CYRIX
PMULHRIW mmxreg,mmxreg \2\x0F\x5D\110 PENT,MMX,CYRIX
PMULHRWA mmxreg,mem \301\2\x0F\x0F\110\1\xB7 PENT,MMX,SM,FPU
PMULHRWA mmxreg,mmxreg \2\x0F\x0F\110\1\xB7 PENT,MMX,FPU
PMULHRWA mmxreg,mem \301\2\x0F\x0F\110\1\xB7 PENT,3DNOW,SM
PMULHRWA mmxreg,mmxreg \2\x0F\x0F\110\1\xB7 PENT,3DNOW
PMULHRWC mmxreg,mem \301\2\x0F\x59\110 PENT,MMX,SM,CYRIX
PMULHRWC mmxreg,mmxreg \2\x0F\x59\110 PENT,MMX,CYRIX
PMULHW mmxreg,mem \301\2\x0F\xE5\110 PENT,MMX,SM
@ -771,8 +784,8 @@ POPFD void \321\1\x9D 386
POPFW void \320\1\x9D 186
POR mmxreg,mem \301\2\x0F\xEB\110 PENT,MMX,SM
POR mmxreg,mmxreg \2\x0F\xEB\110 PENT,MMX
PREFETCH mem \2\x0F\x0D\200 PENT,MMX,SM,FPU
PREFETCHW mem \2\x0F\x0D\201 PENT,MMX,SM,FPU
PREFETCH mem \2\x0F\x0D\200 PENT,3DNOW,SM
PREFETCHW mem \2\x0F\x0D\201 PENT,3DNOW,SM
PSLLD mmxreg,mem \301\2\x0F\xF2\110 PENT,MMX,SM
PSLLD mmxreg,mmxreg \2\x0F\xF2\110 PENT,MMX
PSLLD mmxreg,imm \2\x0F\x72\206\25 PENT,MMX
@ -860,7 +873,8 @@ RCR rm16,imm \320\300\1\xC1\203\25 186,SB
RCR rm32,unity \321\300\1\xD1\203 386
RCR rm32,reg_cl \321\300\1\xD3\203 386
RCR rm32,imm \321\300\1\xC1\203\25 386,SB
RDMSR void \2\x0F\x32 PENT
RDSHR void \2\x0F\x36 P6,CYRIX,SMM
RDMSR void \2\x0F\x32 PENT,PRIV
RDPMC void \2\x0F\x33 P6
RDTSC void \2\x0F\x31 PENT
REP void \1\xF3 8086,PRE
@ -893,7 +907,9 @@ ROR rm16,imm \320\300\1\xC1\201\25 186,SB
ROR rm32,unity \321\300\1\xD1\201 386
ROR rm32,reg_cl \321\300\1\xD3\201 386
ROR rm32,imm \321\300\1\xC1\201\25 386,SB
RSM void \2\x0F\xAA PENT
RSDC reg_sreg,mem80 \301\2\x0F\x79\101 486,CYRIX,SMM
RSLDT mem80 \300\2\x0F\x7B\200 486,CYRIX,SMM
RSM void \2\x0F\xAA PENT,SMM
SAHF void \1\x9E 8086
SAL rm8,unity \300\1\xD0\204 8086,ND
SAL rm8,reg_cl \300\1\xD2\204 8086,ND
@ -937,10 +953,10 @@ SBB rm32,imm \321\300\1\x81\203\41 386,SM
SBB mem,imm8 \300\1\x80\203\21 8086,SM
SBB mem,imm16 \320\300\1\x81\203\31 8086,SM
SBB mem,imm32 \321\300\1\x81\203\41 386,SM
SCASB void \1\xAE 8086
SCASD void \321\1\xAF 386
SCASW void \320\1\xAF 8086
SGDT mem \300\2\x0F\x01\200 286,PRIV
SCASB void \332\1\xAE 8086
SCASD void \332\321\1\xAF 386
SCASW void \332\320\1\xAF 8086
SGDT mem \300\2\x0F\x01\200 286
SHL rm8,unity \300\1\xD0\204 8086
SHL rm8,reg_cl \300\1\xD2\204 8086
SHL rm8,imm \300\1\xC0\204\25 186,SB
@ -950,10 +966,10 @@ SHL rm16,imm \320\300\1\xC1\204\25 186,SB
SHL rm32,unity \321\300\1\xD1\204 386
SHL rm32,reg_cl \321\300\1\xD3\204 386
SHL rm32,imm \321\300\1\xC1\204\25 386,SB
SHLD mem,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2
SHLD reg16,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2
SHLD mem,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2
SHLD reg32,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2
SHLD mem,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD reg16,reg16,imm \300\320\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD mem,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD reg32,reg32,imm \300\321\2\x0F\xA4\101\26 386,SM2,SB,AR2
SHLD mem,reg16,reg_cl \300\320\2\x0F\xA5\101 386,SM
SHLD reg16,reg16,reg_cl \300\320\2\x0F\xA5\101 386
SHLD mem,reg32,reg_cl \300\321\2\x0F\xA5\101 386,SM
@ -967,22 +983,25 @@ SHR rm16,imm \320\300\1\xC1\205\25 186,SB
SHR rm32,unity \321\300\1\xD1\205 386
SHR rm32,reg_cl \321\300\1\xD3\205 386
SHR rm32,imm \321\300\1\xC1\205\25 386,SB
SHRD mem,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2
SHRD reg16,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2
SHRD mem,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2
SHRD reg32,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2
SHRD mem,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD reg16,reg16,imm \300\320\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD mem,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD reg32,reg32,imm \300\321\2\x0F\xAC\101\26 386,SM2,SB,AR2
SHRD mem,reg16,reg_cl \300\320\2\x0F\xAD\101 386,SM
SHRD reg16,reg16,reg_cl \300\320\2\x0F\xAD\101 386
SHRD mem,reg32,reg_cl \300\321\2\x0F\xAD\101 386,SM
SHRD reg32,reg32,reg_cl \300\321\2\x0F\xAD\101 386
SIDT mem \300\2\x0F\x01\201 286,PRIV
SLDT mem \300\1\x0F\17\200 286,PRIV
SLDT mem16 \300\1\x0F\17\200 286,PRIV
SLDT reg16 \300\1\x0F\17\200 286,PRIV
SIDT mem \300\2\x0F\x01\201 286
SLDT mem \300\1\x0F\17\200 286
SLDT mem16 \300\1\x0F\17\200 286
SLDT reg16 \300\1\x0F\17\200 286
SMI void \1\xF1 386,UNDOC
SMSW mem \300\2\x0F\x01\204 286,PRIV
SMSW mem16 \300\2\x0F\x01\204 286,PRIV
SMSW reg16 \300\2\x0F\x01\204 286,PRIV
SMINT void \2\x0F\x38 P6,CYRIX
; Older Cyrix chips had this; they had to move due to conflict with MMX
SMINTOLD void \2\x0F\x7E 486,CYRIX,ND
SMSW mem \300\2\x0F\x01\204 286
SMSW mem16 \300\2\x0F\x01\204 286
SMSW reg16 \300\2\x0F\x01\204 286
SS void \1\x36 8086,PRE
STC void \1\xF9 8086
STD void \1\xFD 8086
@ -990,9 +1009,9 @@ STI void \1\xFB 8086
STOSB void \1\xAA 8086
STOSD void \321\1\xAB 386
STOSW void \320\1\xAB 8086
STR mem \300\1\x0F\17\201 286,PRIV
STR mem16 \300\1\x0F\17\201 286,PRIV
STR reg16 \300\1\x0F\17\201 286,PRIV
STR mem \300\1\x0F\17\201 286,PROT
STR mem16 \300\1\x0F\17\201 286,PROT
STR reg16 \300\1\x0F\17\201 286,PROT
SUB mem,reg8 \300\1\x28\101 8086,SM
SUB reg8,reg8 \300\1\x28\101 8086
SUB mem,reg16 \320\300\1\x29\101 8086,SM
@ -1016,6 +1035,13 @@ SUB rm32,imm \321\300\1\x81\205\41 386,SM
SUB mem,imm8 \300\1\x80\205\21 8086,SM
SUB mem,imm16 \320\300\1\x81\205\31 8086,SM
SUB mem,imm32 \321\300\1\x81\205\41 386,SM
SVDC mem80,reg_sreg \300\2\x0F\x78\101 486,CYRIX,SMM
SVLDT mem80 \300\2\x0F\x7A\200 486,CYRIX,SMM
SVTS mem80 \300\2\x0F\x7C\200 486,CYRIX,SMM
SYSCALL void \2\x0F\x05 P6,AMD
SYSENTER void \2\x0F\x34 P6
SYSEXIT void \2\x0F\x36 P6,PRIV
SYSRET void \2\x0F\x07 P6,PRIV,AMD
TEST mem,reg8 \300\1\x84\101 8086,SM
TEST reg8,reg8 \300\1\x84\101 8086
TEST mem,reg16 \320\300\1\x85\101 8086,SM
@ -1034,6 +1060,8 @@ TEST rm32,imm \321\300\1\xF7\200\41 386,SM
TEST mem,imm8 \300\1\xF6\200\21 8086,SM
TEST mem,imm16 \320\300\1\xF7\200\31 8086,SM
TEST mem,imm32 \321\300\1\xF7\200\41 386,SM
UD1 void \2\x0F\xB9 286,UNDOC
UD2 void \2\x0F\x0B 286
UMOV mem,reg8 \300\2\x0F\x10\101 386,UNDOC,SM
UMOV reg8,reg8 \300\2\x0F\x10\101 386,UNDOC
UMOV mem,reg16 \320\300\2\x0F\x11\101 386,UNDOC,SM
@ -1046,15 +1074,16 @@ UMOV reg16,mem \320\301\2\x0F\x13\110 386,UNDOC,SM
UMOV reg16,reg16 \320\301\2\x0F\x13\110 386,UNDOC
UMOV reg32,mem \321\301\2\x0F\x13\110 386,UNDOC,SM
UMOV reg32,reg32 \321\301\2\x0F\x13\110 386,UNDOC
VERR mem \300\1\x0F\17\204 286,PRIV
VERR mem16 \300\1\x0F\17\204 286,PRIV
VERR reg16 \300\1\x0F\17\204 286,PRIV
VERW mem \300\1\x0F\17\205 286,PRIV
VERW mem16 \300\1\x0F\17\205 286,PRIV
VERW reg16 \300\1\x0F\17\205 286,PRIV
VERR mem \300\1\x0F\17\204 286,PROT
VERR mem16 \300\1\x0F\17\204 286,PROT
VERR reg16 \300\1\x0F\17\204 286,PROT
VERW mem \300\1\x0F\17\205 286,PROT
VERW mem16 \300\1\x0F\17\205 286,PROT
VERW reg16 \300\1\x0F\17\205 286,PROT
WAIT void \1\x9B 8086
WBINVD void \2\x0F\x09 486
WRMSR void \2\x0F\x30 PENT
WBINVD void \2\x0F\x09 486,PRIV
WRSHR void \2\x0F\x37 P6,CYRIX,SMM
WRMSR void \2\x0F\x30 PENT,PRIV
XADD mem,reg8 \300\2\x0F\xC0\101 486,SM
XADD reg8,reg8 \300\2\x0F\xC0\101 486
XADD mem,reg16 \320\300\2\x0F\xC1\101 486,SM
@ -1111,7 +1140,178 @@ CMOVcc reg16,reg16 \320\301\1\x0F\330\x40\110 P6
CMOVcc reg32,mem \321\301\1\x0F\330\x40\110 P6,SM
CMOVcc reg32,reg32 \321\301\1\x0F\330\x40\110 P6
Jcc imm|near \322\1\x0F\330\x80\64 386,PASS2
Jcc imm16|near \320\1\x0F\330\x80\64 386,PASS2
Jcc imm32|near \321\1\x0F\330\x80\64 386,PASS2
Jcc imm \330\x70\50 8086
Jcc imm|short \330\x70\50 8086
Jcc imm|short \330\x70\50 8086,ND
SETcc mem \300\1\x0F\330\x90\200 386,SB
SETcc reg8 \300\1\x0F\330\x90\200 386
; Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
ADDPS xmmreg,mem \301\331\2\x0F\x58\110 KATMAI,SSE
ADDPS xmmreg,xmmreg \331\2\x0F\x58\110 KATMAI,SSE
ADDSS xmmreg,mem \301\333\2\x0F\x58\110 KATMAI,SSE
ADDSS xmmreg,xmmreg \333\2\x0F\x58\110 KATMAI,SSE
ANDNPS xmmreg,mem \301\2\x0F\x55\110 KATMAI,SSE
ANDNPS xmmreg,xmmreg \2\x0F\x55\110 KATMAI,SSE
ANDPS xmmreg,mem \301\2\x0F\x54\110 KATMAI,SSE
ANDPS xmmreg,xmmreg \2\x0F\x54\110 KATMAI,SSE
CMPEQPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x00 KATMAI,SSE
CMPEQPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x00 KATMAI,SSE
CMPEQSS xmmreg,mem \301\333\2\x0F\xC2\110\1\x00 KATMAI,SSE
CMPEQSS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x00 KATMAI,SSE
CMPLEPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x02 KATMAI,SSE
CMPLEPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x02 KATMAI,SSE
CMPLESS xmmreg,mem \301\333\2\x0F\xC2\110\1\x02 KATMAI,SSE
CMPLESS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x02 KATMAI,SSE
CMPLTPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x01 KATMAI,SSE
CMPLTPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x01 KATMAI,SSE
CMPLTSS xmmreg,mem \301\333\2\x0F\xC2\110\1\x01 KATMAI,SSE
CMPLTSS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x01 KATMAI,SSE
CMPNEQPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x04 KATMAI,SSE
CMPNEQPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x04 KATMAI,SSE
CMPNEQSS xmmreg,mem \301\333\2\x0F\xC2\110\1\x04 KATMAI,SSE
CMPNEQSS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x04 KATMAI,SSE
CMPNLEPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x06 KATMAI,SSE
CMPNLEPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x06 KATMAI,SSE
CMPNLESS xmmreg,mem \301\333\2\x0F\xC2\110\1\x06 KATMAI,SSE
CMPNLESS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x06 KATMAI,SSE
CMPNLTPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x05 KATMAI,SSE
CMPNLTPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x05 KATMAI,SSE
CMPNLTSS xmmreg,mem \301\333\2\x0F\xC2\110\1\x05 KATMAI,SSE
CMPNLTSS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x05 KATMAI,SSE
CMPORDPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x07 KATMAI,SSE
CMPORDPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x07 KATMAI,SSE
CMPORDSS xmmreg,mem \301\333\2\x0F\xC2\110\1\x07 KATMAI,SSE
CMPORDSS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x07 KATMAI,SSE
CMPUNORDPS xmmreg,mem \301\331\2\x0F\xC2\110\1\x03 KATMAI,SSE
CMPUNORDPS xmmreg,xmmreg \331\2\x0F\xC2\110\1\x03 KATMAI,SSE
CMPUNORDSS xmmreg,mem \301\333\2\x0F\xC2\110\1\x03 KATMAI,SSE
CMPUNORDSS xmmreg,xmmreg \333\2\x0F\xC2\110\1\x03 KATMAI,SSE
; CMPPS/CMPSS must come after the specific ops; that way the disassembler will find the
; specific ops first and only disassemble illegal ones as cmpps.
CMPPS xmmreg,mem,imm \301\331\2\x0F\xC2\110\22 KATMAI,SSE,SB,AR2
CMPPS xmmreg,xmmreg,imm \331\2\x0F\xC2\110\22 KATMAI,SSE,SB,AR2
CMPSS xmmreg,mem,imm \301\333\2\x0F\xC2\110\22 KATMAI,SSE,SB,AR2
CMPSS xmmreg,xmmreg,imm \333\2\x0F\xC2\110\22 KATMAI,SSE,SB,AR2
COMISS xmmreg,mem \301\2\x0F\x2F\110 KATMAI,SSE
COMISS xmmreg,xmmreg \2\x0F\x2F\110 KATMAI,SSE
CVTPI2PS xmmreg,mem \301\331\2\x0F\x2A\110 KATMAI,SSE,MMX
CVTPI2PS xmmreg,mmxreg \331\2\x0F\x2A\110 KATMAI,SSE,MMX
CVTPS2PI mmxreg,mem \301\331\2\x0F\x2D\110 KATMAI,SSE,MMX
CVTPS2PI mmxreg,xmmreg \331\2\x0F\x2D\110 KATMAI,SSE,MMX
CVTSI2SS xmmreg,mem \301\333\2\x0F\x2A\110 KATMAI,SSE,SD,AR1
CVTSI2SS xmmreg,reg32 \333\2\x0F\x2A\110 KATMAI,SSE
CVTSS2SI reg32,mem \301\333\2\x0F\x2D\110 KATMAI,SSE
CVTSS2SI reg32,xmmreg \333\2\x0F\x2D\110 KATMAI,SSE
CVTTPS2PI mmxreg,mem \301\331\2\x0F\x2C\110 KATMAI,SSE,MMX
CVTTPS2PI mmxreg,xmmreg \331\2\x0F\x2C\110 KATMAI,SSE,MMX
CVTTSS2SI reg32,mem \301\333\2\x0F\x2C\110 KATMAI,SSE
CVTTSS2SI reg32,xmmreg \333\2\x0F\x2C\110 KATMAI,SSE
DIVPS xmmreg,mem \301\331\2\x0F\x5E\110 KATMAI,SSE
DIVPS xmmreg,xmmreg \331\2\x0F\x5E\110 KATMAI,SSE
DIVSS xmmreg,mem \301\333\2\x0F\x5E\110 KATMAI,SSE
DIVSS xmmreg,xmmreg \333\2\x0F\x5E\110 KATMAI,SSE
LDMXCSR mem \300\2\x0F\xAE\202 KATMAI,SSE,SD
MAXPS xmmreg,mem \301\331\2\x0F\x5F\110 KATMAI,SSE
MAXPS xmmreg,xmmreg \331\2\x0F\x5F\110 KATMAI,SSE
MAXSS xmmreg,mem \301\333\2\x0F\x5F\110 KATMAI,SSE
MAXSS xmmreg,xmmreg \333\2\x0F\x5F\110 KATMAI,SSE
MINPS xmmreg,mem \301\331\2\x0F\x5D\110 KATMAI,SSE
MINPS xmmreg,xmmreg \331\2\x0F\x5D\110 KATMAI,SSE
MINSS xmmreg,mem \301\333\2\x0F\x5D\110 KATMAI,SSE
MINSS xmmreg,xmmreg \333\2\x0F\x5D\110 KATMAI,SSE
MOVAPS xmmreg,mem \301\2\x0F\x28\110 KATMAI,SSE
MOVAPS mem,xmmreg \300\2\x0F\x29\101 KATMAI,SSE
MOVAPS xmmreg,xmmreg \2\x0F\x28\110 KATMAI,SSE
MOVAPS xmmreg,xmmreg \2\x0F\x29\101 KATMAI,SSE
MOVHPS xmmreg,mem \301\2\x0F\x16\110 KATMAI,SSE
MOVHPS mem,xmmreg \300\2\x0F\x17\101 KATMAI,SSE
MOVHPS xmmreg,xmmreg \2\x0F\x16\101 KATMAI,SSE,ND
MOVLHPS xmmreg,xmmreg \2\x0F\x16\110 KATMAI,SSE
MOVLPS xmmreg,mem \301\2\x0F\x12\110 KATMAI,SSE
MOVLPS mem,xmmreg \300\2\x0F\x13\101 KATMAI,SSE
MOVLPS xmmreg,xmmreg \2\x0F\x12\101 KATMAI,SSE,ND
MOVHLPS xmmreg,xmmreg \2\x0F\x12\110 KATMAI,SSE
MOVMSKPS reg32,xmmreg \2\x0F\x50\110 KATMAI,SSE
MOVNTPS mem,xmmreg \2\x0F\x2B\101 KATMAI,SSE
MOVSS xmmreg,mem \301\333\2\x0F\x10\110 KATMAI,SSE
MOVSS mem,xmmreg \300\333\2\x0F\x11\101 KATMAI,SSE
MOVSS xmmreg,xmmreg \333\2\x0F\x10\110 KATMAI,SSE
MOVSS xmmreg,xmmreg \333\2\x0F\x11\101 KATMAI,SSE
MOVUPS xmmreg,mem \301\331\2\x0F\x10\110 KATMAI,SSE
MOVUPS mem,xmmreg \300\331\2\x0F\x11\101 KATMAI,SSE
MOVUPS xmmreg,xmmreg \331\2\x0F\x10\110 KATMAI,SSE
MOVUPS xmmreg,xmmreg \331\2\x0F\x11\101 KATMAI,SSE
MULPS xmmreg,mem \301\2\x0F\x59\110 KATMAI,SSE
MULPS xmmreg,xmmreg \2\x0F\x59\110 KATMAI,SSE
MULSS xmmreg,mem \301\333\2\x0F\x59\110 KATMAI,SSE
MULSS xmmreg,xmmreg \333\2\x0F\x59\110 KATMAI,SSE
ORPS xmmreg,mem \301\2\x0F\x56\110 KATMAI,SSE
ORPS xmmreg,xmmreg \2\x0F\x56\110 KATMAI,SSE
RCPPS xmmreg,mem \301\331\2\x0F\x53\110 KATMAI,SSE
RCPPS xmmreg,xmmreg \331\2\x0F\x53\110 KATMAI,SSE
RCPSS xmmreg,mem \301\333\2\x0F\x53\110 KATMAI,SSE
RCPSS xmmreg,xmmreg \333\2\x0F\x53\110 KATMAI,SSE
RSQRTPS xmmreg,mem \301\331\2\x0F\x52\110 KATMAI,SSE
RSQRTPS xmmreg,xmmreg \331\2\x0F\x52\110 KATMAI,SSE
RSQRTSS xmmreg,mem \301\333\2\x0F\x52\110 KATMAI,SSE
RSQRTSS xmmreg,xmmreg \333\2\x0F\x52\110 KATMAI,SSE
SHUFPS xmmreg,mem,imm \301\2\x0F\xC6\110\22 KATMAI,SSE,SB,AR2
SHUFPS xmmreg,xmmreg,imm \2\x0F\xC6\110\22 KATMAI,SSE,SB,AR2
SQRTPS xmmreg,mem \301\331\2\x0F\x51\110 KATMAI,SSE
SQRTPS xmmreg,xmmreg \331\2\x0F\x51\110 KATMAI,SSE
SQRTSS xmmreg,mem \301\333\2\x0F\x51\110 KATMAI,SSE
SQRTSS xmmreg,xmmreg \333\2\x0F\x51\110 KATMAI,SSE
STMXCSR mem \300\2\x0F\xAE\203 KATMAI,SSE,SD
SUBPS xmmreg,mem \301\331\2\x0F\x5C\110 KATMAI,SSE
SUBPS xmmreg,xmmreg \331\2\x0F\x5C\110 KATMAI,SSE
SUBSS xmmreg,mem \301\333\2\x0F\x5C\110 KATMAI,SSE
SUBSS xmmreg,xmmreg \333\2\x0F\x5C\110 KATMAI,SSE
UCOMISS xmmreg,mem \301\2\x0F\x2E\110 KATMAI,SSE
UCOMISS xmmreg,xmmreg \2\x0F\x2E\110 KATMAI,SSE
UNPCKHPS xmmreg,mem \301\2\x0F\x15\110 KATMAI,SSE
UNPCKHPS xmmreg,xmmreg \2\x0F\x15\110 KATMAI,SSE
UNPCKLPS xmmreg,mem \301\2\x0F\x14\110 KATMAI,SSE
UNPCKLPS xmmreg,xmmreg \2\x0F\x14\110 KATMAI,SSE
XORPS xmmreg,mem \301\2\x0F\x57\110 KATMAI,SSE
XORPS xmmreg,xmmreg \2\x0F\x57\110 KATMAI,SSE
; Introduced in Dechutes but necessary for SSE support
FXRSTOR mem \300\2\x0F\xAE\201 P6,SSE,FPU
FXSAVE mem \300\2\x0F\xAE\200 P6,SSE,FPU
; These instructions aren't SSE-specific; they are generic memory operations
; and work even if CR4.OSFXFR == 0
PREFETCHNTA mem \300\2\x0F\x18\200 KATMAI
PREFETCHT0 mem \300\2\x0F\x18\201 KATMAI
PREFETCHT1 mem \300\2\x0F\x18\202 KATMAI
PREFETCHT2 mem \300\2\x0F\x18\203 KATMAI
SFENCE void \3\x0F\xAE\xF8 KATMAI
; New MMX instructions introduced in Katmai
MASKMOVQ mmxreg,mmxreg \2\x0F\xF7\110 KATMAI,MMX
MOVNTQ mem,mmxreg \2\x0F\xE7\101 KATMAI,MMX,SM
PAVGB mmxreg,mmxreg \2\x0F\xE0\110 KATMAI,MMX
PAVGB mmxreg,mem \301\2\x0F\xE0\110 KATMAI,MMX,SM
PAVGW mmxreg,mmxreg \2\x0F\xE3\110 KATMAI,MMX
PAVGW mmxreg,mem \301\2\x0F\xE3\110 KATMAI,MMX,SM
PEXTRW reg32,mmxreg,imm \2\x0F\xC5\110\22 KATMAI,MMX,SB,AR2
; PINSRW is documented as using a reg32, but it's really using only 16 bit
; -- accept either, but be truthful in disassembly
PINSRW mmxreg,reg16,imm \2\x0F\xC4\110\22 KATMAI,MMX,SB,AR2
PINSRW mmxreg,reg32,imm \2\x0F\xC4\110\22 KATMAI,MMX,SB,AR2,ND
PINSRW mmxreg,mem,imm \301\2\x0F\xC4\110\22 KATMAI,MMX,SB,AR2
PINSRW mmxreg,mem16,imm \301\2\x0F\xC4\110\22 KATMAI,MMX,SB,AR2,ND
PMAXSW mmxreg,mmxreg \2\x0F\xEE\110 KATMAI,MMX
PMAXSW mmxreg,mem \301\2\x0F\xEE\110 KATMAI,MMX,SM
PMAXUB mmxreg,mmxreg \2\x0F\xDE\110 KATMAI,MMX
PMAXUB mmxreg,mem \301\2\x0F\xDE\110 KATMAI,MMX,SM
PMINSW mmxreg,mmxreg \2\x0F\xEA\110 KATMAI,MMX
PMINSW mmxreg,mem \301\2\x0F\xEA\110 KATMAI,MMX,SM
PMINUB mmxreg,mmxreg \2\x0F\xDA\110 KATMAI,MMX
PMINUB mmxreg,mem \301\2\x0F\xDA\110 KATMAI,MMX,SM
PMOVMSKB reg32,mmxreg \2\x0F\xD7\110 KATMAI,MMX
PMULHUW mmxreg,mmxreg \2\x0F\xE4\110 KATMAI,MMX
PMULHUW mmxreg,mem \301\2\x0F\xE4\110 KATMAI,MMX,SM
PSADBW mmxreg,mmxreg \2\x0F\xF6\110 KATMAI,MMX
PSADBW mmxreg,mem \301\2\x0F\xF6\110 KATMAI,MMX,SM
PSHUFW mmxreg,mmxreg,imm \2\x0F\x70\110\22 KATMAI,MMX,SB,AR2
PSHUFW mmxreg,mem,imm \301\2\x0F\x70\110\22 KATMAI,MMX,SM2,SB,AR2

34
compiler/utils/nasmconv.pp
View File

@ -20,6 +20,28 @@ var
s : string;
i : longint;
{$ifndef FPC}
procedure readln(var t:text;var s:string);
var
c : char;
i : longint;
begin
c:=#0;
i:=0;
while (not eof(t)) and (c<>#10) do
begin
read(t,c);
if c<>#10 then
begin
inc(i);
s[i]:=c;
end;
end;
if (i>0) and (s[i]=#13) then
dec(i);
s[0]:=chr(i);
end;
{$endif}
function Replace(var s:string;const s1,s2:string):boolean;
var
@ -167,8 +189,9 @@ var
flags : string;
optypes : array[1..3] of string;
begin
writeln('Nasm Instruction Table Converter Version 0.99.11');
writeln('Nasm Instruction Table Converter Version 0.99.13');
insns:=0;
maxinfolen:=0;
assign(infile,'insns.dat');
reset(infile);
assign(outfile,'i386tab.inc');
@ -179,7 +202,9 @@ begin
begin
{ handle comment }
readln(infile,s);
if s[1]=';' then
while (s[1]=' ') do
delete(s,1,1);
if (s='') or (s[1]=';') then
continue;
{ clear }
opcode:='';
@ -294,7 +319,10 @@ begin
end.
{
$Log$
Revision 1.2 1999-05-23 18:42:24 florian
Revision 1.3 1999-08-12 14:36:09 peter
+ KNI instructions
Revision 1.2 1999/05/23 18:42:24 florian
* better error recovering in typed constants
* some problems with arrays of const fixed, some problems
due my previous