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Merge branch 'cmp-jne-mov' into 'main'
[x86] Deterministic MOV optimisations See merge request freepascal.org/fpc/source!596
This commit is contained in:
J. Gareth "Kit" Moreton
commit
c16c2ecd33
@ -3115,9 +3115,7 @@ unit aoptx86;
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var
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hp1, hp2, hp3, hp4: tai;
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DoOptimisation, TempBool: Boolean;
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{$ifdef x86_64}
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NewConst: TCGInt;
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{$endif x86_64}
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procedure convert_mov_value(signed_movop: tasmop; max_value: tcgint); inline;
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begin
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@ -3217,12 +3215,13 @@ unit aoptx86;
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var
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GetNextInstruction_p, TempRegUsed, CrossJump: Boolean;
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PreMessage, RegName1, RegName2, InputVal, MaskNum: string;
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NewSize: topsize; NewOffset: asizeint;
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NewSize: topsize; NewOffset: TCGInt;
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p_SourceReg, p_TargetReg, NewMMReg: TRegister;
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SourceRef, TargetRef: TReference;
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MovAligned, MovUnaligned: TAsmOp;
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ThisRef: TReference;
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JumpTracking: TLinkedList;
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X: Integer;
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begin
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Result:=false;
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@ -5149,6 +5148,71 @@ unit aoptx86;
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Exit;
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end;
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if (taicpu(p).opsize = S_B) and
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(taicpu(p).oper[0]^.typ = top_const) and
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{ Make sure it doesn't affect the comparison instruction }
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not MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^) and
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not MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^) and
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(
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(taicpu(p).oper[1]^.typ <> top_reg) or
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not RegInInstruction(taicpu(p).oper[1]^.reg, hp1)
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) and
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{ Test the value to see if it's 0 or 1 now to delay the expensive
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GetNextInstruction calls for as long as possible }
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(taicpu(p).oper[0]^.val in [0, 1]) and
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GetNextInstruction(hp1, hp2) and
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MatchInstruction(hp2, A_Jcc, []) and
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GetNextInstruction(hp2, hp3) and
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MatchInstruction(hp3, A_MOV, A_OR, [S_B]) and
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(taicpu(hp3).oper[0]^.typ = top_const) and
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(
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(
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(taicpu(p).oper[0]^.val = 0) and
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(taicpu(hp3).oper[0]^.val = 1)
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) or
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(
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(taicpu(hp3).opcode = A_MOV) and
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(taicpu(p).oper[0]^.val = 1) and
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(taicpu(hp3).oper[0]^.val = 0)
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)
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) and
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MatchOperand(taicpu(hp3).oper[1]^, taicpu(p).oper[1]^) and
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GetNextInstruction(hp3, hp4) and (hp4.typ = ait_label) and
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(GetLabelWithSym(TAsmLabel(JumpTargetOp(taicpu(hp2))^.ref^.symbol)) = hp4) then
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begin
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{
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Change:
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movb 0,reg/ref
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cmpb $1,45(%rcx)
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j(c) .Lbl
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movb 1,reg/ref
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.Lbl:
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To:
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cmpb $1,45(%rcx)
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set(~c) reg/ref (or set(c) if 0 and 1 are switched around)
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}
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taicpu(hp3).opcode := A_SETcc;
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taicpu(hp3).loadoper(0, taicpu(hp3).oper[1]^);
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taicpu(hp3).ops := 1;
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if (taicpu(p).oper[0]^.val = 0) then
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begin
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taicpu(hp3).condition := inverse_cond(taicpu(hp2).condition);
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DebugMsg(SPeepholeOptimization + 'Mov0J(c)Mov1LbL -> Set(~c)',p);
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end
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else
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begin
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taicpu(hp3).condition := taicpu(hp2).condition;
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DebugMsg(SPeepholeOptimization + 'Mov1J(c)Mov1LbL -> Set(c)',p);
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end;
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tai_label(hp4).labsym.decrefs;
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RemoveInstruction(hp2);
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RemoveCurrentP(p, hp1);
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Result := True;
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Exit;
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end;
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if DoMovCmpMemOpt(p, hp1) then
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begin
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Result := True;
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@ -5536,6 +5600,359 @@ unit aoptx86;
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Result := True;
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Exit;
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end;
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{ Arithmetic shortcutting optimisations }
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if MatchOpType(taicpu(p), top_const, top_reg) then
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begin
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hp2 := p;
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CrossJump := False;
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while GetNextInstructionUsingReg(hp2, hp1, p_TargetReg) and
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(hp1.typ = ait_instruction) and
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(
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is_calljmp(taicpu(hp1).opcode) or
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RegReadByInstruction(p_TargetReg, hp1)
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) do
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegsBetween(TmpUsedRegs, p, hp1);
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{ mov x,%reg
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...
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op with a ref that contains %reg
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Remove %reg if possible and add to offset
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}
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for X := 0 to taicpu(hp1).ops - 1 do
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if taicpu(hp1).oper[X]^.typ = top_ref then
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begin
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NewOffset := taicpu(hp1).oper[X]^.ref^.offset; { Initialise }
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if (taicpu(hp1).opcode = A_LEA) or
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(
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{ We can't have a reference that becomes completely
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empty (save for an offset) should the register get
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stripped out }
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((taicpu(hp1).oper[X]^.ref^.base <> NR_NO) and (taicpu(hp1).oper[X]^.ref^.index <> NR_NO)) or
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Assigned(taicpu(hp1).oper[X]^.ref^.symbol) or
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Assigned(taicpu(hp1).oper[X]^.ref^.relsymbol)
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) then
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begin
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TempRegUsed := False; { Reusing the variable to detect if a change was made }
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{ We can only make this optimisation if both base and
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index are set or a symbol is used }
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if (taicpu(hp1).oper[X]^.ref^.index = p_TargetReg) then
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begin
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Inc(NewOffset, TCGInt(taicpu(p).oper[0]^.val) * max(taicpu(hp1).oper[X]^.ref^.scalefactor, 1));
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if (NewOffset >= -2147483648) and (NewOffset <= $7FFFFFFF) then
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begin
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taicpu(hp1).oper[X]^.ref^.index := NR_NO;
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taicpu(hp1).oper[X]^.ref^.offset := NewOffset;
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taicpu(hp1).oper[X]^.ref^.scalefactor := 0;
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TempRegUsed := True;
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end;
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end;
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if (taicpu(hp1).oper[X]^.ref^.base = p_TargetReg) and
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(
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(taicpu(hp1).opcode = A_LEA) or
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(taicpu(hp1).oper[X]^.ref^.index <> p_TargetReg)
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) then
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begin
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Inc(NewOffset, taicpu(p).oper[0]^.val);
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if (NewOffset >= -2147483648) and (NewOffset <= $7FFFFFFF) then
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begin
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taicpu(hp1).oper[X]^.ref^.base := NR_NO;
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taicpu(hp1).oper[X]^.ref^.offset := NewOffset;
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TempRegUsed := True;
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end;
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end;
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if TempRegUsed then
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begin
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{ Handle the case if the reference becomes empty
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in a LEA instruction, as in this case it can be
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translated to a MOV or a null operation }
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if (taicpu(hp1).oper[X]^.ref^.base = NR_NO) and
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(taicpu(hp1).oper[X]^.ref^.index = NR_NO) and
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not Assigned(taicpu(hp1).oper[X]^.ref^.symbol) and
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not Assigned(taicpu(hp1).oper[X]^.ref^.relsymbol) then
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begin
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DebugMsg(SPeepholeOptimization + debug_regname(p_TargetReg) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val) + '; removed register from reference. amended offset and converted LEA to MOV (Lea2Mov 2)', hp1);
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if (NewOffset = taicpu(p).oper[0]^.val) and Reg1WriteOverwritesReg2Entirely(taicpu(hp1).oper[1]^.reg, p_TargetReg) then
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begin
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{ Since this would set the register to a value that it's already equal to, just remove it }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 5c done', hp1);
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RemoveInstruction(hp1);
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hp1 := nil;
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end
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else
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begin
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taicpu(hp1).opcode := A_MOV;
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taicpu(hp1).loadconst(0, NewOffset);
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end;
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end
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else
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DebugMsg(SPeepholeOptimization + debug_regname(p_TargetReg) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val) + '; removed register from reference and amended offset', hp1);
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if Assigned(hp1) and not RegUsedBetween(p_TargetReg, p, hp1) and
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not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) then
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begin
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{ If the original register is no longer used, we can remove the initial MOV }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 9a', p);
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RemoveCurrentP(p);
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Result := True;
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Exit;
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end;
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Include(OptsToCheck, aoc_ForceNewIteration);
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end;
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end;
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{ Only one reference per instruction }
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Break;
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end;
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if not Assigned(hp1) then
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{ hp1 got deleted by the Mov2Nop 5c optimisation above }
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Continue;
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case taicpu(hp1).opcode of
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A_Jcc:
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begin
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{ Don't continue on lower optimisation settings }
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if not (cs_opt_level2 in current_settings.optimizerswitches) then
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Break;
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CrossJump := True;
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{ Go to the next instruction }
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hp2 := hp1;
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Continue;
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end;
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A_ADD, A_SUB:
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{ mov 0,%reg1
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...
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add/sub %reg1,%reg2
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Remove add/sub
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And:
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mov x,%reg1
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...
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add/sub %reg1,%reg2
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Change to:
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mov x,%reg1
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...
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add/sub x,%reg2
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}
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if MatchOperand(taicpu(hp1).oper[0]^, p_TargetReg) and
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(
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{ "add/sub %reg,%reg" is fine to remove since %reg = 0
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still makes it an identity operation }
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MatchOperand(taicpu(hp1).oper[1]^, p_TargetReg) or
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not RegModifiedByInstruction(p_TargetReg, hp1)
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)
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then
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begin
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TempRegUsed := True; { Reusing to identify if the optimisation is invalid }
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegsBetween(TmpUsedRegs, p, hp1);
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if not RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
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begin
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if (taicpu(p).oper[0]^.val <> 0) then
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begin
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if MatchOperand(taicpu(hp1).oper[1]^, p_TargetReg) then
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begin
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{$ifndef x86_64}
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NewConst := 2 * taicpu(p).oper[0]^.val;
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{$else x86_64}
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{ Protect against overflows }
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NewConst := (taicpu(p).oper[0]^.val and $7FFFFFFFFFFFFFFF) shl 1;
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if (NewConst > $7FFFFFFF) or (NewConst < -2147483648) then
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{ Constant out of range }
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TempRegUsed := False
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else
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{$endif x86_64}
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begin
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{ add %reg,%reg doubles the value }
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taicpu(hp1).opcode := A_MOV;
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case taicpu(hp1).opsize of
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S_B: taicpu(hp1).loadconst(0, NewConst and $FF);
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S_W: taicpu(hp1).loadconst(0, NewConst and $FFFF);
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S_L: taicpu(hp1).loadconst(0, NewConst and $FFFFFFFF);
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{$ifdef x86_64}
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S_Q: taicpu(hp1).loadconst(0, NewConst);
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{$endif x86_64}
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else
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InternalError(2024022001);
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end;
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end;
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end
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else
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begin
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{$ifdef x86_64}
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if (taicpu(p).oper[0]^.val > $7FFFFFFF) or (taicpu(p).oper[0]^.val < -2147483648) then
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{ Constant out of range }
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TempRegUsed := False
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else
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{$endif x86_64}
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taicpu(hp1).loadconst(0, taicpu(p).oper[0]^.val);
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end;
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if TempRegUsed then
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DebugMsg(SPeepholeOptimization + 'Adapting ADD/SUB since ' + debug_regname(p_TargetReg) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val), hp1);
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end;
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if TempRegUsed then
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begin
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if (taicpu(p).oper[0]^.val = 0) then
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DebugMsg(SPeepholeOptimization + 'Removing ADD/SUB since ' + debug_regname(p_TargetReg) + ' = $0', hp1);
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if not CrossJump and
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not RegUsedBetween(p_TargetReg, p, hp1) and
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not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) then
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begin
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{ If the original register is no longer used, we can remove the initial MOV }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 9', p);
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if (taicpu(p).oper[0]^.val = 0) then
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RemoveInstruction(hp1);
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RemoveCurrentP(p);
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Result := True;
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Exit;
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end;
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if (taicpu(p).oper[0]^.val = 0) then
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RemoveInstruction(hp1);
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Include(OptsToCheck, aoc_ForceNewIteration);
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Continue;
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end;
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end;
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end;
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A_NOT:
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if MatchOperand(taicpu(hp1).oper[0]^, p_TargetReg) then
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begin
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TempRegUsed := False; { Reusing to identify if the optimisation is invalid }
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TransferUsedRegs(TmpUsedRegs);
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if not (cs_opt_level3 in current_settings.optimizerswitches) then
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{ hp1 is adjacent }
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next))
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else
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UpdateUsedRegsBetween(TmpUsedRegs, p, hp1);
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if not RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
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begin
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NewConst := not taicpu(p).oper[0]^.val;
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{$ifdef x86_64}
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if (NewConst <= $7FFFFFFF) and (NewConst >= -2147483648) then
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{$endif x86_64}
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begin
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TempRegUsed := True;
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DebugMsg(SPeepholeOptimization + 'Adapting NOT since ' + debug_regname(p_TargetReg) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val) + ' (And2Nop 2)', hp1);
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taicpu(hp1).opcode := A_MOV;
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taicpu(hp1).ops := 2;
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taicpu(hp1).loadconst(0, NewConst);
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taicpu(hp1).loadreg(1, p_TargetReg);
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end;
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end;
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if TempRegUsed then
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begin
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if not CrossJump and
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not RegUsedBetween(p_TargetReg, p, hp1) and
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not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) then
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begin
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{ If the original register is no longer used, we can remove the initial MOV }
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DebugMsg(SPeepholeOptimization + 'Mov2Nop 9b', p);
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RemoveCurrentP(p);
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Result := True;
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end;
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Include(OptsToCheck, aoc_ForceNewIteration);
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Exit;
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end;
|
||||
|
||||
end;
|
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|
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A_AND, A_OR, A_XOR:
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begin
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TempRegUsed := False; { Reusing to identify if the optimisation is invalid }
|
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|
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if MatchOperand(taicpu(hp1).oper[0]^, p_TargetReg) then
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begin
|
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|
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TransferUsedRegs(TmpUsedRegs);
|
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if not (cs_opt_level3 in current_settings.optimizerswitches) then
|
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{ hp1 is adjacent }
|
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next))
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else
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||||
UpdateUsedRegsBetween(TmpUsedRegs, p, hp1);
|
||||
|
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if not RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs)
|
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{$ifdef x86_64}
|
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and (taicpu(p).oper[0]^.val <= $7FFFFFFF) and (taicpu(p).oper[0]^.val >= -2147483648)
|
||||
{$endif x86_64}
|
||||
then
|
||||
begin
|
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TempRegUsed := True;
|
||||
taicpu(hp1).loadconst(0, taicpu(p).oper[0]^.val);
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||||
end;
|
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|
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end
|
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else if (taicpu(hp1).oper[0]^.typ = top_const) and
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MatchOperand(taicpu(hp1).oper[1]^, p_TargetReg) then
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begin
|
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TempRegUsed := True;
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DebugMsg(SPeepholeOptimization + 'Adapting ' + upcase(debug_op2str(taicpu(hp1).opcode)) + ' since ' + debug_regname(p_TargetReg) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val) + ' (And2Nop 2)', hp1);
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case taicpu(hp1).opcode of
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A_AND:
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taicpu(hp1).oper[0]^.val := taicpu(hp1).oper[0]^.val and taicpu(p).oper[0]^.val;
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A_OR:
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taicpu(hp1).oper[0]^.val := taicpu(hp1).oper[0]^.val or taicpu(p).oper[0]^.val;
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A_XOR:
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taicpu(hp1).oper[0]^.val := taicpu(hp1).oper[0]^.val xor taicpu(p).oper[0]^.val;
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else
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InternalError(2024022101)
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end;
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taicpu(hp1).opcode := A_MOV;
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||||
end;
|
||||
|
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if TempRegUsed then
|
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begin
|
||||
if not CrossJump and
|
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not RegUsedBetween(p_TargetReg, p, hp1) and
|
||||
not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) then
|
||||
begin
|
||||
{ If the original register is no longer used, we can remove the initial MOV }
|
||||
DebugMsg(SPeepholeOptimization + 'Mov2Nop 9b', p);
|
||||
RemoveCurrentP(p);
|
||||
Result := True;
|
||||
end;
|
||||
|
||||
Include(OptsToCheck, aoc_ForceNewIteration);
|
||||
Exit;
|
||||
end;
|
||||
end
|
||||
else
|
||||
;
|
||||
end;
|
||||
|
||||
if (cs_opt_level2 in current_settings.optimizerswitches) and
|
||||
not RegModifiedByInstruction(p_TargetReg, hp1) then
|
||||
begin
|
||||
{ Try the next instruction }
|
||||
hp2 := hp1;
|
||||
Continue;
|
||||
end;
|
||||
Break;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
|
||||
|
||||
@ -6269,8 +6686,17 @@ unit aoptx86;
|
||||
internalerror(2022022001);
|
||||
|
||||
{ changes "lea (%reg1), %reg2" into "mov %reg1, %reg2" }
|
||||
if (taicpu(p).oper[0]^.ref^.base <> NR_NO) and
|
||||
(taicpu(p).oper[0]^.ref^.index = NR_NO) and
|
||||
if (
|
||||
(
|
||||
(taicpu(p).oper[0]^.ref^.base <> NR_NO) and
|
||||
(taicpu(p).oper[0]^.ref^.index = NR_NO)
|
||||
) or
|
||||
(
|
||||
(taicpu(p).oper[0]^.ref^.base = NR_NO) and
|
||||
(taicpu(p).oper[0]^.ref^.index <> NR_NO) and
|
||||
(taicpu(p).oper[0]^.ref^.scalefactor <= 1)
|
||||
)
|
||||
) and
|
||||
(
|
||||
{ do not mess with leas accessing the stack pointer
|
||||
unless it's a null operation }
|
||||
@ -6284,6 +6710,13 @@ unit aoptx86;
|
||||
begin
|
||||
if (taicpu(p).oper[0]^.ref^.offset = 0) then
|
||||
begin
|
||||
{ If index contains a register, base is definitely NR_NO }
|
||||
if (taicpu(p).oper[0]^.ref^.index <> NR_NO) then
|
||||
begin
|
||||
taicpu(p).oper[0]^.ref^.base := taicpu(p).oper[0]^.ref^.index;
|
||||
taicpu(p).oper[0]^.ref^.index := NR_NO;
|
||||
end;
|
||||
|
||||
if (taicpu(p).oper[0]^.ref^.base <> taicpu(p).oper[1]^.reg) then
|
||||
begin
|
||||
taicpu(p).opcode := A_MOV;
|
||||
@ -6382,14 +6815,20 @@ unit aoptx86;
|
||||
begin
|
||||
TransferUsedRegs(TmpUsedRegs);
|
||||
UpdateUsedRegs(TmpUsedRegs, tai(p.next));
|
||||
{ reg1 is not updated so it might not be used afterwards }
|
||||
{ reg1 is not updated so it must not be used afterwards }
|
||||
if not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp1,TmpUsedRegs)) then
|
||||
begin
|
||||
DebugMsg(SPeepholeOptimization + 'LeaOp2Op done',p);
|
||||
if taicpu(p).oper[0]^.ref^.base<>NR_NO then
|
||||
taicpu(hp1).oper[ref]^.ref^.base:=taicpu(p).oper[0]^.ref^.base;
|
||||
begin
|
||||
taicpu(hp1).oper[ref]^.ref^.base:=taicpu(p).oper[0]^.ref^.base;
|
||||
AllocRegBetween(taicpu(p).oper[0]^.ref^.base, p, hp1, UsedRegs);
|
||||
end;
|
||||
if taicpu(p).oper[0]^.ref^.index<>NR_NO then
|
||||
taicpu(hp1).oper[ref]^.ref^.index:=taicpu(p).oper[0]^.ref^.index;
|
||||
begin
|
||||
taicpu(hp1).oper[ref]^.ref^.index:=taicpu(p).oper[0]^.ref^.index;
|
||||
AllocRegBetween(taicpu(p).oper[0]^.ref^.index, p, hp1, UsedRegs);
|
||||
end;
|
||||
if taicpu(p).oper[0]^.ref^.symbol<>nil then
|
||||
taicpu(hp1).oper[ref]^.ref^.symbol:=taicpu(p).oper[0]^.ref^.symbol;
|
||||
if taicpu(p).oper[0]^.ref^.relsymbol<>nil then
|
||||
@ -6544,7 +6983,9 @@ unit aoptx86;
|
||||
|
||||
if (taicpu(p).oper[0]^.ref^.offset <> 0) then
|
||||
Inc(taicpu(hp1).oper[0]^.ref^.offset, taicpu(p).oper[0]^.ref^.offset * max(taicpu(hp1).oper[0]^.ref^.scalefactor, 1));
|
||||
|
||||
taicpu(hp1).oper[0]^.ref^.index := taicpu(p).oper[0]^.ref^.index;
|
||||
AllocRegBetween(taicpu(p).oper[0]^.ref^.index, p, hp1, UsedRegs);
|
||||
|
||||
{ Just to prevent miscalculations }
|
||||
if (taicpu(hp1).oper[0]^.ref^.scalefactor = 0) then
|
||||
@ -8180,7 +8621,7 @@ unit aoptx86;
|
||||
var
|
||||
v: TCGInt;
|
||||
true_hp1, hp1, hp2, p_dist, p_jump, hp1_dist, p_label, hp1_label: tai;
|
||||
FirstMatch, TempBool: Boolean;
|
||||
FirstMatch, TempBool, FoundJNE: Boolean;
|
||||
NewReg: TRegister;
|
||||
JumpLabel, JumpLabel_dist, JumpLabel_far: TAsmLabel;
|
||||
begin
|
||||
@ -8208,9 +8649,11 @@ unit aoptx86;
|
||||
|
||||
{ Also handle cases where there are multiple jumps in a row }
|
||||
p_jump := hp1;
|
||||
FoundJNE := False;
|
||||
while Assigned(p_jump) and MatchInstruction(p_jump, A_JCC, []) do
|
||||
begin
|
||||
Prefetch(p_jump.Next);
|
||||
|
||||
if IsJumpToLabel(taicpu(p_jump)) then
|
||||
begin
|
||||
{ Do jump optimisations first in case the condition becomes
|
||||
@ -8332,6 +8775,11 @@ unit aoptx86;
|
||||
end;
|
||||
end;
|
||||
|
||||
{ We can't do this at the start of the while loop because of
|
||||
constructs such as "jne @lbl1; jmp @lbl2; @lbl1" that are
|
||||
optimised by DoJumpOptimizations into "je @lbl2" }
|
||||
FoundJNE := FoundJNE or (taicpu(p_jump).condition in [C_NE, C_NZ]);
|
||||
|
||||
{ Search for:
|
||||
cmp ###,###
|
||||
j(c1) @lbl1
|
||||
@ -8383,6 +8831,66 @@ unit aoptx86;
|
||||
GetNextInstruction(p_jump, p_jump);
|
||||
end;
|
||||
|
||||
{ Search for:
|
||||
cmp x,(reg/ref)
|
||||
(maybe other jumps)
|
||||
jne @lbl1
|
||||
(Operation with (reg/ref))
|
||||
|
||||
(reg/ref) is deterministic and equal to x
|
||||
}
|
||||
if FoundJNE and (taicpu(p).oper[1]^.typ = top_ref) then
|
||||
{ p_jump is one instruction after the last jump }
|
||||
while MatchInstruction(p_jump, A_MOV, [taicpu(p).opsize]) do
|
||||
begin
|
||||
if MatchOperand(taicpu(p).oper[1]^, taicpu(p_jump).oper[0]^) then
|
||||
begin
|
||||
|
||||
{ Make sure the reference is decremented when it is replaced }
|
||||
if Assigned(taicpu(p_jump).oper[0]^.ref^.symbol) then
|
||||
taicpu(p_jump).oper[0]^.ref^.symbol.decrefs
|
||||
else if Assigned(taicpu(p_jump).oper[0]^.ref^.relsymbol) then
|
||||
taicpu(p_jump).oper[0]^.ref^.relsymbol.decrefs;
|
||||
|
||||
if MatchOperand(taicpu(p).oper[0]^, taicpu(p_jump).oper[1]^) then
|
||||
begin
|
||||
DebugMsg(SPeepholeOptimization + 'CMP/JNE/MOV -> reference value was deterministic (Mov2Nop 7)', p_jump);
|
||||
RemoveInstruction(p_jump);
|
||||
end
|
||||
else
|
||||
begin
|
||||
if taicpu(p).oper[0]^.typ = top_reg then
|
||||
begin
|
||||
TransferUsedRegs(TmpUsedRegs);
|
||||
AllocRegBetween(taicpu(p).oper[0]^.reg, p, p_jump, TmpUsedRegs);
|
||||
end;
|
||||
|
||||
DebugMsg(SPeepholeOptimization + 'CMP/JNE/MOV -> reference value was deterministic (Mov2Mov 7) - changed from "mov ' +
|
||||
debug_operstr(taicpu(p_jump).oper[0]^) + ',' + debug_operstr(taicpu(p_jump).oper[1]^) + '" to "mov ' +
|
||||
debug_operstr(taicpu(p).oper[0]^) + ',' + debug_operstr(taicpu(p_jump).oper[1]^) + '"', p_jump);
|
||||
|
||||
taicpu(p_jump).loadoper(0, taicpu(p).oper[0]^);
|
||||
end;
|
||||
|
||||
Include(OptsToCheck, aoc_ForceNewIteration);
|
||||
end
|
||||
else if MatchOperand(taicpu(p).oper[1]^, taicpu(p_jump).oper[1]^) then
|
||||
{ Reference is written to }
|
||||
Break;
|
||||
|
||||
{ See if a later MOV modifies the same address }
|
||||
if (
|
||||
(taicpu(p_jump).oper[1]^.typ <> top_reg) or
|
||||
not RegInRef(taicpu(p_jump).oper[1]^.reg, taicpu(p).oper[1]^.ref^)
|
||||
) then
|
||||
begin
|
||||
if not GetNextInstruction(p_jump, p_jump) then
|
||||
Break;
|
||||
end
|
||||
else
|
||||
Break;
|
||||
end;
|
||||
|
||||
if (
|
||||
{ Don't call GetNextInstruction again if we already have it }
|
||||
(true_hp1 = p_jump) or
|
||||
|
||||
Loading…
Reference in New Issue
Block a user