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* fixed/enabled andl/addl/... xx,reg1 orl reg1,reg1 setxx/jxx/cmovxx optimization

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git-svn-id: trunk@8902 -
This commit is contained in:
florian 2007-10-21 19:54:09 +00:00
parent 5a3f71754a
commit c219b1f753
1 changed files with 5 additions and 4 deletions
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9
compiler/i386/popt386.pas
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@ -1218,8 +1218,8 @@ begin
GetNextInstruction(hp1, hp2) and
(Tai(hp2).typ = ait_instruction) and
(Taicpu(hp2).opcode = A_OR) and
(Taicpu(hp1).opsize = Taicpu(p).opsize) and
(Taicpu(hp2).opsize = Taicpu(p).opsize) and
(Taicpu(hp1).opsize = Taicpu(p).opsize) and
(Taicpu(hp2).opsize = Taicpu(p).opsize) and
(Taicpu(p).oper[0]^.typ = top_const) and (Taicpu(p).oper[0]^.val=0) and
(Taicpu(p).oper[1]^.typ = top_reg) and
(Taicpu(hp1).oper[1]^.typ = top_reg) and
@ -2053,10 +2053,11 @@ See test/tgadint64 in the test suite.
if OpsEqual(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
if GetLastInstruction(p, hp1) and
(tai(hp1).typ = ait_instruction) and
GetNextInstruction(hp1,hp2) and
GetNextInstruction(p,hp2) and
(hp2.typ = ait_instruction) and
((taicpu(hp2).opcode = A_SETcc) or
(taicpu(hp2).opcode = A_Jcc)) then
(taicpu(hp2).opcode = A_Jcc) or
(taicpu(hp2).opcode = A_CMOVcc)) then
case taicpu(hp1).opcode Of
A_ADD, A_SUB, A_OR, A_XOR, A_AND{, A_SHL, A_SHR}:
begin