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* x86: Extension to Cmp1Jl2Cmp0Jle to catch inverted variant

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J. Gareth "Curious Kit" Moreton 2022-11-16 18:25:01 +00:00 committed by J. Gareth "Kit" Moreton
parent e57ef24e37
commit c21bf747fb
1 changed files with 7 additions and 7 deletions
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14
compiler/x86/aoptx86.pas
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@ -7679,31 +7679,31 @@ unit aoptx86;
end end
else if (taicpu(p).oper[0]^.val = 1) and else if (taicpu(p).oper[0]^.val = 1) and
MatchInstruction(hp1,A_Jcc,A_SETcc,[]) and MatchInstruction(hp1,A_Jcc,A_SETcc,[]) and
(taicpu(hp1).condition in [C_L, C_NGE]) then (taicpu(hp1).condition in [C_L, C_NL, C_NGE, C_GE]) then
begin begin
{ Convert; To: { Convert; To:
cmp $1,r/m cmp $0,r/m cmp $1,r/m cmp $0,r/m
jl @lbl jle @lbl jl @lbl jle @lbl
(Also do inverted conditions)
} }
DebugMsg(SPeepholeOptimization + 'Cmp1Jl2Cmp0Jle', p); DebugMsg(SPeepholeOptimization + 'Cmp1Jl2Cmp0Jle', p);
taicpu(p).oper[0]^.val := 0; taicpu(p).oper[0]^.val := 0;
taicpu(hp1).condition := C_LE; if taicpu(hp1).condition in [C_L, C_NGE] then
taicpu(hp1).condition := C_LE
else
taicpu(hp1).condition := C_NLE;
{ If the instruction is now "cmp $0,%reg", convert it to a { If the instruction is now "cmp $0,%reg", convert it to a
TEST (and effectively do the work of the "cmp $0,%reg" in TEST (and effectively do the work of the "cmp $0,%reg" in
the block above) the block above)
If it's a reference, we can get away with not setting
Result to True because he haven't evaluated the jump
in this pass yet.
} }
if (taicpu(p).oper[1]^.typ = top_reg) then if (taicpu(p).oper[1]^.typ = top_reg) then
begin begin
taicpu(p).opcode := A_TEST; taicpu(p).opcode := A_TEST;
taicpu(p).loadreg(0,taicpu(p).oper[1]^.reg); taicpu(p).loadreg(0,taicpu(p).oper[1]^.reg);
Result := True;
end; end;
Result := True;
Exit; Exit;
end end
else if (taicpu(p).oper[1]^.typ = top_reg) else if (taicpu(p).oper[1]^.typ = top_reg)