diff --git a/compiler/cgobj.pas b/compiler/cgobj.pas index c038c31112..0d0137f076 100644 --- a/compiler/cgobj.pas +++ b/compiler/cgobj.pas @@ -192,7 +192,6 @@ unit cgobj; procedure a_load_ref_ref(list : taasmoutput;size : tcgsize;const sref : treference;const dref : treference);virtual; procedure a_load_loc_reg(list : taasmoutput;const loc: tlocation; reg : tregister); procedure a_load_loc_ref(list : taasmoutput;const loc: tlocation; const ref : treference); - procedure a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister);virtual; abstract; procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract; { fpu move instructions } @@ -1534,7 +1533,11 @@ finalization end. { $Log$ - Revision 1.48 2002-08-14 19:26:02 carl + Revision 1.49 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.48 2002/08/14 19:26:02 carl + routine to optimize opcodes with constants Revision 1.47 2002/08/11 14:32:26 peter diff --git a/compiler/m68k/cgcpu.pas b/compiler/m68k/cgcpu.pas index 14ae2aedad..6d8cffac02 100644 --- a/compiler/m68k/cgcpu.pas +++ b/compiler/m68k/cgcpu.pas @@ -40,7 +40,6 @@ unit cgcpu; procedure a_load_reg_ref(list : taasmoutput;size : tcgsize;register : tregister;const ref : treference);override; procedure a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);override; procedure a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref : treference;register : tregister);override; - procedure a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister);override; procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);override; procedure a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister); override; procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); override; @@ -273,10 +272,6 @@ Implementation sign_extend(list, size, register); end; - procedure tcg68k.a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister); - begin -{$warning To complete this section} - end; procedure tcg68k.a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister); var @@ -1102,7 +1097,11 @@ end. { $Log$ - Revision 1.2 2002-08-14 19:16:34 carl + Revision 1.3 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.2 2002/08/14 19:16:34 carl + m68k type conversion nodes + started some mathematical nodes * out of bound references should now be handled correctly diff --git a/compiler/m68k/cpubase.pas b/compiler/m68k/cpubase.pas index c4727e9949..06c3550ed2 100644 --- a/compiler/m68k/cpubase.pas +++ b/compiler/m68k/cpubase.pas @@ -543,7 +543,15 @@ implementation end; procedure inverse_flags(var r: TResFlags); + const flagsinvers : array[F_E..F_BE] of tresflags = + (F_NE,F_E, + F_LE,F_GE, + F_L,F_G, + F_NC,F_C, + F_BE,F_B, + F_AE,F_A); begin + r:=flagsinvers[r]; end; @@ -555,7 +563,11 @@ implementation end. { $Log$ - Revision 1.8 2002-08-14 18:41:47 jonas + Revision 1.9 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.8 2002/08/14 18:41:47 jonas - remove valuelow/valuehigh fields from tlocation, because they depend on the endianess of the host operating system -> difficult to get right. Use lo/hi(location.valueqword) instead (remember to use diff --git a/compiler/m68k/n68kmat.pas b/compiler/m68k/n68kmat.pas index 7b0f4f37af..8709afbed1 100644 --- a/compiler/m68k/n68kmat.pas +++ b/compiler/m68k/n68kmat.pas @@ -2,7 +2,7 @@ $Id$ Copyright (c) 1998-2002 by Florian Klaempfl - Generate i386 assembler for math nodes + Generate 680x0 assembler for math nodes This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -20,7 +20,7 @@ **************************************************************************** } -unit ncgmat; +unit n68kmat; {$i fpcdefs.inc} @@ -50,18 +50,17 @@ implementation symconst,symdef,aasmbase,aasmtai,aasmcpu,defbase, cginfo,cgbase,pass_1,pass_2, ncon, - cpubase,cpuinfo, - tgobj,ncgutil,cgobj,rgobj,rgcpu; + cpubase,cpuinfo,paramgr, + tgobj,ncgutil,cgobj,rgobj,rgcpu,cgcpu,cg64f32; {***************************************************************************** - TI386MODDIVNODE + TM68kMODDIVNODE *****************************************************************************} procedure tm68kmoddivnode.pass_2; var hreg1 : tregister; - hreg2 : tregister; - hdenom : tregister; + hdenom,hnumerator : tregister; shrdiv,popeax,popedx : boolean; power : longint; hl : tasmlabel; @@ -100,54 +99,62 @@ implementation If is_signed(left.resulttype.def) Then Begin objectlibrary.getlabel(hl); - cg.a_cmp_const_reg_label(exprasmlist,OS_INT,OC_GT,0,hreg,hl); + cg.a_cmp_const_reg_label(exprasmlist,OS_INT,OC_GT,0,hreg1,hl); if power=1 then - cg.a_op_const_reg(exprasmlist,OP_ADD,OS_32,1,hreg1) + cg.a_op_const_reg(exprasmlist,OP_ADD,1,hreg1) else - cg.a_op_const_reg(exprasmlist,OP_ADD,OS_32, + cg.a_op_const_reg(exprasmlist,OP_ADD, tordconstnode(right).value-1,hreg1); cg.a_label(exprasmlist,hl); - cg.a_op_const_reg(exprasmlist,OP_SAR,OS_INT,power,hreg1); + cg.a_op_const_reg(exprasmlist,OP_SAR,power,hreg1); End Else { not signed } Begin - cg.a_op_const_reg(exprasmlist,OP_SHR,OS_INT,power,hreg1); + cg.a_op_const_reg(exprasmlist,OP_SHR,power,hreg1); end; End else begin - { bring denominator to D1 } - { D1 is always free, it's } + { bring denominator to hdenom } + { hdenom is always free, it's } { only used for temporary } { purposes } hdenom := rg.getregisterint(exprasmlist); if right.location.loc<>LOC_CREGISTER then location_release(exprasmlist,right.location); cg.a_load_loc_reg(exprasmlist,right.location,hdenom); + if nodetype = modn then + begin + hnumerator := rg.getregisterint(exprasmlist); + cg.a_load_reg_reg(exprasmlist,OS_INT,hreg1,hnumerator); + end; { verify if the divisor is zero, if so return an error immediately } - objectlibrary.getlabel(hl1); - cg.a_cmp_const_reg_label(exprasmlist,OS_INT,OC_NE,0,hdenom,hl1); - cg.a_param_reg(exprasmlist,OS_S32,paramanager.getintparaloc(1)); - cg.a_call_name('FPC_HANDLERROR'); - cg.a_label(exprasmlist,hl1); -{ This should be moved to emit_moddiv_reg_reg } + objectlibrary.getlabel(hl); + cg.a_cmp_const_reg_label(exprasmlist,OS_INT,OC_NE,0,hdenom,hl); + cg.a_param_const(exprasmlist,OS_S32,200,paramanager.getintparaloc(1)); + cg.a_call_name(exprasmlist,'FPC_HANDLERROR'); + cg.a_label(exprasmlist,hl); if is_signed(left.resulttype.def) then - cg.a_op_reg_reg(exprasmlist,OS_INT,OP_IDIV,hdenom,hreg1) + cg.a_op_reg_reg(exprasmlist,OP_IDIV,OS_INT,hdenom,hreg1) else - cg.a_op_reg_reg(exprasmlist,OS_INT,OP_DIV,hdenom,hreg1); + cg.a_op_reg_reg(exprasmlist,OP_DIV,OS_INT,hdenom,hreg1); + if nodetype = modn then begin {$warning modnode should be tested} - { multiply by denominator to get modulo } - cg.a_op_reg_reg(exprasmlist,OS_INT,OP_IMUL,hdenom,hreg1) + { I mod J = I - (I div J) * J } + cg.a_op_reg_reg(exprasmlist,OP_IMUL,OS_INT,hdenom,hreg1); + cg.a_op_reg_reg(exprasmlist,OP_SUB,OS_INT,hnumerator,hreg1); + rg.ungetregister(exprasmlist,hnumerator); end; end; location_reset(location,LOC_REGISTER,OS_INT); location.register:=hreg1; end; + cg.g_overflowcheck(exprasmlist,self); end; @@ -157,194 +164,57 @@ implementation procedure tm68kshlshrnode.pass_2; var - hregister2,hregister3, - hregisterhigh,hregisterlow : tregister; - popecx : boolean; - op : tasmop; + hcountreg : tregister; + op : topcg; l1,l2,l3 : tasmlabel; pushedregs : tmaybesave; + freescratch : boolean; begin - popecx:=false; - + freescratch:=false; secondpass(left); maybe_save(exprasmlist,right.registers32,left.location,pushedregs); secondpass(right); maybe_restore(exprasmlist,left.location,pushedregs); - { determine operator } case nodetype of - shln: op:=A_SHL; - shrn: op:=A_SHR; + shln: op:=OP_SHL; + shrn: op:=OP_SHR; end; -(* + if is_64bitint(left.resulttype.def) then begin location_reset(location,LOC_REGISTER,OS_64); { load left operator in a register } location_force_reg(exprasmlist,left.location,OS_64,false); - hregisterhigh:=left.location.registerhigh; - hregisterlow:=left.location.registerlow; + location_copy(location,left.location); - { shifting by a constant directly coded: } if (right.nodetype=ordconstn) then begin - { shrd/shl works only for values <=31 !! } - if tordconstnode(right).value>31 then - begin - if nodetype=shln then - begin - emit_reg_reg(A_XOR,S_L,hregisterhigh, - hregisterhigh); - if ((tordconstnode(right).value and 31) <> 0) then - emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31, - hregisterlow); - end - else - begin - emit_reg_reg(A_XOR,S_L,hregisterlow, - hregisterlow); - if ((tordconstnode(right).value and 31) <> 0) then - emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31, - hregisterhigh); - end; - location.registerhigh:=hregisterlow; - location.registerlow:=hregisterhigh; - end - else - begin - if nodetype=shln then - begin - emit_const_reg_reg(A_SHLD,S_L,tordconstnode(right).value and 31, - hregisterlow,hregisterhigh); - emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31, - hregisterlow); - end - else - begin - emit_const_reg_reg(A_SHRD,S_L,tordconstnode(right).value and 31, - hregisterhigh,hregisterlow); - emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31, - hregisterhigh); - end; - location.registerlow:=hregisterlow; - location.registerhigh:=hregisterhigh; - end; + cg64.a_op64_const_reg(exprasmlist,op,tordconstnode(right).value, + joinreg64(location.registerlow,location.registerhigh)); end else begin - { load right operators in a register } + { load right operators in a register - this + is done since most target cpu which will use this + node do not support a shift count in a mem. location (cec) + } + if right.location.loc<>LOC_REGISTER then begin if right.location.loc<>LOC_CREGISTER then location_release(exprasmlist,right.location); - hregister2:=rg.getexplicitregisterint(exprasmlist,R_ECX); - cg.a_load_loc_reg(exprasmlist,right.location,hregister2); + hcountreg:=cg.get_scratch_reg_int(exprasmlist); + cg.a_load_loc_reg(exprasmlist,right.location,hcountreg); + freescratch := true; end else - hregister2:=right.location.register; - - { left operator is already in a register } - { hence are both in a register } - { is it in the case ECX ? } - if (hregisterlow=R_ECX) then - begin - { then only swap } - emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2); - hregister3:=hregisterlow; - hregisterlow:=hregister2; - hregister2:=hregister3; - end - else if (hregisterhigh=R_ECX) then - begin - { then only swap } - emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2); - hregister3:=hregisterhigh; - hregisterhigh:=hregister2; - hregister2:=hregister3; - end - - { if second operator not in ECX ? } - else if (hregister2<>R_ECX) then - begin - { ECX occupied then push it } - if not (R_ECX in rg.unusedregsint) then - begin - popecx:=true; - emit_reg(A_PUSH,S_L,R_ECX); - end - else - rg.getexplicitregisterint(exprasmlist,R_ECX); - emit_reg_reg(A_MOV,S_L,hregister2,R_ECX); - end; - - if hregister2 <> R_ECX then - rg.ungetregisterint(exprasmlist,hregister2); - - { the damned shift instructions work only til a count of 32 } - { so we've to do some tricks here } - if nodetype=shln then - begin - objectlibrary.getlabel(l1); - objectlibrary.getlabel(l2); - objectlibrary.getlabel(l3); - emit_const_reg(A_CMP,S_L,64,R_ECX); - emitjmp(C_L,l1); - emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow); - emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh); - cg.a_jmp_always(exprasmlist,l3); - cg.a_label(exprasmlist,l1); - emit_const_reg(A_CMP,S_L,32,R_ECX); - emitjmp(C_L,l2); - emit_const_reg(A_SUB,S_L,32,R_ECX); - emit_reg_reg(A_SHL,S_L,R_CL, - hregisterlow); - emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh); - emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow); - cg.a_jmp_always(exprasmlist,l3); - cg.a_label(exprasmlist,l2); - emit_reg_reg_reg(A_SHLD,S_L,R_CL, - hregisterlow,hregisterhigh); - emit_reg_reg(A_SHL,S_L,R_CL, - hregisterlow); - cg.a_label(exprasmlist,l3); - end - else - begin - objectlibrary.getlabel(l1); - objectlibrary.getlabel(l2); - objectlibrary.getlabel(l3); - emit_const_reg(A_CMP,S_L,64,R_ECX); - emitjmp(C_L,l1); - emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow); - emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh); - cg.a_jmp_always(exprasmlist,l3); - cg.a_label(exprasmlist,l1); - emit_const_reg(A_CMP,S_L,32,R_ECX); - emitjmp(C_L,l2); - emit_const_reg(A_SUB,S_L,32,R_ECX); - emit_reg_reg(A_SHR,S_L,R_CL, - hregisterhigh); - emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow); - emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh); - cg.a_jmp_always(exprasmlist,l3); - cg.a_label(exprasmlist,l2); - emit_reg_reg_reg(A_SHRD,S_L,R_CL, - hregisterhigh,hregisterlow); - emit_reg_reg(A_SHR,S_L,R_CL, - hregisterhigh); - cg.a_label(exprasmlist,l3); - - end; - - { maybe put ECX back } - if popecx then - emit_reg(A_POP,S_L,R_ECX) - else - rg.ungetregisterint(exprasmlist,R_ECX); - - location.registerlow:=hregisterlow; - location.registerhigh:=hregisterhigh; + hcountreg:=right.location.register; + cg64.a_op64_reg_reg(exprasmlist,op,hcountreg, + joinreg64(location.registerlow,location.registerhigh)); + if freescratch then + cg.free_scratch_reg(exprasmlist,hcountreg); end; end else @@ -359,7 +229,7 @@ implementation { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK) if right.value<=31 then } - emit_const_reg(op,S_L,tordconstnode(right).value and 31, + cg.a_op_const_reg(exprasmlist,op,tordconstnode(right).value and 31, location.register); { else @@ -369,72 +239,41 @@ implementation end else begin - { load right operators in a register } + { load right operators in a register - this + is done since most target cpu which will use this + node do not support a shift count in a mem. location (cec) + } if right.location.loc<>LOC_REGISTER then begin if right.location.loc<>LOC_CREGISTER then location_release(exprasmlist,right.location); - hregister2:=rg.getexplicitregisterint(exprasmlist,R_ECX); - cg.a_load_loc_reg(exprasmlist,right.location,hregister2); + hcountreg:=cg.get_scratch_reg_int(exprasmlist); + freescratch := true; + cg.a_load_loc_reg(exprasmlist,right.location,hcountreg); end else - hregister2:=right.location.register; - - { left operator is already in a register } - { hence are both in a register } - { is it in the case ECX ? } - if (location.register=R_ECX) then - begin - { then only swap } - emit_reg_reg(A_XCHG,S_L,location.register,hregister2); - hregister3:=location.register; - location.register:=hregister2; - hregister2:=hregister3; - end - { if second operator not in ECX ? } - else if (hregister2<>R_ECX) then - begin - { ECX occupied then push it } - if not (R_ECX in rg.unusedregsint) then - begin - popecx:=true; - emit_reg(A_PUSH,S_L,R_ECX); - end - else - rg.getexplicitregisterint(exprasmlist,R_ECX); - emit_reg_reg(A_MOV,S_L,hregister2,R_ECX); - end; - rg.ungetregisterint(exprasmlist,hregister2); - { right operand is in ECX } - emit_reg_reg(op,S_L,R_CL,location.register); - { maybe ECX back } - if popecx then - emit_reg(A_POP,S_L,R_ECX) - else - rg.ungetregisterint(exprasmlist,R_ECX); + hcountreg:=right.location.register; + cg.a_op_reg_reg(exprasmlist,op,OS_INT,hcountreg,location.register); + if freescratch then + cg.free_scratch_reg(exprasmlist,hcountreg); end; end; -*) end; {***************************************************************************** - TI386NOTNODE + TM68KNOTNODE *****************************************************************************} procedure tm68knotnode.pass_2; - const - flagsinvers : array[F_E..F_BE] of tresflags = - (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C, - F_BE,F_B,F_AE,F_A); var hl : tasmlabel; - opsize : topsize; + opsize : tcgsize; begin + opsize:=def_cgsize(resulttype.def); if is_boolean(resulttype.def) then begin - opsize:=def_opsize(resulttype.def); { the second pass could change the location of left } { if it is a register variable, so we've to do } { this before the case statement } @@ -456,9 +295,9 @@ implementation end; LOC_FLAGS : begin + location_copy(location,left.location); location_release(exprasmlist,left.location); - location_reset(location,LOC_FLAGS,OS_NO); - location.resflags:=flagsinvers[left.location.resflags]; + inverse_flags(location.resflags); end; LOC_CONSTANT, LOC_REGISTER, @@ -467,7 +306,7 @@ implementation LOC_CREFERENCE : begin location_force_reg(exprasmlist,left.location,def_cgsize(resulttype.def),true); - list.concat(taicpu.op_reg(A_TST,opsize,left.location.register)); + exprasmlist.concat(taicpu.op_reg(A_TST,tcgsize2opsize[opsize],left.location.register)); location_release(exprasmlist,left.location); location_reset(location,LOC_FLAGS,OS_NO); location.resflags:=F_E; @@ -481,17 +320,15 @@ implementation secondpass(left); location_copy(location,left.location); location_force_reg(exprasmlist,location,OS_64,false); - cg.a_op64_op_loc_reg(exprasmlist,A_NOT,OS_64, - location,joinreg64(l.registerlow,l.registerhigh)); + cg64.a_op64_loc_reg(exprasmlist,OP_NOT,location, + joinreg64(location.registerlow,location.registerhigh)); end else begin secondpass(left); location_copy(location,left.location); - location_force_reg(exprasmlist,location,def_cgsize(resulttype.def),false); - - opsize:=def_cgsize(resulttype.def); - cg.a_op_reg_reg(exprasmlist,OP_NOT,location.register,location.register); + location_force_reg(exprasmlist,location,opsize,false); + cg.a_op_reg_reg(exprasmlist,OP_NOT,opsize,location.register,location.register); end; end; @@ -502,7 +339,11 @@ begin end. { $Log$ - Revision 1.1 2002-08-14 19:16:34 carl + Revision 1.2 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.1 2002/08/14 19:16:34 carl + m68k type conversion nodes + started some mathematical nodes * out of bound references should now be handled correctly diff --git a/compiler/ncgmem.pas b/compiler/ncgmem.pas index 14ff81858a..c944ca080d 100644 --- a/compiler/ncgmem.pas +++ b/compiler/ncgmem.pas @@ -102,13 +102,16 @@ implementation *****************************************************************************} procedure tcgloadvmtnode.pass_2; + var + href : treference; begin location_reset(location,LOC_REGISTER,OS_ADDR); - location.register:=rg.getregisterint(exprasmlist); - cg.a_load_sym_ofs_reg(exprasmlist, - objectlibrary.newasmsymbol(tobjectdef(tclassrefdef(resulttype.def).pointertype.def).vmt_mangledname), - 0,location.register); + location.register:=rg.getaddressregister(exprasmlist); + { on 80386, LEA is the same as mov imm32 } + reference_reset_symbol(href, + objectlibrary.newasmsymbol(tobjectdef(tclassrefdef(resulttype.def).pointertype.def).vmt_mangledname),0); + cg.a_loadaddr_ref_reg(exprasmlist,href,location.register); end; @@ -875,7 +878,11 @@ begin end. { $Log$ - Revision 1.23 2002-08-11 14:32:26 peter + Revision 1.24 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.23 2002/08/11 14:32:26 peter * renamed current_library to objectlibrary Revision 1.22 2002/08/11 13:24:12 peter diff --git a/compiler/powerpc/cgcpu.pas b/compiler/powerpc/cgcpu.pas index 08d4815188..18af17841c 100644 --- a/compiler/powerpc/cgcpu.pas +++ b/compiler/powerpc/cgcpu.pas @@ -59,7 +59,6 @@ unit cgcpu; procedure a_load_reg_ref(list : taasmoutput; size: tcgsize; reg : tregister;const ref : treference);override; procedure a_load_ref_reg(list : taasmoutput;size : tcgsize;const Ref : treference;reg : tregister);override; procedure a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);override; - procedure a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister); override; { fpu move instructions } procedure a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister); override; @@ -371,13 +370,6 @@ const end; end; - procedure tcgppc.a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister); - - begin - { can't use op_sym_ofs_reg because sym+ofs can be > 32767!! } - internalerror(200112293); - end; - procedure tcgppc.a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister); @@ -1674,7 +1666,11 @@ begin end. { $Log$ - Revision 1.40 2002-08-11 14:32:32 peter + Revision 1.41 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.40 2002/08/11 14:32:32 peter * renamed current_library to objectlibrary Revision 1.39 2002/08/11 13:24:18 peter diff --git a/compiler/x86/cgx86.pas b/compiler/x86/cgx86.pas index 959d3811c5..03f404053b 100644 --- a/compiler/x86/cgx86.pas +++ b/compiler/x86/cgx86.pas @@ -69,7 +69,6 @@ unit cgx86; procedure a_load_reg_ref(list : taasmoutput; size: tcgsize; reg : tregister;const ref : treference);override; procedure a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref : treference;reg : tregister);override; procedure a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);override; - procedure a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister); override; procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);override; { fpu move instructions } @@ -494,12 +493,6 @@ unit cgx86; end; - procedure tcgx86.a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister); - - begin - list.concat(taicpu.op_sym_ofs_reg(A_MOV,S_L,sym,ofs,reg)); - end; - procedure tcgx86.a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister); @@ -1651,7 +1644,11 @@ unit cgx86; end. { $Log$ - Revision 1.9 2002-08-11 14:32:33 peter + Revision 1.10 2002-08-15 08:13:54 carl + - a_load_sym_ofs_reg removed + * loadvmt now calls loadaddr_ref_reg instead + + Revision 1.9 2002/08/11 14:32:33 peter * renamed current_library to objectlibrary Revision 1.8 2002/08/11 13:24:20 peter