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* On SPARC, using shifts for zero-extending to OS_16 is more efficient than ANDing with 65535 (two instructions and no temp registers vs. three instructions and a temp register).

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git-svn-id: trunk@26257 -
This commit is contained in:
sergei 2013-12-20 19:00:44 +00:00
parent b376f56bf3
commit c3fe0c7379
1 changed files with 4 additions and 1 deletions
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5
compiler/sparc/cgcpu.pas
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@ -699,7 +699,10 @@ implementation
OS_8 : OS_8 :
a_op_const_reg_reg(list,OP_AND,tosize,$ff,reg1,reg2); a_op_const_reg_reg(list,OP_AND,tosize,$ff,reg1,reg2);
OS_16 : OS_16 :
a_op_const_reg_reg(list,OP_AND,tosize,$ffff,reg1,reg2); begin
list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,16,reg2));
list.concat(taicpu.op_reg_const_reg(A_SRL,reg2,16,reg2));
end;
OS_32, OS_32,
OS_S32 : OS_S32 :
begin begin