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* r4760, r4784, r4788 for ppc64

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git-svn-id: trunk@4832 -
This commit is contained in:
tom_at_work 2006-10-08 16:09:46 +00:00
parent de87469127
commit c64190bda3
3 changed files with 35 additions and 18 deletions
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16
compiler/powerpc64/cpubase.pas
View File

@ -404,7 +404,7 @@ function dwarf_reg(r:tregister):shortint;
implementation
uses
rgBase, verbose;
rgBase, verbose, itcpugas;
const
std_regname_table: array[tregisterindex] of string[7] = (
@ -421,15 +421,15 @@ const
{*****************************************************************************
Helpers
*****************************************************************************}
***************** ************************************************************}
function is_calljmp(o: tasmop): boolean;
begin
is_calljmp := false;
case o of
A_B, A_BA, A_BL, A_BLA, A_BC, A_BCA, A_BCL, A_BCLA, A_BCCTR, A_BCCTRL,
A_BCLR,
A_BCLRL, A_TW, A_TWI: is_calljmp := true;
A_BCLR, A_BF, A_BT,
A_BCLRL, A_TW, A_TWI: is_calljmp := true;
end;
end;
@ -511,10 +511,12 @@ end;
function reg_cgsize(const reg: tregister): tcgsize;
begin
case getregtype(reg) of
R_MMREGISTER,
R_FPUREGISTER,
R_INTREGISTER:
R_INTREGISTER:
result := OS_64;
R_MMREGISTER:
result := OS_M128;
R_FPUREGISTER:
result := OS_F64;
else
internalerror(200303181);
end;

22
compiler/powerpc64/nppcadd.pas
View File

@ -370,19 +370,33 @@ procedure tppcaddnode.second_addfloat;
var
op: TAsmOp;
cmpop: boolean;
singleprec: boolean;
begin
pass_left_and_right;
singleprec := tfloatdef(left.resulttype.def).typ = s32real;
cmpop := false;
case nodetype of
addn:
op := A_FADD;
if (singleprec) then
op := A_FADDS
else
op := A_FADD;
muln:
op := A_FMUL;
if (singleprec) then
op := A_FMULS
else
op := A_FMUL;
subn:
op := A_FSUB;
if (singleprec) then
op := A_FSUBS
else
op := A_FSUB;
slashn:
op := A_FDIV;
if (singleprec) then
op := A_FDIVS
else
op := A_FDIV;
ltn, lten, gtn, gten,
equaln, unequaln:
begin

15
compiler/powerpc64/nppcinl.pas
View File

@ -66,9 +66,6 @@ begin
expectloc := LOC_FPUREGISTER;
registersint := left.registersint;
registersfpu := max(left.registersfpu, 1);
{$IFDEF SUPPORT_MMX}
registersmmx := left.registersmmx;
{$ENDIF SUPPORT_MMX}
first_abs_real := nil;
end;
@ -77,9 +74,6 @@ begin
expectloc := LOC_FPUREGISTER;
registersint := left.registersint;
registersfpu := max(left.registersfpu, 1);
{$IFDEF SUPPORT_MMX}
registersmmx := left.registersmmx;
{$ENDIF SUPPORT_MMX}
first_sqr_real := nil;
end;
@ -107,10 +101,17 @@ begin
end;
procedure tppcinlinenode.second_sqr_real;
var
op : TAsmOp;
begin
location.loc := LOC_FPUREGISTER;
load_fpu_location;
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_FMUL, location.register,
if (left.location.size = OS_F32) then
op := A_FMULS
else
op := A_FMUL;
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op, location.register,
left.location.register, left.location.register));
end;