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https://gitlab.com/freepascal.org/fpc/source.git
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+ implemented WebAssembly code generation for case statements
git-svn-id: branches/wasm@48173 -
This commit is contained in:
nickysn
parent
039e2f20b7
commit
c781e03edf
compiler
@ -61,6 +61,9 @@ interface
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tcaseblock = record
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{ label (only used in pass_generate_code) }
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blocklabel : tasmlabel;
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{$ifdef WASM}
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BlockBr : Integer;
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{$endif WASM}
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{ shortcut - set to true if blocklabel isn't actually unique to the
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case block due to one of the following conditions:
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@ -151,6 +151,18 @@ uses
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procedure a_op_ref_stack(list : TAsmList;op: topcg; size: tdef;const ref: treference);
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procedure a_op_loc_stack(list : TAsmList;op: topcg; size: tdef;const loc: tlocation);
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procedure a_cmp_const_ref_stack(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference);
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procedure a_cmp_const_reg_stack(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister);
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procedure a_cmp_ref_reg_stack(list: TAsmList; size: tdef; cmp_op: topcmp; const ref: treference; reg: tregister);
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procedure a_cmp_reg_ref_stack(list: TAsmList; size: tdef; cmp_op: topcmp; reg: tregister; const ref: treference);
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procedure a_cmp_reg_reg_stack(list: TAsmList; size: tdef; cmp_op: topcmp; reg1, reg2: tregister);
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procedure a_cmp_const_ref_br(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference; br: Integer);
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procedure a_cmp_const_reg_br(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister; br: Integer);
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procedure a_cmp_ref_reg_br(list: TAsmList; size: tdef; cmp_op: topcmp; const ref: treference; reg: tregister; br: Integer);
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procedure a_cmp_reg_ref_br(list: TAsmList; size: tdef; cmp_op: topcmp; reg: tregister; const ref: treference; br: Integer);
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procedure a_cmp_reg_reg_br(list: TAsmList; size: tdef; cmp_op: topcmp; reg1, reg2: tregister; br: Integer);
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procedure g_reference_loc(list: TAsmList; def: tdef; const fromloc: tlocation; out toloc: tlocation); override;
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{ this routine expects that all values are already massaged into the
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@ -574,6 +586,96 @@ implementation
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end;
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end;
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procedure thlcgwasm.a_cmp_const_ref_stack(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference);
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var
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tmpref: treference;
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begin
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tmpref:=ref;
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if tmpref.base<>NR_EVAL_STACK_BASE then
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a_load_ref_stack(list,size,tmpref,prepare_stack_for_ref(list,tmpref,false));
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_load_const_stack(list,size,maybe_adjust_cmp_constval(size,cmp_op,a),def2regtyp(size));
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a_cmp_stack_stack(list,size,cmp_op);
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end;
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procedure thlcgwasm.a_cmp_const_reg_stack(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister);
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begin
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a_load_reg_stack(list,size,reg);
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_load_const_stack(list,size,maybe_adjust_cmp_constval(size,cmp_op,a),def2regtyp(size));
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a_cmp_stack_stack(list,size,cmp_op);
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end;
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procedure thlcgwasm.a_cmp_ref_reg_stack(list: TAsmList; size: tdef; cmp_op: topcmp; const ref: treference; reg: tregister);
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var
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tmpref: treference;
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begin
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tmpref:=ref;
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a_load_reg_stack(list,size,reg);
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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if tmpref.base<>NR_EVAL_STACK_BASE then
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a_load_ref_stack(list,size,tmpref,prepare_stack_for_ref(list,tmpref,false))
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else begin
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// todo: need a swap operation?
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//list.concat(taicpu.op_none(a_swap));
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Internalerror(2019083003);
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end;
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_cmp_stack_stack(list,size,cmp_op);
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end;
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procedure thlcgwasm.a_cmp_reg_ref_stack(list: TAsmList; size: tdef; cmp_op: topcmp; reg: tregister; const ref: treference);
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var
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tmpref: treference;
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begin
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tmpref:=ref;
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if tmpref.base<>NR_EVAL_STACK_BASE then
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a_load_ref_stack(list,size,ref,prepare_stack_for_ref(list,tmpref,false));
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_load_reg_stack(list,size,reg);
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_cmp_stack_stack(list,size,cmp_op);
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end;
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procedure thlcgwasm.a_cmp_reg_reg_stack(list: TAsmList; size: tdef; cmp_op: topcmp; reg1, reg2: tregister);
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begin
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a_load_reg_stack(list,size,reg2);
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_load_reg_stack(list,size,reg1);
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maybe_adjust_cmp_stackval(list,size,cmp_op);
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a_cmp_stack_stack(list,size,cmp_op);
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end;
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procedure thlcgwasm.a_cmp_const_ref_br(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference; br: Integer);
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begin
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a_cmp_const_ref_stack(list,size,cmp_op,a,ref);
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br_if,br));
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end;
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procedure thlcgwasm.a_cmp_const_reg_br(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister; br: Integer);
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begin
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a_cmp_const_reg_stack(list,size,cmp_op,a,reg);
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br_if,br));
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end;
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procedure thlcgwasm.a_cmp_ref_reg_br(list: TAsmList; size: tdef; cmp_op: topcmp; const ref: treference; reg: tregister; br: Integer);
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begin
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a_cmp_ref_reg_stack(list,size,cmp_op,ref,reg);
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br_if,br));
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end;
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procedure thlcgwasm.a_cmp_reg_ref_br(list: TAsmList; size: tdef; cmp_op: topcmp; reg: tregister; const ref: treference; br: Integer);
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begin
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a_cmp_reg_ref_stack(list,size,cmp_op,reg,ref);
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br_if,br));
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end;
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procedure thlcgwasm.a_cmp_reg_reg_br(list: TAsmList; size: tdef; cmp_op: topcmp; reg1, reg2: tregister; br: Integer);
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begin
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a_cmp_reg_reg_stack(list,size,cmp_op,reg1,reg2);
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br_if,br));
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end;
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procedure thlcgwasm.g_reference_loc(list: TAsmList; def: tdef; const fromloc: tlocation; out toloc: tlocation);
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begin
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case fromloc.loc of
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@ -26,21 +26,460 @@ unit nwasmset;
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interface
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uses
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nset,ncgset;
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node,nset,ncgset;
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type
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{ twasmcasenode }
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twasmcasenode = class(tcgcasenode)
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private
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ElseBr: Integer;
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EndBr: Integer;
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function GetBranchBr(Block: TNode; out _Br: Integer): Boolean;
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protected
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function BlockBr(id:longint):Integer;
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procedure genlinearlist(hp : pcaselabel);override;
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procedure genlinearcmplist(hp : pcaselabel);override;
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public
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procedure pass_generate_code;override;
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end;
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implementation
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uses
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globtype,globals,
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cpubase,
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cgbase,cgutils,
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aasmdata,aasmcpu,
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hlcgobj,hlcgcpu,
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nbas,
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symtype,
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pass_2,defutil,verbose,constexp;
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{*****************************************************************************
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TWASMCASENODE
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*****************************************************************************}
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function twasmcasenode.GetBranchBr(Block: TNode; out _Br: Integer): Boolean;
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begin
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Result := True;
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if not Assigned(Block) then
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begin
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{ Block doesn't exist / is empty }
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_Br := EndBr;
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Exit;
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end;
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{ These optimisations aren't particularly debugger friendly }
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if not (cs_opt_level2 in current_settings.optimizerswitches) then
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begin
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Result := False;
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current_asmdata.CurrAsmList.concat(taicpu.op_none(a_block));
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thlcgwasm(hlcg).incblock;
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_Br:=thlcgwasm(hlcg).br_blocks;
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Exit;
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end;
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while Assigned(Block) do
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begin
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case Block.nodetype of
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nothingn:
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begin
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_Br := EndBr;
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Exit;
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end;
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goton:
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InternalError(2021011801);
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blockn:
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begin
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Block := TBlockNode(Block).Left;
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Continue;
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end;
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statementn:
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begin
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{ If the right node is assigned, then it's a compound block
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that can't be simplified, so fall through, set Result to
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False and make a new label }
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if Assigned(TStatementNode(Block).right) then
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Break;
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Block := TStatementNode(Block).Left;
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Continue;
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end;
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else
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;
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end;
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Break;
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end;
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{ Create unique label }
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Result := False;
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current_asmdata.CurrAsmList.concat(taicpu.op_none(a_block));
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thlcgwasm(hlcg).incblock;
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_Br:=thlcgwasm(hlcg).br_blocks;
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end;
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function twasmcasenode.BlockBr(id: longint): Integer;
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begin
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if not assigned(blocks[id]) then
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internalerror(200411301);
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result:=pcaseblock(blocks[id])^.BlockBr;
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end;
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procedure twasmcasenode.genlinearlist(hp: pcaselabel);
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var
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first : boolean;
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last : TConstExprInt;
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scratch_reg: tregister;
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newsize: tcgsize;
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newdef: tdef;
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procedure gensub(value:tcgint);
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begin
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{ here, since the sub and cmp are separate we need
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to move the result before subtract to help
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the register allocator
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}
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hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
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hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
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end;
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procedure genitem(t : pcaselabel);
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begin
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if assigned(t^.less) then
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genitem(t^.less);
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{ do we need to test the first value? }
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if first and (t^._low>get_min_value(left.resultdef)) then
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,thlcgwasm(hlcg).br_blocks-ElseBr);
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if t^._low=t^._high then
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begin
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if t^._low-last=0 then
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,thlcgwasm(hlcg).br_blocks-BlockBr(t^.blockid))
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else
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begin
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gensub(tcgint(t^._low.svalue-last.svalue));
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList,opsize,
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OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,thlcgwasm(hlcg).br_blocks-BlockBr(t^.blockid));
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end;
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last:=t^._low;
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end
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else
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begin
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{ it begins with the smallest label, if the value }
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{ is even smaller then jump immediately to the }
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{ ELSE-label }
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if first then
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begin
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{ have we to ajust the first value ? }
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if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
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gensub(tcgint(t^._low.svalue));
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end
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else
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begin
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{ if there is no unused label between the last and the }
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{ present label then the lower limit can be checked }
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{ immediately. else check the range in between: }
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gensub(tcgint(t^._low.svalue-last.svalue));
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,thlcgwasm(hlcg).br_blocks-ElseBr);
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end;
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gensub(tcgint(t^._high.svalue-t^._low.svalue));
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,thlcgwasm(hlcg).br_blocks-BlockBr(t^.blockid));
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last:=t^._high;
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end;
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first:=false;
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if assigned(t^.greater) then
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genitem(t^.greater);
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end;
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begin
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{ do we need to generate cmps? }
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if (with_sign and (min_label<0)) then
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genlinearcmplist(hp)
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else
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begin
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{ sign/zero extend the value to a full register before starting to
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subtract values, so that on platforms that don't have
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subregisters of the same size as the value we don't generate
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sign/zero-extensions after every subtraction
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make newsize always signed, since we only do this if the size in
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bytes of the register is larger than the original opsize, so
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the value can always be represented by a larger signed type }
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newsize:=tcgsize2signed[reg_cgsize(hregister)];
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if tcgsize2size[newsize]>opsize.size then
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begin
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newdef:=cgsize_orddef(newsize);
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scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
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hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
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hregister:=scratch_reg;
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opsize:=newdef;
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end;
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if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
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begin
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last:=0;
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first:=true;
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scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
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genitem(hp);
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end
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else
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begin
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{ If only one label exists, we can greatly simplify the checks to a simple comparison }
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if hp^._low=hp^._high then
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, thlcgwasm(hlcg).br_blocks-BlockBr(hp^.blockid))
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else
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begin
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scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
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gensub(tcgint(hp^._low.svalue));
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, thlcgwasm(hlcg).br_blocks-BlockBr(hp^.blockid))
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end;
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br,thlcgwasm(hlcg).br_blocks-ElseBr));
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end;
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end;
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procedure twasmcasenode.genlinearcmplist(hp : pcaselabel);
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var
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last : TConstExprInt;
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lastwasrange: boolean;
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procedure genitem(t : pcaselabel);
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begin
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if assigned(t^.less) then
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genitem(t^.less);
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if t^._low=t^._high then
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begin
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, thlcgwasm(hlcg).br_blocks-BlockBr(t^.blockid));
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{ Reset last here, because we've only checked for one value and need to compare
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for the next range both the lower and upper bound }
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lastwasrange := false;
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end
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else
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begin
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{ it begins with the smallest label, if the value }
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{ is even smaller then jump immediately to the }
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{ ELSE-label }
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if not lastwasrange or (t^._low-last>1) then
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister, thlcgwasm(hlcg).br_blocks-ElseBr);
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thlcgwasm(hlcg).a_cmp_const_reg_br(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, thlcgwasm(hlcg).br_blocks-BlockBr(t^.blockid));
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last:=t^._high;
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lastwasrange := true;
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end;
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if assigned(t^.greater) then
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genitem(t^.greater);
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end;
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begin
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last:=0;
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lastwasrange:=false;
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genitem(hp);
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current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br,thlcgwasm(hlcg).br_blocks-ElseBr));
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end;
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procedure twasmcasenode.pass_generate_code;
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var
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oldflowcontrol: tflowcontrol;
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ShortcutElse: Boolean;
|
||||
i: Integer;
|
||||
begin
|
||||
location_reset(location,LOC_VOID,OS_NO);
|
||||
|
||||
oldflowcontrol := flowcontrol;
|
||||
include(flowcontrol,fc_inflowcontrol);
|
||||
|
||||
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_block));
|
||||
thlcgwasm(hlcg).incblock;
|
||||
EndBr:=thlcgwasm(hlcg).br_blocks;
|
||||
|
||||
{ Do some optimisation to deal with empty else blocks }
|
||||
ShortcutElse := GetBranchBr(elseblock, ElseBr);
|
||||
|
||||
for i:=blocks.count-1 downto 0 do
|
||||
with pcaseblock(blocks[i])^ do
|
||||
shortcut := GetBranchBr(statement, BlockBr);
|
||||
|
||||
with_sign:=is_signed(left.resultdef);
|
||||
if with_sign then
|
||||
begin
|
||||
jmp_gt:=OC_GT;
|
||||
jmp_lt:=OC_LT;
|
||||
jmp_le:=OC_LTE;
|
||||
end
|
||||
else
|
||||
begin
|
||||
jmp_gt:=OC_A;
|
||||
jmp_lt:=OC_B;
|
||||
jmp_le:=OC_BE;
|
||||
end;
|
||||
|
||||
secondpass(left);
|
||||
if (left.expectloc=LOC_JUMP)<>
|
||||
(left.location.loc=LOC_JUMP) then
|
||||
internalerror(2006050501);
|
||||
{ determines the size of the operand }
|
||||
opsize:=left.resultdef;
|
||||
{ copy the case expression to a register }
|
||||
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
|
||||
{$if not defined(cpu64bitalu)}
|
||||
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
||||
begin
|
||||
hregister:=left.location.register64.reglo;
|
||||
hregister2:=left.location.register64.reghi;
|
||||
end
|
||||
else
|
||||
{$endif not cpu64bitalu and not cpuhighleveltarget}
|
||||
hregister:=left.location.register;
|
||||
|
||||
{ we need the min_label always to choose between }
|
||||
{ cmps and subs/decs }
|
||||
min_label:=case_get_min(labels);
|
||||
|
||||
{ Generate the jumps }
|
||||
{$ifdef OLDREGVARS}
|
||||
load_all_regvars(current_asmdata.CurrAsmList);
|
||||
{$endif OLDREGVARS}
|
||||
{$if not defined(cpu64bitalu)}
|
||||
if def_cgsize(opsize) in [OS_64,OS_S64] then
|
||||
genlinearcmplist(labels)
|
||||
else
|
||||
{$endif not cpu64bitalu and not cpuhighleveltarget}
|
||||
begin
|
||||
//if cs_opt_level1 in current_settings.optimizerswitches then
|
||||
// begin
|
||||
// { procedures are empirically passed on }
|
||||
// { consumption can also be calculated }
|
||||
// { but does it pay on the different }
|
||||
// { processors? }
|
||||
// { moreover can the size only be appro- }
|
||||
// { ximated as it is not known if rel8, }
|
||||
// { rel16 or rel32 jumps are used }
|
||||
//
|
||||
// max_label := case_get_max(labels);
|
||||
//
|
||||
// { can we omit the range check of the jump table ? }
|
||||
// getrange(left.resultdef,lv,hv);
|
||||
// jumptable_no_range:=(lv=min_label) and (hv=max_label);
|
||||
//
|
||||
// distv:=max_label-min_label;
|
||||
// if distv>=0 then
|
||||
// dist:=distv.uvalue
|
||||
// else
|
||||
// dist:=asizeuint(-distv.svalue);
|
||||
//
|
||||
// { optimize for size ? }
|
||||
// if cs_opt_size in current_settings.optimizerswitches then
|
||||
// begin
|
||||
// if has_jumptable and
|
||||
// (min_label>=int64(low(aint))) and
|
||||
// (max_label<=high(aint)) and
|
||||
// not((labelcnt<=2) or
|
||||
// (distv.svalue<0) or
|
||||
// (dist>3*labelcnt)) then
|
||||
// begin
|
||||
// { if the labels less or more a continuum then }
|
||||
// genjumptable(labels,min_label.svalue,max_label.svalue);
|
||||
// end
|
||||
// else
|
||||
// begin
|
||||
// { a linear list is always smaller than a jump tree }
|
||||
// genlinearlist(labels);
|
||||
// end;
|
||||
// end
|
||||
// else
|
||||
// begin
|
||||
// max_dist:=4*labelcoverage;
|
||||
//
|
||||
// { Don't allow jump tables to get too large }
|
||||
// if max_dist>4*labelcnt then
|
||||
// max_dist:=min(max_dist,2048);
|
||||
//
|
||||
// if jumptable_no_range then
|
||||
// max_linear_list:=4
|
||||
// else
|
||||
// max_linear_list:=2;
|
||||
//
|
||||
// { allow processor specific values }
|
||||
// optimizevalues(max_linear_list,max_dist);
|
||||
//
|
||||
// if (labelcnt<=max_linear_list) then
|
||||
// genlinearlist(labels)
|
||||
// else
|
||||
// begin
|
||||
// if (has_jumptable) and
|
||||
// (dist<max_dist) and
|
||||
// (min_label>=int64(low(aint))) and
|
||||
// (max_label<=high(aint)) then
|
||||
// genjumptable(labels,min_label.svalue,max_label.svalue)
|
||||
// { value has been determined on an i7-4770 using a random case with random values
|
||||
// if more values are known, this can be handled depending on the target CPU
|
||||
//
|
||||
// Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
|
||||
// a good value }
|
||||
// else if labelcnt>=64 then
|
||||
// genjmptree(labels)
|
||||
// else
|
||||
// genlinearlist(labels);
|
||||
// end;
|
||||
// end;
|
||||
// end
|
||||
//else
|
||||
{ it's always not bad }
|
||||
genlinearlist(labels);
|
||||
end;
|
||||
|
||||
{ generate the instruction blocks }
|
||||
for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
|
||||
begin
|
||||
{ If the labels are not equal, then the block label has been shortcut to point elsewhere,
|
||||
so there's no need to implement it }
|
||||
if not shortcut then
|
||||
begin
|
||||
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_block));
|
||||
thlcgwasm(hlcg).decblock;
|
||||
secondpass(statement);
|
||||
{ don't come back to case line }
|
||||
current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
|
||||
{$ifdef OLDREGVARS}
|
||||
load_all_regvars(current_asmdata.CurrAsmList);
|
||||
{$endif OLDREGVARS}
|
||||
current_asmdata.CurrAsmList.concat(taicpu.op_const(a_br,thlcgwasm(hlcg).br_blocks-EndBr));
|
||||
end;
|
||||
end;
|
||||
|
||||
{ ...and the else block }
|
||||
if not ShortcutElse then
|
||||
begin
|
||||
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_block));
|
||||
thlcgwasm(hlcg).decblock;
|
||||
end;
|
||||
|
||||
if Assigned(elseblock) then
|
||||
begin
|
||||
|
||||
secondpass(elseblock);
|
||||
{$ifdef OLDREGVARS}
|
||||
load_all_regvars(current_asmdata.CurrAsmList);
|
||||
{$endif OLDREGVARS}
|
||||
end;
|
||||
|
||||
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_block));
|
||||
thlcgwasm(hlcg).decblock;
|
||||
|
||||
flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
|
||||
end;
|
||||
|
||||
begin
|
||||
ccasenode:=twasmcasenode;
|
||||
end.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user