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* Add BTR to destination memory location check in spilling

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daniel 2003-09-12 20:25:17 +00:00
parent 90e1ca64f3
commit c82243df4d
1 changed files with 5 additions and 2 deletions
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7
compiler/x86/aasmcpu.pas
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@ -2145,7 +2145,7 @@ implementation
{The i386 instruction set never gets boring... IMUL does {The i386 instruction set never gets boring... IMUL does
not support a memory location as destination. Check if not support a memory location as destination. Check if
the opcode is IMUL and fix it. (DM)} the opcode is IMUL and fix it. (DM)}
if (opcode=A_IMUL) or (opcode=A_BTS) then if (opcode=A_IMUL) or (opcode=A_BTS) or (opcode=A_BTR) then
begin begin
{Yikes! We just changed the destination register into {Yikes! We just changed the destination register into
a memory location above here. a memory location above here.
@ -2234,7 +2234,10 @@ implementation
end. end.
{ {
$Log$ $Log$
Revision 1.21 2003-09-10 19:14:31 daniel Revision 1.22 2003-09-12 20:25:17 daniel
* Add BTR to destination memory location check in spilling
Revision 1.21 2003/09/10 19:14:31 daniel
* Failed attempt to restore broken fastspill functionality * Failed attempt to restore broken fastspill functionality
Revision 1.20 2003/09/10 11:23:09 marco Revision 1.20 2003/09/10 11:23:09 marco