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* another couple of arm fixed

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This commit is contained in:
florian 2004-10-31 12:37:11 +00:00
parent ddcc136686
commit c8d7f6be2b
3 changed files with 46 additions and 43 deletions

37
compiler/arm/cgcpu.pas
View File

@ -91,8 +91,6 @@ unit cgcpu;
procedure g_save_standard_registers(list : taasmoutput);override;
procedure g_restore_standard_registers(list : taasmoutput);override;
procedure g_save_all_registers(list : taasmoutput);override;
procedure g_restore_all_registers(list : taasmoutput;const funcretparaloc:TCGPara);override;
procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
procedure fixref(list : taasmoutput;var ref : treference);
@ -110,7 +108,7 @@ unit cgcpu;
OpCmp2AsmCond : Array[topcmp] of TAsmCond = (C_NONE,C_EQ,C_GT,
C_LT,C_GE,C_LE,C_NE,C_LS,C_CC,C_CS,C_HI);
function is_shifter_const(d : dword;var imm_shift : byte) : boolean;
function is_shifter_const(d : aint;var imm_shift : byte) : boolean;
function get_fpu_postfix(def : tdef) : toppostfix;
@ -297,7 +295,7 @@ unit cgcpu;
so : tshifterop;
l1 : longint;
begin
if is_shifter_const(dword(-a),shift) then
if is_shifter_const(-a,shift) then
case op of
OP_ADD:
begin
@ -445,13 +443,13 @@ unit cgcpu;
end;
function is_shifter_const(d : dword;var imm_shift : byte) : boolean;
function is_shifter_const(d : aint;var imm_shift : byte) : boolean;
var
i : longint;
begin
for i:=0 to 15 do
begin
if (d and not(rotl($ff,i*2)))=0 then
if (dword(d) and not(rotl($ff,i*2)))=0 then
begin
imm_shift:=i*2;
result:=true;
@ -470,9 +468,9 @@ unit cgcpu;
begin
if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
internalerror(2002090902);
if is_shifter_const(dword(a),imm_shift) then
if is_shifter_const(a,imm_shift) then
list.concat(taicpu.op_reg_const(A_MOV,reg,a))
else if is_shifter_const(dword(not(a)),imm_shift) then
else if is_shifter_const(not(a),imm_shift) then
list.concat(taicpu.op_reg_const(A_MVN,reg,not(a)))
else
begin
@ -779,7 +777,7 @@ unit cgcpu;
list.concat(taicpu.op_reg_const(A_CMP,reg,a))
{ CMN reg,0 and CMN reg,$80000000 are different from CMP reg,$ffffffff
and CMP reg,$7fffffff regarding the flags according to the ARM manual }
else if is_shifter_const(-a,b) and (a<>$7fffffff) and (a<>$ffffffff) then
else if (a<>$7fffffff) and (a<>-1) and is_shifter_const(-a,b) then
list.concat(taicpu.op_reg_const(A_CMN,reg,-a))
else
begin
@ -1144,25 +1142,13 @@ unit cgcpu;
procedure tcgarm.g_save_standard_registers(list : taasmoutput);
begin
{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
{ this work is done in g_proc_entry }
end;
procedure tcgarm.g_restore_standard_registers(list : taasmoutput);
begin
{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
end;
procedure tcgarm.g_save_all_registers(list : taasmoutput);
begin
{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
end;
procedure tcgarm.g_restore_all_registers(list : taasmoutput;const funcretparaloc:TCGPara);
begin
{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
{ this work is done in g_proc_exit }
end;
@ -1291,7 +1277,10 @@ begin
end.
{
$Log$
Revision 1.58 2004-10-24 17:32:53 florian
Revision 1.59 2004-10-31 12:37:11 florian
* another couple of arm fixed
Revision 1.58 2004/10/24 17:32:53 florian
* fixed several arm compiler bugs
Revision 1.57 2004/10/24 11:53:45 peter

8
compiler/arm/cpubase.pas
View File

@ -427,7 +427,8 @@ unit cpubase;
This value can be deduced from the CALLED_USED_REGISTERS array in the
GCC source.
}
std_saved_registers = [RS_R4..RS_R10];
saved_standard_registers : array[0..6] of tsuperregister =
(RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,RS_R10);
{ Required parameter alignment when calling a routine declared as
stdcall and cdecl. The alignment value should be the one defined
by GCC or the target ABI.
@ -564,7 +565,10 @@ unit cpubase;
end.
{
$Log$
Revision 1.34 2004-10-24 17:32:53 florian
Revision 1.35 2004-10-31 12:37:11 florian
* another couple of arm fixed
Revision 1.34 2004/10/24 17:32:53 florian
* fixed several arm compiler bugs
Revision 1.33 2004/10/22 16:36:57 florian

44
compiler/arm/cpupara.pas
View File

@ -79,6 +79,7 @@ unit cpupara;
paraloc:=cgpara.add_location;
with paraloc^ do
begin
size:=OS_INT;
{ the four first parameters are passed into registers }
if nr<=4 then
begin
@ -269,6 +270,10 @@ unit cpupara;
end;
paralen:=tcgsize2size[paracgsize];
{$ifdef EXTDEBUG}
if paralen=0 then
internalerror(200410311);
{$endif EXTDEBUG}
while paralen>0 do
begin
paraloc:=hp.paraloc[side].add_location;
@ -395,24 +400,26 @@ unit cpupara;
end
{ Return in register? }
else if not ret_in_param(p.rettype.def,p.proccalloption) then
begin
paraloc^.loc:=LOC_REGISTER;
if paraloc^.size in [OS_64,OS_S64] then
begin
{ low }
paraloc^.loc:=LOC_REGISTER;
paraloc^.size:=OS_32;
paraloc^.register:=NR_FUNCTION_RESULT64_LOW_REG;
begin
if retcgsize in [OS_64,OS_S64] then
begin
{ low }
paraloc^.loc:=LOC_REGISTER;
paraloc^.size:=OS_32;
paraloc^.register:=NR_FUNCTION_RESULT64_LOW_REG;
{ high }
paraloc:=p.funcret_paraloc[side].add_location;
paraloc^.loc:=LOC_REGISTER;
paraloc^.size:=OS_32;
paraloc^.register:=NR_FUNCTION_RESULT64_HIGH_REG;
end
else
{ high }
paraloc:=p.funcret_paraloc[side].add_location;
paraloc^.loc:=LOC_REGISTER;
paraloc^.size:=OS_32;
paraloc^.register:=NR_FUNCTION_RESULT64_HIGH_REG;
end
else
begin
paraloc^.loc:=LOC_REGISTER;
paraloc^.register:=NR_FUNCTION_RETURN_REG;
end
end;
end
else
begin
paraloc^.loc:=LOC_REFERENCE;
@ -463,7 +470,10 @@ begin
end.
{
$Log$
Revision 1.22 2004-10-24 17:32:53 florian
Revision 1.23 2004-10-31 12:37:11 florian
* another couple of arm fixed
Revision 1.22 2004/10/24 17:32:53 florian
* fixed several arm compiler bugs
Revision 1.21 2004/10/24 07:54:25 florian