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synced 2025-06-24 11:38:20 +02:00
* another couple of arm fixed
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ddcc136686
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c8d7f6be2b
@ -91,8 +91,6 @@ unit cgcpu;
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procedure g_save_standard_registers(list : taasmoutput);override;
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procedure g_save_standard_registers(list : taasmoutput);override;
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procedure g_restore_standard_registers(list : taasmoutput);override;
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procedure g_restore_standard_registers(list : taasmoutput);override;
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procedure g_save_all_registers(list : taasmoutput);override;
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procedure g_restore_all_registers(list : taasmoutput;const funcretparaloc:TCGPara);override;
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procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
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procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
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procedure fixref(list : taasmoutput;var ref : treference);
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procedure fixref(list : taasmoutput;var ref : treference);
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@ -110,7 +108,7 @@ unit cgcpu;
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OpCmp2AsmCond : Array[topcmp] of TAsmCond = (C_NONE,C_EQ,C_GT,
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OpCmp2AsmCond : Array[topcmp] of TAsmCond = (C_NONE,C_EQ,C_GT,
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C_LT,C_GE,C_LE,C_NE,C_LS,C_CC,C_CS,C_HI);
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C_LT,C_GE,C_LE,C_NE,C_LS,C_CC,C_CS,C_HI);
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function is_shifter_const(d : dword;var imm_shift : byte) : boolean;
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function is_shifter_const(d : aint;var imm_shift : byte) : boolean;
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function get_fpu_postfix(def : tdef) : toppostfix;
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function get_fpu_postfix(def : tdef) : toppostfix;
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@ -297,7 +295,7 @@ unit cgcpu;
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so : tshifterop;
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so : tshifterop;
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l1 : longint;
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l1 : longint;
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begin
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begin
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if is_shifter_const(dword(-a),shift) then
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if is_shifter_const(-a,shift) then
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case op of
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case op of
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OP_ADD:
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OP_ADD:
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begin
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begin
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@ -445,13 +443,13 @@ unit cgcpu;
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end;
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end;
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function is_shifter_const(d : dword;var imm_shift : byte) : boolean;
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function is_shifter_const(d : aint;var imm_shift : byte) : boolean;
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var
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var
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i : longint;
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i : longint;
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begin
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begin
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for i:=0 to 15 do
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for i:=0 to 15 do
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begin
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begin
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if (d and not(rotl($ff,i*2)))=0 then
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if (dword(d) and not(rotl($ff,i*2)))=0 then
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begin
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begin
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imm_shift:=i*2;
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imm_shift:=i*2;
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result:=true;
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result:=true;
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@ -470,9 +468,9 @@ unit cgcpu;
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begin
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begin
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if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
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if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
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internalerror(2002090902);
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internalerror(2002090902);
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if is_shifter_const(dword(a),imm_shift) then
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if is_shifter_const(a,imm_shift) then
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list.concat(taicpu.op_reg_const(A_MOV,reg,a))
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list.concat(taicpu.op_reg_const(A_MOV,reg,a))
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else if is_shifter_const(dword(not(a)),imm_shift) then
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else if is_shifter_const(not(a),imm_shift) then
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list.concat(taicpu.op_reg_const(A_MVN,reg,not(a)))
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list.concat(taicpu.op_reg_const(A_MVN,reg,not(a)))
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else
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else
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begin
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begin
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@ -779,7 +777,7 @@ unit cgcpu;
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list.concat(taicpu.op_reg_const(A_CMP,reg,a))
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list.concat(taicpu.op_reg_const(A_CMP,reg,a))
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{ CMN reg,0 and CMN reg,$80000000 are different from CMP reg,$ffffffff
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{ CMN reg,0 and CMN reg,$80000000 are different from CMP reg,$ffffffff
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and CMP reg,$7fffffff regarding the flags according to the ARM manual }
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and CMP reg,$7fffffff regarding the flags according to the ARM manual }
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else if is_shifter_const(-a,b) and (a<>$7fffffff) and (a<>$ffffffff) then
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else if (a<>$7fffffff) and (a<>-1) and is_shifter_const(-a,b) then
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list.concat(taicpu.op_reg_const(A_CMN,reg,-a))
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list.concat(taicpu.op_reg_const(A_CMN,reg,-a))
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else
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else
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begin
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begin
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@ -1144,25 +1142,13 @@ unit cgcpu;
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procedure tcgarm.g_save_standard_registers(list : taasmoutput);
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procedure tcgarm.g_save_standard_registers(list : taasmoutput);
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begin
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begin
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{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
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{ this work is done in g_proc_entry }
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end;
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end;
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procedure tcgarm.g_restore_standard_registers(list : taasmoutput);
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procedure tcgarm.g_restore_standard_registers(list : taasmoutput);
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begin
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begin
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{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
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{ this work is done in g_proc_exit }
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end;
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procedure tcgarm.g_save_all_registers(list : taasmoutput);
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begin
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{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
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end;
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procedure tcgarm.g_restore_all_registers(list : taasmoutput;const funcretparaloc:TCGPara);
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begin
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{ we support only ARM standard calling conventions so this procedure has no use on the ARM }
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end;
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end;
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@ -1291,7 +1277,10 @@ begin
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.58 2004-10-24 17:32:53 florian
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Revision 1.59 2004-10-31 12:37:11 florian
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* another couple of arm fixed
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Revision 1.58 2004/10/24 17:32:53 florian
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* fixed several arm compiler bugs
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* fixed several arm compiler bugs
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Revision 1.57 2004/10/24 11:53:45 peter
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Revision 1.57 2004/10/24 11:53:45 peter
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@ -427,7 +427,8 @@ unit cpubase;
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This value can be deduced from the CALLED_USED_REGISTERS array in the
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This value can be deduced from the CALLED_USED_REGISTERS array in the
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GCC source.
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GCC source.
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}
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}
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std_saved_registers = [RS_R4..RS_R10];
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saved_standard_registers : array[0..6] of tsuperregister =
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(RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,RS_R10);
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{ Required parameter alignment when calling a routine declared as
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{ Required parameter alignment when calling a routine declared as
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stdcall and cdecl. The alignment value should be the one defined
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stdcall and cdecl. The alignment value should be the one defined
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by GCC or the target ABI.
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by GCC or the target ABI.
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@ -564,7 +565,10 @@ unit cpubase;
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.34 2004-10-24 17:32:53 florian
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Revision 1.35 2004-10-31 12:37:11 florian
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* another couple of arm fixed
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Revision 1.34 2004/10/24 17:32:53 florian
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* fixed several arm compiler bugs
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* fixed several arm compiler bugs
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Revision 1.33 2004/10/22 16:36:57 florian
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Revision 1.33 2004/10/22 16:36:57 florian
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@ -79,6 +79,7 @@ unit cpupara;
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paraloc:=cgpara.add_location;
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paraloc:=cgpara.add_location;
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with paraloc^ do
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with paraloc^ do
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begin
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begin
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size:=OS_INT;
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{ the four first parameters are passed into registers }
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{ the four first parameters are passed into registers }
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if nr<=4 then
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if nr<=4 then
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begin
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begin
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@ -269,6 +270,10 @@ unit cpupara;
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end;
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end;
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paralen:=tcgsize2size[paracgsize];
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paralen:=tcgsize2size[paracgsize];
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{$ifdef EXTDEBUG}
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if paralen=0 then
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internalerror(200410311);
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{$endif EXTDEBUG}
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while paralen>0 do
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while paralen>0 do
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begin
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begin
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paraloc:=hp.paraloc[side].add_location;
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paraloc:=hp.paraloc[side].add_location;
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@ -395,24 +400,26 @@ unit cpupara;
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end
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end
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{ Return in register? }
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{ Return in register? }
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else if not ret_in_param(p.rettype.def,p.proccalloption) then
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else if not ret_in_param(p.rettype.def,p.proccalloption) then
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begin
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begin
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paraloc^.loc:=LOC_REGISTER;
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if retcgsize in [OS_64,OS_S64] then
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if paraloc^.size in [OS_64,OS_S64] then
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begin
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begin
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{ low }
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{ low }
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paraloc^.loc:=LOC_REGISTER;
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paraloc^.loc:=LOC_REGISTER;
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paraloc^.size:=OS_32;
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paraloc^.size:=OS_32;
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paraloc^.register:=NR_FUNCTION_RESULT64_LOW_REG;
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paraloc^.register:=NR_FUNCTION_RESULT64_LOW_REG;
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{ high }
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{ high }
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paraloc:=p.funcret_paraloc[side].add_location;
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paraloc:=p.funcret_paraloc[side].add_location;
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paraloc^.loc:=LOC_REGISTER;
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paraloc^.loc:=LOC_REGISTER;
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paraloc^.size:=OS_32;
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paraloc^.size:=OS_32;
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paraloc^.register:=NR_FUNCTION_RESULT64_HIGH_REG;
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paraloc^.register:=NR_FUNCTION_RESULT64_HIGH_REG;
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end
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end
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else
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else
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begin
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paraloc^.loc:=LOC_REGISTER;
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paraloc^.register:=NR_FUNCTION_RETURN_REG;
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paraloc^.register:=NR_FUNCTION_RETURN_REG;
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end
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end;
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end
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else
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else
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begin
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begin
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paraloc^.loc:=LOC_REFERENCE;
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paraloc^.loc:=LOC_REFERENCE;
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@ -463,7 +470,10 @@ begin
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.22 2004-10-24 17:32:53 florian
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Revision 1.23 2004-10-31 12:37:11 florian
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* another couple of arm fixed
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Revision 1.22 2004/10/24 17:32:53 florian
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* fixed several arm compiler bugs
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* fixed several arm compiler bugs
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Revision 1.21 2004/10/24 07:54:25 florian
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Revision 1.21 2004/10/24 07:54:25 florian
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