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* Changed register allocation order for x86_64, putting first registers that don't need to be preserved by procedure. This way registers needing preservation are allocated less frequently (and for non-complex leaf functions not allocated at all), reducing amount of entry/exit code.

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git-svn-id: trunk@17284 -
This commit is contained in:
sergei 2011-04-10 18:04:17 +00:00
parent 1d07ae97c4
commit c939beee70
1 changed files with 7 additions and 2 deletions
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9
compiler/x86_64/cgcpu.pas
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@ -90,8 +90,13 @@ unit cgcpu;
else
{ in intf. wrapper code generation }
framepointer:=RS_FRAME_POINTER_REG;
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_RAX,RS_RDX,RS_RCX,RS_RBX,RS_RSI,RS_RDI,
RS_R8,RS_R9,RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15],first_int_imreg,[framepointer]);
if target_info.system=system_x86_64_win64 then
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_RAX,RS_RDX,RS_RCX,RS_R8,RS_R9,RS_R10,
RS_R11,RS_RBX,RS_RSI,RS_RDI,RS_R12,RS_R13,RS_R14,RS_R15],first_int_imreg,[framepointer])
else
rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_RAX,RS_RDX,RS_RCX,RS_RSI,RS_RDI,RS_R8,
RS_R9,RS_R10,RS_R11,RS_RBX,RS_R12,RS_R13,RS_R14,RS_R15],first_int_imreg,[framepointer]);
rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBWHOLE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7,
RS_XMM8,RS_XMM9,RS_XMM10,RS_XMM11,RS_XMM12,RS_XMM13,RS_XMM14,RS_XMM15],first_mm_imreg,[]);
rgfpu:=Trgx86fpu.create;