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+ RiscV: handle rol(w) in the assembler optimizer

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florian 2025-03-23 23:04:17 +01:00
parent 0d5dddfcb5
commit cafaa9f5b8
1 changed files with 2 additions and 0 deletions
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compiler/riscv/aoptcpurv.pas
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@ -916,10 +916,12 @@ implementation
A_SLLW, A_SLLW,
A_SRLW, A_SRLW,
A_SRAW, A_SRAW,
A_ROLW,
{$endif riscv64} {$endif riscv64}
A_SLL, A_SLL,
A_SRL, A_SRL,
A_SRA, A_SRA,
A_ROL,
A_NEG, A_NEG,
A_NOT: A_NOT:
result:=OptPass1OP(p); result:=OptPass1OP(p);