mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-16 10:39:18 +02:00
Refactoring of OptPass2Movx to remove goto
This commit is contained in:
J. Gareth "Curious Kit" Moreton
J. Gareth "Kit" Moreton
parent
9894fe8082
commit
cafd708b6d
@ -7939,9 +7939,6 @@ unit aoptx86;
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{$push}
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{$push}
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{$q-}{$r-}
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{$q-}{$r-}
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function TX86AsmOptimizer.OptPass2Movx(var p : tai) : boolean;
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function TX86AsmOptimizer.OptPass2Movx(var p : tai) : boolean;
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label
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{ This label permits the case block for MOVSX/D to pass into the MOVZX block }
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movzx_cascade;
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var
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var
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ThisReg: TRegister;
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ThisReg: TRegister;
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MinSize, MaxSize, TryShiftDown, TargetSize: TOpSize;
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MinSize, MaxSize, TryShiftDown, TargetSize: TOpSize;
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@ -8034,6 +8031,278 @@ unit aoptx86;
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end;
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end;
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end;
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end;
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function CompressInstructions: Boolean;
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var
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LocalIndex: Integer;
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begin
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Result := False;
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{ The objective here is to try to find a combination that
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removes one of the MOV/Z instructions. }
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if (
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(taicpu(p).oper[0]^.typ <> top_reg) or
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not SuperRegistersEqual(taicpu(p).oper[0]^.reg, ThisReg)
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) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, ThisReg) then
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begin
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{ Make a preference to remove the second MOVZX instruction }
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case taicpu(hp1).opsize of
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S_BL, S_WL:
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begin
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TargetSize := S_L;
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TargetSubReg := R_SUBD;
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end;
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S_BW:
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begin
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TargetSize := S_W;
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TargetSubReg := R_SUBW;
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end;
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else
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InternalError(2020112302);
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end;
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end
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else
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begin
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if LowerUnsignedOverflow and not UpperUnsignedOverflow then
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begin
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{ Exceeded lower bound but not upper bound }
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TargetSize := MaxSize;
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end
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else if not LowerUnsignedOverflow then
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begin
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{ Size didn't exceed lower bound }
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TargetSize := MinSize;
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end
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else
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Exit;
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end;
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case TargetSize of
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S_B:
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TargetSubReg := R_SUBL;
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S_W:
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TargetSubReg := R_SUBW;
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S_L:
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TargetSubReg := R_SUBD;
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else
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InternalError(2020112350);
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end;
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{ Update the register to its new size }
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setsubreg(ThisReg, TargetSubReg);
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if not SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, ThisReg) then
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begin
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{ Check to see if the active register is used afterwards;
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if not, we can change it and make a saving. }
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RegInUse := False;
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TransferUsedRegs(TmpUsedRegs);
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{ The target register may be marked as in use to cross
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a jump to a distant label, so exclude it }
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ExcludeRegFromUsedRegs(taicpu(hp1).oper[1]^.reg, TmpUsedRegs);
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hp2 := p;
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repeat
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{ Explicitly check for the excluded register (don't include the first
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instruction as it may be reading from here }
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if ((p <> hp2) and (RegInInstruction(taicpu(hp1).oper[1]^.reg, hp2))) or
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RegInUsedRegs(taicpu(hp1).oper[1]^.reg, TmpUsedRegs) then
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begin
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RegInUse := True;
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Break;
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end;
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UpdateUsedRegs(TmpUsedRegs, tai(hp2.next));
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if not GetNextInstruction(hp2, hp2) then
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InternalError(2020112340);
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until (hp2 = hp1);
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if not RegInUse and RegUsedAfterInstruction(ThisReg, hp1, TmpUsedRegs) then
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{ We might still be able to get away with this }
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RegInUse := not
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(
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GetNextInstructionUsingReg(hp1, hp2, ThisReg) and
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(hp2.typ = ait_instruction) and
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(
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{ Under -O1 and -O2, GetNextInstructionUsingReg may return an
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instruction that doesn't actually contain ThisReg }
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(cs_opt_level3 in current_settings.optimizerswitches) or
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RegInInstruction(ThisReg, hp2)
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) and
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RegLoadedWithNewValue(ThisReg, hp2)
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);
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if not RegInUse then
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begin
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{ Force the register size to the same as this instruction so it can be removed}
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if (taicpu(hp1).opsize in [S_L, S_BL, S_WL]) then
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begin
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TargetSize := S_L;
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TargetSubReg := R_SUBD;
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end
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else if (taicpu(hp1).opsize in [S_W, S_BW]) then
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begin
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TargetSize := S_W;
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TargetSubReg := R_SUBW;
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end;
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ThisReg := taicpu(hp1).oper[1]^.reg;
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setsubreg(ThisReg, TargetSubReg);
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RegChanged := True;
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DebugMsg(SPeepholeOptimization + 'Simplified register usage so ' + debug_regname(ThisReg) + ' = ' + debug_regname(taicpu(p).oper[1]^.reg), p);
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TransferUsedRegs(TmpUsedRegs);
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AllocRegBetween(ThisReg, p, hp1, TmpUsedRegs);
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DebugMsg(SPeepholeOptimization + 'Movzx2Nop 3', hp1);
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if p = hp1 then
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begin
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RemoveCurrentp(p); { p = hp1 and will then become the next instruction }
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p_removed := True;
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end
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else
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RemoveInstruction(hp1);
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{ Instruction will become "mov %reg,%reg" }
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if not p_removed and (taicpu(p).opcode = A_MOV) and
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MatchOperand(taicpu(p).oper[0]^, ThisReg) then
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begin
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DebugMsg(SPeepholeOptimization + 'Movzx2Nop 6', p);
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RemoveCurrentP(p);
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p_removed := True;
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end
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else
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taicpu(p).oper[1]^.reg := ThisReg;
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Result := True;
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end
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else
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begin
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if TargetSize <> MaxSize then
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begin
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{ Since the register is in use, we have to force it to
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MaxSize otherwise part of it may become undefined later on }
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TargetSize := MaxSize;
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case TargetSize of
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S_B:
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TargetSubReg := R_SUBL;
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S_W:
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TargetSubReg := R_SUBW;
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S_L:
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TargetSubReg := R_SUBD;
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else
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InternalError(2020112351);
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end;
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setsubreg(ThisReg, TargetSubReg);
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end;
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AdjustFinalLoad;
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end;
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end
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else
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AdjustFinalLoad;
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if not p_removed then
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begin
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if TargetSize = MinSize then
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begin
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{ Convert the input MOVZX to a MOV }
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if (taicpu(p).oper[0]^.typ = top_reg) and
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SuperRegistersEqual(taicpu(p).oper[0]^.reg, ThisReg) then
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begin
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{ Or remove it completely! }
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DebugMsg(SPeepholeOptimization + 'Movzx2Nop 1', p);
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DebugMsg(SPeepholeOptimization + tostr(InstrMax), p);
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RemoveCurrentP(p);
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p_removed := True;
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end
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else
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begin
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DebugMsg(SPeepholeOptimization + 'Movzx2Mov 1', p);
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taicpu(p).opcode := A_MOV;
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taicpu(p).oper[1]^.reg := ThisReg;
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taicpu(p).opsize := TargetSize;
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end;
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Result := True;
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end
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else if TargetSize <> MaxSize then
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begin
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case MaxSize of
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S_L:
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if TargetSize = S_W then
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begin
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DebugMsg(SPeepholeOptimization + 'movzbl2movzbw', p);
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taicpu(p).opsize := S_BW;
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taicpu(p).oper[1]^.reg := ThisReg;
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Result := True;
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end
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else
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InternalError(2020112341);
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S_W:
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if TargetSize = S_L then
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begin
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DebugMsg(SPeepholeOptimization + 'movzbw2movzbl', p);
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taicpu(p).opsize := S_BL;
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taicpu(p).oper[1]^.reg := ThisReg;
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Result := True;
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end
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else
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InternalError(2020112342);
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else
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;
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end;
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end;
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end;
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{ Now go through every instruction we found and change the
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size. If TargetSize = MaxSize, then almost no changes are
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needed and Result can remain False if it hasn't been set
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yet.
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If RegChanged is True, then the register requires changing
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and so the point about TargetSize = MaxSize doesn't apply. }
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if ((TargetSize <> MaxSize) or RegChanged) and (InstrMax >= 0) then
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begin
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for LocalIndex := 0 to InstrMax do
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begin
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{ If p_removed is true, then the original MOV/Z was removed
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and removing the AND instruction may not be safe if it
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appears first }
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if (InstrList[LocalIndex].oper[InstrList[LocalIndex].ops - 1]^.typ <> top_reg) then
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InternalError(2020112310);
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if InstrList[LocalIndex].oper[0]^.typ = top_reg then
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InstrList[LocalIndex].oper[0]^.reg := ThisReg;
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InstrList[LocalIndex].oper[InstrList[LocalIndex].ops - 1]^.reg := ThisReg;
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InstrList[LocalIndex].opsize := TargetSize;
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end;
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Result := True;
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end;
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end;
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begin
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begin
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Result := False;
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Result := False;
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p_removed := False;
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p_removed := False;
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@ -8671,7 +8940,7 @@ unit aoptx86;
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}
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}
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{$ifdef x86_64}
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{$ifdef x86_64}
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if (taicpu(hp1).opcode = A_MOVSXD) and SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, ThisReg) then
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if (taicpu(hp1).opsize = S_LQ) and SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, ThisReg) then
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begin
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begin
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{ this becomes a zero extension from 32-bit to 64-bit, but
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{ this becomes a zero extension from 32-bit to 64-bit, but
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the upper 32 bits are already zero, so just delete the
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the upper 32 bits are already zero, so just delete the
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@ -8715,10 +8984,8 @@ unit aoptx86;
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;
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;
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end;
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end;
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{$endif x86_64}
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{$endif x86_64}
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Result := True;
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Result := CompressInstructions;
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Exit;
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{ Enter the A_MOVZX block below }
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goto movzx_cascade;
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end;
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end;
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end;
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end;
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@ -8729,11 +8996,9 @@ unit aoptx86;
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if not SuperRegistersEqual(taicpu(hp1).oper[0]^.reg, ThisReg) then
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if not SuperRegistersEqual(taicpu(hp1).oper[0]^.reg, ThisReg) then
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begin
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begin
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{ Because hp1 was obtained via GetNextInstructionUsingReg
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and ThisReg doesn't appear in the first operand, it
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must appear in the second operand and hence gets
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overwritten }
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if (InstrMax = -1) and
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if (InstrMax = -1) and
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{ Will return false if the second parameter isn't ThisReg
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(can happen on -O2 and under) }
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Reg1WriteOverwritesReg2Entirely(taicpu(hp1).oper[1]^.reg, ThisReg) then
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Reg1WriteOverwritesReg2Entirely(taicpu(hp1).oper[1]^.reg, ThisReg) then
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begin
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begin
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{ The two MOVZX instructions are adjacent, so remove the first one }
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{ The two MOVZX instructions are adjacent, so remove the first one }
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@ -8746,272 +9011,7 @@ unit aoptx86;
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Break;
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Break;
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end;
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end;
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movzx_cascade:
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Result := CompressInstructions;
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{ The objective here is to try to find a combination that
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removes one of the MOV/Z instructions. }
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if (
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(taicpu(p).oper[0]^.typ <> top_reg) or
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not SuperRegistersEqual(taicpu(p).oper[0]^.reg, ThisReg)
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) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, ThisReg) then
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begin
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{ Make a preference to remove the second MOVZX instruction }
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case taicpu(hp1).opsize of
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S_BL, S_WL:
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begin
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TargetSize := S_L;
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TargetSubReg := R_SUBD;
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end;
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S_BW:
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begin
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TargetSize := S_W;
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TargetSubReg := R_SUBW;
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end;
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else
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InternalError(2020112302);
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end;
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end
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else
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begin
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if LowerUnsignedOverflow and not UpperUnsignedOverflow then
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begin
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{ Exceeded lower bound but not upper bound }
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TargetSize := MaxSize;
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end
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else if not LowerUnsignedOverflow then
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begin
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{ Size didn't exceed lower bound }
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TargetSize := MinSize;
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end
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else
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Break;
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end;
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case TargetSize of
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S_B:
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TargetSubReg := R_SUBL;
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S_W:
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TargetSubReg := R_SUBW;
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S_L:
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TargetSubReg := R_SUBD;
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else
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InternalError(2020112350);
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end;
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{ Update the register to its new size }
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setsubreg(ThisReg, TargetSubReg);
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if not SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, ThisReg) then
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begin
|
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|
|
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{ Check to see if the active register is used afterwards;
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if not, we can change it and make a saving. }
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||||||
|
|
||||||
RegInUse := False;
|
|
||||||
TransferUsedRegs(TmpUsedRegs);
|
|
||||||
|
|
||||||
{ The target register may be marked as in use to cross
|
|
||||||
a jump to a distant label, so exclude it }
|
|
||||||
ExcludeRegFromUsedRegs(taicpu(hp1).oper[1]^.reg, TmpUsedRegs);
|
|
||||||
|
|
||||||
hp2 := p;
|
|
||||||
repeat
|
|
||||||
|
|
||||||
{ Explicitly check for the excluded register (don't include the first
|
|
||||||
instruction as it may be reading from here }
|
|
||||||
if ((p <> hp2) and (RegInInstruction(taicpu(hp1).oper[1]^.reg, hp2))) or
|
|
||||||
RegInUsedRegs(taicpu(hp1).oper[1]^.reg, TmpUsedRegs) then
|
|
||||||
begin
|
|
||||||
RegInUse := True;
|
|
||||||
Break;
|
|
||||||
end;
|
|
||||||
|
|
||||||
UpdateUsedRegs(TmpUsedRegs, tai(hp2.next));
|
|
||||||
|
|
||||||
if not GetNextInstruction(hp2, hp2) then
|
|
||||||
InternalError(2020112340);
|
|
||||||
|
|
||||||
until (hp2 = hp1);
|
|
||||||
|
|
||||||
if not RegInUse and RegUsedAfterInstruction(ThisReg, hp1, TmpUsedRegs) then
|
|
||||||
{ We might still be able to get away with this }
|
|
||||||
RegInUse := not
|
|
||||||
(
|
|
||||||
GetNextInstructionUsingReg(hp1, hp2, ThisReg) and
|
|
||||||
(hp2.typ = ait_instruction) and
|
|
||||||
(
|
|
||||||
{ Under -O1 and -O2, GetNextInstructionUsingReg may return an
|
|
||||||
instruction that doesn't actually contain ThisReg }
|
|
||||||
(cs_opt_level3 in current_settings.optimizerswitches) or
|
|
||||||
RegInInstruction(ThisReg, hp2)
|
|
||||||
) and
|
|
||||||
RegLoadedWithNewValue(ThisReg, hp2)
|
|
||||||
);
|
|
||||||
|
|
||||||
if not RegInUse then
|
|
||||||
begin
|
|
||||||
{ Force the register size to the same as this instruction so it can be removed}
|
|
||||||
if (taicpu(hp1).opsize in [S_L, S_BL, S_WL]) then
|
|
||||||
begin
|
|
||||||
TargetSize := S_L;
|
|
||||||
TargetSubReg := R_SUBD;
|
|
||||||
end
|
|
||||||
else if (taicpu(hp1).opsize in [S_W, S_BW]) then
|
|
||||||
begin
|
|
||||||
TargetSize := S_W;
|
|
||||||
TargetSubReg := R_SUBW;
|
|
||||||
end;
|
|
||||||
|
|
||||||
ThisReg := taicpu(hp1).oper[1]^.reg;
|
|
||||||
setsubreg(ThisReg, TargetSubReg);
|
|
||||||
RegChanged := True;
|
|
||||||
|
|
||||||
DebugMsg(SPeepholeOptimization + 'Simplified register usage so ' + debug_regname(ThisReg) + ' = ' + debug_regname(taicpu(p).oper[1]^.reg), p);
|
|
||||||
|
|
||||||
TransferUsedRegs(TmpUsedRegs);
|
|
||||||
AllocRegBetween(ThisReg, p, hp1, TmpUsedRegs);
|
|
||||||
|
|
||||||
DebugMsg(SPeepholeOptimization + 'Movzx2Nop 3', hp1);
|
|
||||||
if p = hp1 then
|
|
||||||
begin
|
|
||||||
RemoveCurrentp(p); { p = hp1 and will then become the next instruction }
|
|
||||||
p_removed := True;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
RemoveInstruction(hp1);
|
|
||||||
|
|
||||||
{ Instruction will become "mov %reg,%reg" }
|
|
||||||
if not p_removed and (taicpu(p).opcode = A_MOV) and
|
|
||||||
MatchOperand(taicpu(p).oper[0]^, ThisReg) then
|
|
||||||
begin
|
|
||||||
DebugMsg(SPeepholeOptimization + 'Movzx2Nop 6', p);
|
|
||||||
RemoveCurrentP(p);
|
|
||||||
p_removed := True;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
taicpu(p).oper[1]^.reg := ThisReg;
|
|
||||||
|
|
||||||
Result := True;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
begin
|
|
||||||
if TargetSize <> MaxSize then
|
|
||||||
begin
|
|
||||||
{ Since the register is in use, we have to force it to
|
|
||||||
MaxSize otherwise part of it may become undefined later on }
|
|
||||||
TargetSize := MaxSize;
|
|
||||||
|
|
||||||
case TargetSize of
|
|
||||||
S_B:
|
|
||||||
TargetSubReg := R_SUBL;
|
|
||||||
S_W:
|
|
||||||
TargetSubReg := R_SUBW;
|
|
||||||
S_L:
|
|
||||||
TargetSubReg := R_SUBD;
|
|
||||||
else
|
|
||||||
InternalError(2020112351);
|
|
||||||
end;
|
|
||||||
|
|
||||||
setsubreg(ThisReg, TargetSubReg);
|
|
||||||
end;
|
|
||||||
|
|
||||||
AdjustFinalLoad;
|
|
||||||
end;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
AdjustFinalLoad;
|
|
||||||
|
|
||||||
if not p_removed then
|
|
||||||
begin
|
|
||||||
if TargetSize = MinSize then
|
|
||||||
begin
|
|
||||||
{ Convert the input MOVZX to a MOV }
|
|
||||||
if (taicpu(p).oper[0]^.typ = top_reg) and
|
|
||||||
SuperRegistersEqual(taicpu(p).oper[0]^.reg, ThisReg) then
|
|
||||||
begin
|
|
||||||
{ Or remove it completely! }
|
|
||||||
DebugMsg(SPeepholeOptimization + 'Movzx2Nop 1', p);
|
|
||||||
DebugMsg(SPeepholeOptimization + tostr(InstrMax), p);
|
|
||||||
RemoveCurrentP(p);
|
|
||||||
p_removed := True;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
begin
|
|
||||||
DebugMsg(SPeepholeOptimization + 'Movzx2Mov 1', p);
|
|
||||||
taicpu(p).opcode := A_MOV;
|
|
||||||
taicpu(p).oper[1]^.reg := ThisReg;
|
|
||||||
taicpu(p).opsize := TargetSize;
|
|
||||||
end;
|
|
||||||
|
|
||||||
Result := True;
|
|
||||||
end
|
|
||||||
else if TargetSize <> MaxSize then
|
|
||||||
begin
|
|
||||||
|
|
||||||
case MaxSize of
|
|
||||||
S_L:
|
|
||||||
if TargetSize = S_W then
|
|
||||||
begin
|
|
||||||
DebugMsg(SPeepholeOptimization + 'movzbl2movzbw', p);
|
|
||||||
taicpu(p).opsize := S_BW;
|
|
||||||
taicpu(p).oper[1]^.reg := ThisReg;
|
|
||||||
Result := True;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
InternalError(2020112341);
|
|
||||||
|
|
||||||
S_W:
|
|
||||||
if TargetSize = S_L then
|
|
||||||
begin
|
|
||||||
DebugMsg(SPeepholeOptimization + 'movzbw2movzbl', p);
|
|
||||||
taicpu(p).opsize := S_BL;
|
|
||||||
taicpu(p).oper[1]^.reg := ThisReg;
|
|
||||||
Result := True;
|
|
||||||
end
|
|
||||||
else
|
|
||||||
InternalError(2020112342);
|
|
||||||
else
|
|
||||||
;
|
|
||||||
end;
|
|
||||||
end;
|
|
||||||
end;
|
|
||||||
|
|
||||||
{ Now go through every instruction we found and change the
|
|
||||||
size. If TargetSize = MaxSize, then almost no changes are
|
|
||||||
needed and Result can remain False if it hasn't been set
|
|
||||||
yet.
|
|
||||||
|
|
||||||
If RegChanged is True, then the register requires changing
|
|
||||||
and so the point about TargetSize = MaxSize doesn't apply. }
|
|
||||||
|
|
||||||
if ((TargetSize <> MaxSize) or RegChanged) and (InstrMax >= 0) then
|
|
||||||
begin
|
|
||||||
for Index := 0 to InstrMax do
|
|
||||||
begin
|
|
||||||
|
|
||||||
{ If p_removed is true, then the original MOV/Z was removed
|
|
||||||
and removing the AND instruction may not be safe if it
|
|
||||||
appears first }
|
|
||||||
if (InstrList[Index].oper[InstrList[Index].ops - 1]^.typ <> top_reg) then
|
|
||||||
InternalError(2020112310);
|
|
||||||
|
|
||||||
if InstrList[Index].oper[0]^.typ = top_reg then
|
|
||||||
InstrList[Index].oper[0]^.reg := ThisReg;
|
|
||||||
|
|
||||||
InstrList[Index].oper[InstrList[Index].ops - 1]^.reg := ThisReg;
|
|
||||||
InstrList[Index].opsize := TargetSize;
|
|
||||||
end;
|
|
||||||
|
|
||||||
Result := True;
|
|
||||||
end;
|
|
||||||
|
|
||||||
Exit;
|
Exit;
|
||||||
end;
|
end;
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user