* check for eax,edx,ecx,ebx that support 8,16 bit registers in shortint add/sub peephole

and update register size of substructor

git-svn-id: trunk@9351 -
This commit is contained in:
peter 2007-11-29 21:16:32 +00:00
parent dbba46c0e4
commit cbac667753

View File

@ -1265,6 +1265,7 @@ begin
GetNextInstruction(p,hp1) and
(hp1.typ = ait_instruction) and
IsFoldableArithOp(taicpu(hp1),taicpu(p).oper[1]^.reg) and
(getsupreg(taicpu(hp1).oper[0]^.reg) in [RS_EAX, RS_EBX, RS_ECX, RS_EDX]) and
GetNextInstruction(hp1,hp2) and
(hp2.typ = ait_instruction) and
(taicpu(hp2).opcode = A_MOV) and
@ -1275,8 +1276,10 @@ begin
{ mov reg2 reg/ref }
{ to add/sub/or/... reg3/$const, reg/ref }
begin
taicpu(hp1).opsize:=taicpu(hp2).opsize;
taicpu(hp1).changeopsize(taicpu(hp2).opsize);
taicpu(hp1).loadoper(1,taicpu(hp2).oper[1]^);
if (taicpu(hp1).oper[0]^.typ = top_reg) then
setsubreg(taicpu(hp1).oper[0]^.reg,getsubreg(taicpu(hp2).oper[0]^.reg));
asml.remove(p);
asml.remove(hp2);
p.free;