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* yet another 8/16-bit ALU fix in thlcg2ll.location_force_reg
git-svn-id: branches/i8086@23887 -
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@ -1127,7 +1127,12 @@ implementation
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if (TCGSize2Size[dst_cgsize]<TCGSize2Size[l.size]) then
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begin
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if (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
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l.register:=cg.makeregsize(list,l.register,dst_cgsize);
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begin
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{$if defined(cpu8bitalu) or defined(cpu16bitalu)}
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if TCGSize2Size[dst_cgsize]<=TCGSize2Size[OS_INT] then
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{$endif}
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l.register:=cg.makeregsize(list,l.register,dst_cgsize);
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end;
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{ for big endian systems, the reference's offset must }
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{ be increased in this case, since they have the }
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{ MSB first in memory and e.g. byte(word_var) should }
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