From cc5814dac195e6c3a60030015339e18d0296fbb3 Mon Sep 17 00:00:00 2001 From: Jonas Maebe Date: Sat, 1 May 2021 13:58:10 +0000 Subject: [PATCH] * support arbitrary record regvars on AArch64: it has fairly complete support for inserting/extracting bitfields (although the compiler doesn't use those instructions yet in all possible cases, it seems) git-svn-id: trunk@49313 - --- compiler/symsym.pas | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/symsym.pas b/compiler/symsym.pas index 671933df07..d4d49b9782 100644 --- a/compiler/symsym.pas +++ b/compiler/symsym.pas @@ -1861,7 +1861,7 @@ implementation (varregable <> vr_none)) or (not refpara and not(varregable in [vr_none,vr_addr]))) -{$if not defined(powerpc) and not defined(powerpc64)} +{$if not defined(powerpc) and not defined(powerpc64) and not defined(aarch64)} and ((vardef.typ <> recorddef) or (varregable = vr_addr) or tabstractrecordsymtable(tabstractrecorddef(vardef).symtable).has_single_field(tempdef) or