From cc936710a0818e446e8154999a200a5d41f5e450 Mon Sep 17 00:00:00 2001
From: yury <jura@cp-lab.com>
Date: Tue, 28 Jul 2020 20:08:41 +0000
Subject: [PATCH] * mips: Added support for unaligned load/store. It greatly
 improves performance and prevents bus errors on systems which do not emulate
 unaligned memory access.

git-svn-id: trunk@45871 -
---
 compiler/mips/cgcpu.pas | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/compiler/mips/cgcpu.pas b/compiler/mips/cgcpu.pas
index d1c04a5ba2..64216e2e23 100644
--- a/compiler/mips/cgcpu.pas
+++ b/compiler/mips/cgcpu.pas
@@ -465,6 +465,12 @@ var
 begin
   if (TCGSize2Size[fromsize] < TCGSize2Size[tosize]) then
     a_load_reg_reg(list,fromsize,tosize,reg,reg);
+  if (ref.alignment<>0) and
+     (ref.alignment<tcgsize2size[tosize]) then
+    begin
+      a_load_reg_ref_unaligned(list,FromSize,ToSize,reg,ref);
+      exit;
+    end;
   case tosize of
     OS_8,
     OS_S8:
@@ -491,6 +497,12 @@ var
 begin
   if (TCGSize2Size[fromsize] >= TCGSize2Size[tosize]) then
     fromsize := tosize;
+  if (ref.alignment<>0) and
+     (ref.alignment<tcgsize2size[fromsize]) then
+     begin
+       a_load_ref_reg_unaligned(list,FromSize,ToSize,ref,reg);
+       exit;
+     end;
   case fromsize of
     OS_S8:
       Op := A_LB;{Load Signed Byte}