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https://gitlab.com/freepascal.org/fpc/source.git
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+ cpubase for jvm: opcodes, basic register definitions, ...
o special things:
* no tasmcond (conditions are currently encoded in opcode names,
may be changed later)
* no actual registers, just a couple of fake ones to indicate
the locals stack and the operands/evaluation stack
* no registers for the return value; they're returned on the
evaluation stack; may be handled like the x87 in the future
git-svn-id: branches/jvmbackend@18291 -
This commit is contained in:
Jonas Maebe
parent
a2890f4463
commit
d0a22d16b5
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -206,6 +206,7 @@ compiler/ia64/cpuinfo.pas svneol=native#text/plain
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compiler/ia64/ia64reg.dat svneol=native#text/plain
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compiler/impdef.pas svneol=native#text/plain
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compiler/import.pas svneol=native#text/plain
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compiler/jvm/cpubase.pas svneol=native#text/plain
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compiler/jvm/cpuinfo.pas svneol=native#text/plain
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compiler/jvm/jvmreg.dat svneol=native#text/plain
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compiler/jvm/rjvmcon.inc svneol=native#text/plain
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336
compiler/jvm/cpubase.pas
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336
compiler/jvm/cpubase.pas
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@ -0,0 +1,336 @@
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{
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Copyright (c) 2010 by Jonas Maebe
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Contains the base types for the Java VM
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{ This Unit contains the base types for the Java Virtual Machine
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}
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unit cpubase;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,
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aasmbase,cpuinfo,cgbase;
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{*****************************************************************************
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Assembler Opcodes
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*****************************************************************************}
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type
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TAsmOp=(A_None,
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a_aaload, a_aastore, a_aconst_null,
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a_aload, a_aload_0, a_aload_1, a_aload_2, a_aload_3,
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a_anewarray, a_areturn, a_arraylength,
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a_astore, a_astore_0, a_astore_1, a_astore_2, a_astore_3,
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a_athrow, a_baload, a_bastore, a_bipush, a_breakpoint,
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a_caload, a_castore, a_checkcast,
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a_d2f, a_d2i, a_d2l, a_dadd, a_daload, a_dastore, a_dcmpg, a_dcmpl,
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a_dconst_0, a_dconst_1, a_ddiv,
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a_dload, a_dload_0, a_dload_1, a_dload_2, a_dload_3,
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a_dmul, a_dneg, a_drem, a_dreturn,
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a_dstore, a_dstore_0, a_dstore_1, a_dstore_2, a_dstore_3,
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a_dsub,
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a_dup, a_dup2, a_dup2_x1, a_dup2_x2, a_dup_x1, a_dup_x2,
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a_f2d, a_f2i, a_f2l, a_fadd, a_faload, a_fastore, a_fcmpg, a_fcmpl,
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a_fconst_0, a_fconst_1, a_fconst_2, a_fdiv,
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a_fload, a_fload_0, a_fload_1, a_fload_2, a_fload_3,
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a_fmul, a_fneg, a_frem, a_freturn,
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a_fstore, a_fstore_0, a_fstore_1, a_fstore_2, a_fstore_3,
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a_fsub,
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a_getfield, a_getstatic,
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a_goto, a_goto_w,
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a_i2b, a_i2c, a_i2d, a_i2f, a_i2l, a_i2s,
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a_iadd, a_iaload, a_iand, a_iastore,
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a_iconst_m1, a_iconst_0, a_iconst_1, a_iconst_2, a_iconst_3,
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a_iconst_4, a_iconst_5,
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a_idiv,
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a_if_acmpeq, a_if_acmpne, a_if_icmpeq, a_if_icmpge, a_if_icmpgt,
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a_if_icmple, a_if_icmplt, a_if_icmpne,
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a_ifeq, a_ifge, a_ifgt, a_ifle, a_iflt, a_ifne, a_ifnonnull, a_ifnull,
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a_iinc,
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a_iload, a_iload_0, a_iload_1, a_iload_2, a_iload_3,
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a_imul, a_ineg,
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a_instanceof,
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a_invokeinterface, a_invokespecial, a_invokestatic, a_invokevirtual,
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a_ior, a_irem, a_ireturn, a_ishl, a_ishr,
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a_istore, a_istore_0, a_istore_1, a_istore_2, a_istore_3,
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a_isub, a_iushr, a_ixor,
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a_jsr, a_jsr_w,
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a_l2d, a_l2f, a_l2i, a_ladd, a_laload, a_land, a_lastore, a_lcmp,
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a_lconst_0, a_lconst_1,
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a_ldc, a_ldc2_w, a_ldc_w, a_ldiv,
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a_lload, a_lload_0, a_lload_1, a_lload_2, a_lload_3,
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a_lmul, a_lneg,
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a_lookupswitch,
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a_lor, a_lrem,
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a_lreturn,
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a_lshl, a_lshr,
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a_lstore, a_lstore_0, a_lstore_1, a_lstore_2, a_lstore_3,
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a_lsub, a_lushr, a_lxor,
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a_monitorenter,
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a_monitorexit,
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a_multianewarray,
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a_new,
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a_newarray,
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a_nop,
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a_pop, a_pop2,
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a_putfield, a_putstatic,
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a_ret, a_return,
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a_saload, a_sastore, a_sipush,
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a_swap,
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a_tableswitch,
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a_wide
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);
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{# This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[8];
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Const
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{# First value of opcode enumeration }
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firstop = low(tasmop);
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{# Last value of opcode enumeration }
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lastop = high(tasmop);
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{*****************************************************************************
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Registers
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*****************************************************************************}
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type
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{ Number of registers used for indexing in tables }
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tregisterindex=0..{$i rjvmnor.inc}-1;
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totherregisterset = set of tregisterindex;
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const
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{ Available Superregisters }
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{$i rjvmsup.inc}
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{ No Subregisters }
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R_SUBWHOLE = R_SUBNONE;
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{ Available Registers }
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{$i rjvmcon.inc}
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{ aliases }
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{ used as base register in references for parameters passed to
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subroutines: these are passed on the evaluation stack, but this way we
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can use the offset field to indicate the order, which is used by ncal
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to sort the parameters }
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NR_EVAL_STACK_BASE = NR_R0;
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maxvarregs = 1;
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maxfpuvarregs = 1;
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{ Integer Super registers first and last }
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first_int_imreg = 10;
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{ Float Super register first and last }
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first_fpu_imreg = 10;
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{ MM Super register first and last }
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first_mm_imreg = 10;
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regnumber_table : array[tregisterindex] of tregister = (
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{$i rjvmnum.inc}
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);
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EVALSTACKLOCS = [LOC_REGISTER,LOC_CREGISTER,LOC_FPUREGISTER,LOC_CFPUREGISTER,
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LOC_MMREGISTER,LOC_CMMREGISTER,LOC_SUBSETREG,LOC_CSUBSETREG];
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{*****************************************************************************
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Conditions
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*****************************************************************************}
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type
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// not used by jvm target
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TAsmCond=(C_None);
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{*****************************************************************************
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Constants
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*****************************************************************************}
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const
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max_operands = 2;
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{*****************************************************************************
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Default generic sizes
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*****************************************************************************}
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{$ifdef cpu64bitaddr}
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{# Defines the default address size for a processor,
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-- fake for JVM, only influences default width of
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arithmetic calculations }
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OS_ADDR = OS_64;
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{# the natural int size for a processor, }
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OS_INT = OS_64;
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OS_SINT = OS_S64;
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{$else}
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{# Defines the default address size for a processor,
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-- fake for JVM, only influences default width of
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arithmetic calculations }
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OS_ADDR = OS_32;
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{# the natural int size for a processor, }
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OS_INT = OS_32;
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OS_SINT = OS_S32;
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{$endif}
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{# the maximum float size for a processor, }
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OS_FLOAT = OS_F64;
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{# the size of a vector register for a processor }
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OS_VECTOR = OS_M128;
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{*****************************************************************************
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Generic Register names
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*****************************************************************************}
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{ dummies, not used for JVM }
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{# Stack pointer register }
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{ used as base register in references to indicate that it's a local }
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NR_STACK_POINTER_REG = NR_R1;
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RS_STACK_POINTER_REG = RS_R1;
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{# Frame pointer register }
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NR_FRAME_POINTER_REG = NR_STACK_POINTER_REG;
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RS_FRAME_POINTER_REG = RS_STACK_POINTER_REG;
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{ Java results are returned on the evaluation stack, not via a register }
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{ Results are returned in this register (32-bit values) }
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NR_FUNCTION_RETURN_REG = NR_NO;
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RS_FUNCTION_RETURN_REG = RS_NO;
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{ Low part of 64bit return value }
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NR_FUNCTION_RETURN64_LOW_REG = NR_NO;
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RS_FUNCTION_RETURN64_LOW_REG = RS_NO;
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{ High part of 64bit return value }
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NR_FUNCTION_RETURN64_HIGH_REG = NR_NO;
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RS_FUNCTION_RETURN64_HIGH_REG = RS_NO;
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{ The value returned from a function is available in this register }
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NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
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RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
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{ The lowh part of 64bit value returned from a function }
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NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
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RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
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{ The high part of 64bit value returned from a function }
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NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
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RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
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NR_FPU_RESULT_REG = NR_NO;
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NR_MM_RESULT_REG = NR_NO;
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{*****************************************************************************
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GCC /ABI linking information
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*****************************************************************************}
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{ dummies, not used for JVM }
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{# Registers which must be saved when calling a routine
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}
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saved_standard_registers : array[0..0] of tsuperregister = (
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RS_NO
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);
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{ this is only for the generic code which is not used for this architecture }
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saved_mm_registers : array[0..0] of tsuperregister = (RS_NO);
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{# Required parameter alignment when calling a routine
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}
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std_param_align = 1;
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{*****************************************************************************
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CPU Dependent Constants
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*****************************************************************************}
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maxfpuregs = 0;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
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function reg_cgsize(const reg: tregister) : tcgsize;
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function std_regnum_search(const s:string):Tregister;
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function std_regname(r:Tregister):string;
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function findreg_by_number(r:Tregister):tregisterindex;
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implementation
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uses
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rgbase;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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const
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std_regname_table : array[tregisterindex] of string[15] = (
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{$i rjvmstd.inc}
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);
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i rjvmrni.inc}
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);
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i rjvmsri.inc}
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);
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function reg_cgsize(const reg: tregister): tcgsize;
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begin
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result:=OS_NO;
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end;
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function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
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begin
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cgsize2subreg:=R_SUBNONE;
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end;
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function std_regnum_search(const s:string):Tregister;
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begin
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result:=NR_NO;
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end;
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function findreg_by_number(r:Tregister):tregisterindex;
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begin
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result:=findreg_by_number_table(r,regnumber_index);
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end;
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function std_regname(r:Tregister):string;
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var
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p : tregisterindex;
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begin
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p:=findreg_by_number_table(r,regnumber_index);
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if p<>0 then
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result:=std_regname_table[p]
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else
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result:=generic_regname(r);
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end;
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end.
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