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+ Xtensa: implemented tcputypeconvnode.second_int_to_bool
git-svn-id: trunk@44384 -
This commit is contained in:
florian
parent
8fd53df3cd
commit
d1bbfe4cf7
@ -1,5 +1,5 @@
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{
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{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Copyright (c) 1998-2019 by Florian Klaempfl
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Generate Xtensa assembler for type converting nodes
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Generate Xtensa assembler for type converting nodes
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@ -67,128 +67,98 @@ implementation
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{*****************************************************************************
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{*****************************************************************************
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FirstTypeConv
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tcputypeconvnode
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*****************************************************************************}
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*****************************************************************************}
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procedure tcputypeconvnode.second_int_to_bool;
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procedure tcputypeconvnode.second_int_to_bool;
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var
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var
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hreg1,
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hreg1, onereg: tregister;
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hregister : tregister;
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href : treference;
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href : treference;
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hlabel : tasmlabel;
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hlabel : tasmlabel;
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newsize : tcgsize;
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newsize : tcgsize;
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begin
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begin
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secondpass(left);
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secondpass(left);
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if codegenerror then
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if codegenerror then
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exit;
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exit;
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//
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// { Explicit typecasts from any ordinal type to a boolean type }
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{ Explicit typecasts from any ordinal type to a boolean type
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// { must not change the ordinal value }
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must not change the ordinal value }
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// if (nf_explicit in flags) and
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if (nf_explicit in flags) and
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// not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
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not(left.location.loc in [LOC_JUMP]) then
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// begin
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begin
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// location_copy(location,left.location);
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location_copy(location,left.location);
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// newsize:=def_cgsize(resultdef);
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newsize:=def_cgsize(resultdef);
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// { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
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{ change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
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// if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
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if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
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// ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
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((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
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// hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
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hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
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// else
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else
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// location.size:=newsize;
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location.size:=newsize;
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// exit;
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exit;
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// end;
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end;
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//
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// { Load left node into flag F_NE/F_E }
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if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
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// resflags:=F_NE;
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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//
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// if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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// hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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//
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onereg:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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// case left.location.loc of
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cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,1,onereg);
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// LOC_CREFERENCE,
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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// LOC_REFERENCE :
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case left.location.loc of
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// begin
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LOC_CREFERENCE,
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// if left.location.size in [OS_64,OS_S64] then
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LOC_REFERENCE :
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// begin
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begin
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// hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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if left.location.size in [OS_64,OS_S64] then
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// cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.reference,hregister);
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begin
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// href:=left.location.reference;
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.reference,hreg1);
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// inc(href.offset,4);
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href:=left.location.reference;
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// tbasecgarm(cg).cgsetflags:=true;
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inc(href.offset,4);
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// cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,href,hregister);
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cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,href,hreg1);
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// tbasecgarm(cg).cgsetflags:=false;
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end
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// end
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else
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// else
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,left.location.size,OS_32,left.location.reference,hreg1);
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// begin
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current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(A_MOVNEZ,hreg1,onereg,hreg1));
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// hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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end;
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// tbasecgarm(cg).cgsetflags:=true;
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LOC_REGISTER,LOC_CREGISTER :
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// cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
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begin
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// tbasecgarm(cg).cgsetflags:=false;
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if left.location.size in [OS_64,OS_S64] then
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// end;
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cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reglo,left.location.register64.reghi,hreg1)
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// end;
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else
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// LOC_FLAGS :
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,left.location.size,OS_32,left.location.register,hreg1);
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// begin
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current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(A_MOVNEZ,hreg1,onereg,hreg1));
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// resflags:=left.location.resflags;
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end;
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// end;
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LOC_JUMP :
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// LOC_REGISTER,LOC_CREGISTER :
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begin
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// begin
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current_asmdata.getjumplabel(hlabel);
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// if left.location.size in [OS_64,OS_S64] then
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cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
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// begin
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cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,hreg1);
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// hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
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// cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
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cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
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// tbasecgarm(cg).cgsetflags:=true;
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cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,hreg1);
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// cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
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cg.a_label(current_asmdata.CurrAsmList,hlabel);
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// tbasecgarm(cg).cgsetflags:=false;
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end;
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// end
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else
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// else
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internalerror(2020031504);
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// begin
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end;
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// tbasecgarm(cg).cgsetflags:=true;
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if (is_cbool(resultdef)) then
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// cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,hreg1,hreg1);
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// tbasecgarm(cg).cgsetflags:=false;
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// end;
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{$ifndef cpu64bitalu}
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// end;
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if (location.size in [OS_64,OS_S64]) then
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// LOC_JUMP :
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begin
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// begin
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location.register64.reglo:=hreg1;
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// hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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// current_asmdata.getjumplabel(hlabel);
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if (is_cbool(resultdef)) then
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// cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
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{ reglo is either 0 or -1 -> reghi has to become the same }
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// cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,hregister);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
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// cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
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else
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// cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
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{ unsigned }
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// cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,hregister);
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cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
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// cg.a_label(current_asmdata.CurrAsmList,hlabel);
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end
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// tbasecgarm(cg).cgsetflags:=true;
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else
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// cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,hregister,hregister);
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{$endif cpu64bitalu}
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// tbasecgarm(cg).cgsetflags:=false;
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location.register:=hreg1;
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// end;
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// else
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// internalerror(200311301);
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// end;
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// { load flags to register }
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// location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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// hreg1:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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// cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,hreg1);
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// cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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// if (is_cbool(resultdef)) then
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// cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,hreg1,hreg1);
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//
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//{$ifndef cpu64bitalu}
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// if (location.size in [OS_64,OS_S64]) then
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// begin
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// location.register64.reglo:=hreg1;
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// location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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// if (is_cbool(resultdef)) then
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// { reglo is either 0 or -1 -> reghi has to become the same }
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// cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
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// else
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// { unsigned }
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// cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
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// end
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// else
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//{$endif cpu64bitalu}
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// location.register:=hreg1;
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location_copy(location,left.location);
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current_asmdata.CurrAsmList.Concat(taicpu.op_none(A_NOP));
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end;
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end;
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@ -26,6 +26,7 @@
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'j',
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'j',
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'mov',
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'mov',
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'mov.s',
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'mov.s',
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'movnez',
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'movi',
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'movi',
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'mull',
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'mull',
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'neg',
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'neg',
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@ -26,6 +26,7 @@ A_LSI,
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A_J,
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A_J,
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A_MOV,
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A_MOV,
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A_MOV_S,
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A_MOV_S,
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A_MOVNEZ,
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A_MOVI,
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A_MOVI,
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A_MULL,
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A_MULL,
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A_NEG,
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A_NEG,
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