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* ported part of the i386 peep hole optimizer to x86-64 to see if it is possible to create a shared x86 peep hole optimizer
git-svn-id: trunk@20874 -
This commit is contained in:
florian
parent
931a0f159c
commit
d24b70d22b
@ -25,17 +25,321 @@ unit aoptcpu;
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{$i fpcdefs.inc}
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{$i fpcdefs.inc}
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Interface
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interface
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uses
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uses cpubase, aasmtai, aopt, aoptcpub;
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cpubase, aoptobj, aoptcpub, aopt;
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Type
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type
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TCpuAsmOptimizer = class(TAsmOptimizer)
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TCpuAsmOptimizer = class(TAsmOptimizer)
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End;
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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end;
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Implementation
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implementation
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uses
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globtype, globals,
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cutils,
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verbose,
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cgbase, cgutils,
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aasmbase, aasmdata, aasmcpu;
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function isFoldableArithOp(hp1: taicpu; reg: tregister): boolean;
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begin
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isFoldableArithOp := False;
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case hp1.opcode of
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A_ADD, A_SUB, A_OR, A_XOR, A_AND, A_SHL, A_SHR, A_SAR:
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isFoldableArithOp :=
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((taicpu(hp1).oper[0]^.typ = top_const) or
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((taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg<>reg))) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = reg);
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A_INC, A_DEC:
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isFoldableArithOp :=
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(taicpu(hp1).oper[0]^.typ = top_reg) and
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(taicpu(hp1).oper[0]^.reg = reg);
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end;
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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next1: tai;
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hp1, hp2: tai;
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begin
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Result := False;
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case p.typ of
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ait_instruction:
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begin
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case taicpu(p).opcode of
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A_AND:
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begin
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if (taicpu(p).oper[0]^.typ = top_const) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(getsupreg(taicpu(p).oper[1]^.reg) = getsupreg(
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taicpu(hp1).oper[1]^.reg)) and
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(getsubreg(taicpu(p).oper[1]^.reg)<=getsubreg(
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taicpu(hp1).oper[1]^.reg)) and
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(abs(taicpu(p).oper[0]^.val and
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taicpu(hp1).oper[0]^.val)<$80000000) then
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{change "and const1, reg; and const2, reg" to "and (const1 and const2), reg"}
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begin
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taicpu(hp1).loadConst(0, taicpu(p).oper[0]^.val and
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taicpu(hp1).oper[0]^.val);
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asml.remove(p);
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p.Free;
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p := hp1;
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end;
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(* else
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{change "and x, reg; jxx" to "test x, reg", if reg is deallocated before the
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jump, but only if it's a conditional jump (PFV) }
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if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).is_jmp) and
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(taicpu(hp1).opcode<>A_JMP) and
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not(getsupreg(taicpu(p).oper[1]^.reg) in UsedRegs) then
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taicpu(p).opcode := A_TEST;*)
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end;
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A_MOVSX,
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A_MOVZX:
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begin
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if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(hp1.typ = ait_instruction) and
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IsFoldableArithOp(taicpu(hp1), taicpu(p).oper[1]^.reg) and
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GetNextInstruction(hp1, hp2) and
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(hp2.typ = ait_instruction) and
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(taicpu(hp2).opcode = A_MOV) and
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(taicpu(hp2).oper[0]^.typ = top_reg) and
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OpsEqual(taicpu(hp2).oper[1]^, taicpu(p).oper[0]^) then
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{ change movsX/movzX reg/ref, reg2 }
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{ add/sub/or/... reg3/$const, reg2 }
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{ mov reg2 reg/ref }
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{ to add/sub/or/... reg3/$const, reg/ref }
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begin
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{ by example:
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movswl %si,%eax movswl %si,%eax p
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decl %eax addl %edx,%eax hp1
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movw %ax,%si movw %ax,%si hp2
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->
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movswl %si,%eax movswl %si,%eax p
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decw %eax addw %edx,%eax hp1
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movw %ax,%si movw %ax,%si hp2
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}
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taicpu(hp1).changeopsize(taicpu(hp2).opsize);
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{
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->
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movswl %si,%eax movswl %si,%eax p
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decw %si addw %dx,%si hp1
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movw %ax,%si movw %ax,%si hp2
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}
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case taicpu(hp1).ops of
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1:
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taicpu(hp1).loadoper(0, taicpu(hp2).oper[1]^);
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2:
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begin
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taicpu(hp1).loadoper(1, taicpu(hp2).oper[1]^);
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if (taicpu(hp1).oper[0]^.typ = top_reg) then
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setsubreg(taicpu(hp1).oper[0]^.reg,
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getsubreg(taicpu(hp2).oper[0]^.reg));
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end;
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else
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internalerror(2008042701);
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end;
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{
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->
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decw %si addw %dx,%si p
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}
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asml.remove(p);
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asml.remove(hp2);
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p.Free;
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hp2.Free;
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p := hp1;
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end
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{ removes superfluous And's after movzx's }
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else if taicpu(p).opcode = A_MOVZX then
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begin
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if (taicpu(p).oper[1]^.typ = top_reg) and
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GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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case taicpu(p).opsize of
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S_BL, S_BW, S_BQ:
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if (taicpu(hp1).oper[0]^.val = $ff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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S_WL, S_WQ:
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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S_LQ:
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if (taicpu(hp1).oper[0]^.val = $ffffffff) then
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begin
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asml.remove(hp1);
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hp1.Free;
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end;
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end;
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{ changes some movzx constructs to faster synonims (all examples
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are given with eax/ax, but are also valid for other registers)}
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if (taicpu(p).oper[1]^.typ = top_reg) then
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if (taicpu(p).oper[0]^.typ = top_reg) then
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case taicpu(p).opsize of
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S_BW:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg) =
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getsupreg(taicpu(p).oper[1]^.reg)) and not
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(cs_opt_size in current_settings.optimizerswitches) then
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{Change "movzbw %al, %ax" to "andw $0x0ffh, %ax"}
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_W);
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taicpu(p).loadConst(0, $ff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg =
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taicpu(p).oper[1]^.reg) then
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{ Change "movzbw %reg1, %reg2; andw $const, %reg2"
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to "movw %reg1, reg2; andw $(const1 and $ff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_W);
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setsubreg(taicpu(p).oper[0]^.reg, R_SUBW);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ff);
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end;
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end;
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S_BL:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg) =
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getsupreg(taicpu(p).oper[1]^.reg)) and not
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(cs_opt_size in current_settings.optimizerswitches) then
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{ Change "movzbl %al, %eax" to "andl $0x0ffh, %eax"}
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_L);
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taicpu(p).loadConst(0, $ff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg =
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taicpu(p).oper[1]^.reg) then
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{ Change "movzbl %reg1, %reg2; andl $const, %reg2"
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to "movl %reg1, reg2; andl $(const1 and $ff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_L);
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setsubreg(taicpu(p).oper[0]^.reg, R_SUBWHOLE);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ff);
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end;
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end;
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S_WL:
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begin
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if (getsupreg(taicpu(p).oper[0]^.reg) =
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getsupreg(taicpu(p).oper[1]^.reg)) and not
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(cs_opt_size in current_settings.optimizerswitches) then
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{ Change "movzwl %ax, %eax" to "andl $0x0ffffh, %eax" }
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begin
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taicpu(p).opcode := A_AND;
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taicpu(p).changeopsize(S_L);
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taicpu(p).loadConst(0, $ffff);
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end
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else if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = top_const) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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(taicpu(hp1).oper[1]^.reg =
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taicpu(p).oper[1]^.reg) then
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{ Change "movzwl %reg1, %reg2; andl $const, %reg2"
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to "movl %reg1, reg2; andl $(const1 and $ffff), %reg2"}
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begin
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taicpu(p).opcode := A_MOV;
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taicpu(p).changeopsize(S_L);
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setsubreg(taicpu(p).oper[0]^.reg, R_SUBWHOLE);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ffff);
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end;
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end;
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end
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else if (taicpu(p).oper[0]^.typ = top_ref) then
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begin
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if GetNextInstruction(p, hp1) and
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(tai(hp1).typ = ait_instruction) and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).oper[0]^.typ = Top_Const) and
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(taicpu(hp1).oper[1]^.typ = Top_Reg) and
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(taicpu(hp1).oper[1]^.reg =
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taicpu(p).oper[1]^.reg) then
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begin
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taicpu(p).opcode := A_MOV;
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case taicpu(p).opsize of
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S_BL:
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begin
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taicpu(p).changeopsize(S_L);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ff);
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end;
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S_WL:
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begin
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taicpu(p).changeopsize(S_L);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ffff);
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end;
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S_BW:
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begin
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taicpu(p).changeopsize(S_W);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ff);
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end;
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S_BQ:
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begin
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taicpu(p).changeopsize(S_Q);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ff);
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end;
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S_WQ:
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begin
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taicpu(p).changeopsize(S_Q);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ffff);
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end;
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S_LQ:
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begin
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taicpu(p).changeopsize(S_Q);
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taicpu(hp1).loadConst(
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0, taicpu(hp1).oper[0]^.val and $ffffffff);
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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begin
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begin
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casmoptimizer:=TCpuAsmOptimizer;
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casmoptimizer := TCpuAsmOptimizer;
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end.
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end.
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