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* fixed aarch64 shifterop parsing in inline assembly

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git-svn-id: trunk@41650 -
This commit is contained in:
Jonas Maebe 2019-03-09 16:11:31 +00:00
parent f7ee1a1da9
commit d34e0b091b
1 changed files with 6 additions and 3 deletions
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9
compiler/aarch64/racpugas.pas
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@ -485,8 +485,8 @@ Unit racpugas;
useszr:=false;
for i:=low(instr.operands) to pred(opnr) do
begin
if (instr.operands[1].opr.typ=OPR_REGISTER) then
case getsupreg(instr.operands[1].opr.reg) of
if (instr.operands[i].opr.typ=OPR_REGISTER) then
case getsupreg(instr.operands[i].opr.reg) of
RS_XZR:
useszr:=true;
RS_SP:
@ -494,7 +494,10 @@ Unit racpugas;
end;
end;
result:=valid_shifter_operand(instr.opcode,useszr,usessp,instr.Is64bit,sm,instr.operands[opnr].opr.shifterop.shiftimm);
end
if result then
instr.Ops:=opnr;
end;
break;
end;
end;
end;