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https://gitlab.com/freepascal.org/fpc/source.git
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* fixed sparc compile
* fixed float regvar loading
This commit is contained in:
peter
parent
434475be33
commit
d6bffaf5c6
@ -1249,6 +1249,7 @@ implementation
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var
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hp : tparaitem;
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paraloc : pcgparalocation;
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tempref,
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href : treference;
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begin
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if (po_assembler in current_procinfo.procdef.procoptions) then
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@ -1287,11 +1288,8 @@ implementation
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paraloc:=paraloc^.next;
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end;
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end;
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LOC_CREGISTER,
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LOC_CMMREGISTER,
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LOC_CFPUREGISTER :
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LOC_CREGISTER :
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begin
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href:=tvarsym(hp.parasym).localloc.reference;
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{$ifndef cpu64bit}
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if tvarsym(hp.parasym).localloc.size in [OS_64,OS_S64] then
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begin
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@ -1319,6 +1317,36 @@ implementation
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internalerror(200410105);
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end;
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end;
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LOC_CFPUREGISTER :
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begin
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{$ifdef sparc}
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{ Sparc passes floats in int registers, when loading to fpu register
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we need a temp }
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tg.GetTemp(list,TCGSize2Size[tvarsym(hp.parasym).localloc.size],tt_normal,tempref);
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href:=tempref;
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while assigned(paraloc) do
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begin
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unget_para(paraloc^);
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gen_load_ref(paraloc^,href);
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inc(href.offset,TCGSize2Size[paraloc^.size]);
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paraloc:=paraloc^.next;
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end;
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cg.a_loadfpu_ref_reg(list,tvarsym(hp.parasym).localloc.size,tempref,tvarsym(hp.parasym).localloc.register);
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tg.UnGetTemp(list,tempref);
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{$else sparc}
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unget_para(paraloc^);
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gen_load_reg(paraloc^,tvarsym(hp.parasym).localloc.register);
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if assigned(paraloc^.next) then
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internalerror(200410109);
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{$endif sparc}
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end;
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LOC_CMMREGISTER :
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begin
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unget_para(paraloc^);
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gen_load_reg(paraloc^,tvarsym(hp.parasym).localloc.register);
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if assigned(paraloc^.next) then
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internalerror(200410108);
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end;
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end;
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hp:=tparaitem(hp.next);
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end;
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@ -1811,19 +1839,6 @@ implementation
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procedure gen_alloc_symtable(list:TAAsmoutput;st:tsymtable);
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function getregvar(v:tvarregable;size:tcgsize):tregister;
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begin
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case v of
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vr_intreg :
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result:=cg.getintregister(list,size);
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vr_fpureg :
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result:=cg.getfpuregister(list,size);
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vr_mmreg :
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result:=cg.getmmregister(list,size);
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end;
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end;
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var
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sym : tsym;
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isaddr : boolean;
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@ -1858,17 +1873,34 @@ implementation
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not(pi_uses_exceptions in current_procinfo.flags) and
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(varregable<>vr_none) then
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begin
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localloc.loc:=LOC_CREGISTER;
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localloc.size:=cgsize;
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case varregable of
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vr_intreg :
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begin
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localloc.loc:=LOC_CREGISTER;
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{$ifndef cpu64bit}
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if cgsize in [OS_64,OS_S64] then
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begin
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localloc.registerlow:=getregvar(varregable,OS_32);
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localloc.registerhigh:=getregvar(varregable,OS_32);
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end
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else
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if cgsize in [OS_64,OS_S64] then
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begin
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localloc.registerlow:=cg.getintregister(list,OS_32);
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localloc.registerhigh:=cg.getintregister(list,OS_32);
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end
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else
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{$endif cpu64bit}
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localloc.register:=getregvar(varregable,cgsize);
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localloc.register:=cg.getintregister(list,cgsize);
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end;
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vr_fpureg :
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begin
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localloc.loc:=LOC_CFPUREGISTER;
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localloc.register:=cg.getfpuregister(list,cgsize);
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end;
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vr_mmreg :
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begin
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localloc.loc:=LOC_CMMREGISTER;
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localloc.register:=cg.getmmregister(list,cgsize);
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end;
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else
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internalerror(2004101010);
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end;
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end
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else
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{$endif NOT OLDREGVARS}
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@ -2175,7 +2207,11 @@ implementation
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end.
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{
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$Log$
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Revision 1.223 2004-10-10 20:22:53 peter
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Revision 1.224 2004-10-10 20:51:46 peter
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* fixed sparc compile
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* fixed float regvar loading
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Revision 1.223 2004/10/10 20:22:53 peter
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* symtable allocation rewritten
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* loading of parameters to local temps/regs cleanup
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* regvar support for parameters
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@ -526,12 +526,15 @@ implementation
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end
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else
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begin
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{ same size, only a register mov required }
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instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
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list.Concat(instr);
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{ Notify the register allocator that we have written a move instruction so
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it can try to eliminate it. }
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add_move_instruction(instr);
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if reg1<>reg2 then
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begin
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{ same size, only a register mov required }
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instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
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list.Concat(instr);
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{ Notify the register allocator that we have written a move instruction so
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it can try to eliminate it. }
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add_move_instruction(instr);
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end;
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end;
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end;
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@ -1271,7 +1274,11 @@ begin
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end.
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{
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$Log$
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Revision 1.94 2004-10-10 20:31:48 peter
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Revision 1.95 2004-10-10 20:51:46 peter
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* fixed sparc compile
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* fixed float regvar loading
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Revision 1.94 2004/10/10 20:31:48 peter
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* concatcopy_unaligned maps by default to concatcopy, sparc will
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override it with call to fpc_move
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