diff --git a/compiler/aasmtai.pas b/compiler/aasmtai.pas
index 0775508501..5659bc4c8f 100644
--- a/compiler/aasmtai.pas
+++ b/compiler/aasmtai.pas
@@ -1728,6 +1728,8 @@ implementation
                 begin
                   new(shifterop);
                   shifterop^:=o.shifterop^;
+                  if assigned(add_reg_instruction_hook) then
+                    add_reg_instruction_hook(self,shifterop^.rs);
                 end;
 {$endif ARM}
              end;
@@ -1946,7 +1948,12 @@ implementation
 end.
 {
   $Log$
-  Revision 1.64  2004-01-12 16:37:59  peter
+  Revision 1.65  2004-01-23 15:12:49  florian
+    * fixed generic shl/shr operations
+    + added register allocation hook calls for arm specific operand types:
+      register set and shifter op
+
+  Revision 1.64  2004/01/12 16:37:59  peter
     * moved spilling code from taicpu to rg
 
   Revision 1.63  2003/12/28 16:20:09  jonas
diff --git a/compiler/arm/aasmcpu.pas b/compiler/arm/aasmcpu.pas
index df1813fce6..0d68bc288b 100644
--- a/compiler/arm/aasmcpu.pas
+++ b/compiler/arm/aasmcpu.pas
@@ -109,11 +109,15 @@ implementation
               end;
             shifterop^:=so;
             typ:=top_shifterop;
+            if assigned(add_reg_instruction_hook) then
+              add_reg_instruction_hook(self,shifterop^.rs);
           end;
       end;
 
 
     procedure taicpu.loadregset(opidx:longint;const s:tcpuregisterset);
+      var
+        i : byte;
       begin
         allocate_oper(opidx+1);
         with oper[opidx]^ do
@@ -123,6 +127,11 @@ implementation
            new(regset);
            regset^:=s;
            typ:=top_regset;
+           for i:=RS_R0 to RS_R15 do
+             begin
+               if assigned(add_reg_instruction_hook) and (i in regset^) then
+                 add_reg_instruction_hook(self,newreg(R_INTREGISTER,i,R_SUBWHOLE));
+             end;
          end;
       end;
 
@@ -409,7 +418,12 @@ implementation
 end.
 {
   $Log$
-  Revision 1.22  2004-01-21 19:01:03  florian
+  Revision 1.23  2004-01-23 15:12:49  florian
+    * fixed generic shl/shr operations
+    + added register allocation hook calls for arm specific operand types:
+      register set and shifter op
+
+  Revision 1.22  2004/01/21 19:01:03  florian
     * fixed handling of max. distance of pc relative symbols
 
   Revision 1.21  2004/01/20 21:02:55  florian
diff --git a/compiler/ncgmat.pas b/compiler/ncgmat.pas
index f59598da06..c13ddd4f39 100644
--- a/compiler/ncgmat.pas
+++ b/compiler/ncgmat.pas
@@ -446,8 +446,6 @@ implementation
               }
               if right.location.loc<>LOC_REGISTER then
                 begin
-                  if right.location.loc<>LOC_CREGISTER then
-                   location_release(exprasmlist,right.location);
                   hcountreg:=cg.getintregister(exprasmlist,OS_INT);
                   freescratch := true;
                   cg.a_load_loc_reg(exprasmlist,right.location.size,right.location,hcountreg);
@@ -455,6 +453,8 @@ implementation
               else
                 hcountreg:=right.location.register;
               cg.a_op_reg_reg(exprasmlist,op,OS_INT,hcountreg,location.register);
+              if right.location.loc<>LOC_REGISTER then
+                location_release(exprasmlist,right.location);
               if freescratch then
                 cg.ungetregister(exprasmlist,hcountreg);
            end;
@@ -524,7 +524,12 @@ begin
 end.
 {
   $Log$
-  Revision 1.24  2004-01-20 12:59:37  florian
+  Revision 1.25  2004-01-23 15:12:49  florian
+    * fixed generic shl/shr operations
+    + added register allocation hook calls for arm specific operand types:
+      register set and shifter op
+
+  Revision 1.24  2004/01/20 12:59:37  florian
     * common addnode code for x86-64 and i386
 
   Revision 1.23  2003/12/06 01:15:22  florian
diff --git a/compiler/nmat.pas b/compiler/nmat.pas
index 7a9915c3d6..5868a00795 100644
--- a/compiler/nmat.pas
+++ b/compiler/nmat.pas
@@ -424,8 +424,10 @@ implementation
         else
           procname := procname + 'qword';
 }
-        result := ccallnode.createintern(procname,ccallparanode.create(left,
-          ccallparanode.create(right,nil)));
+        { this order of parameters works at least for the arm,
+          however it should work for any calling conventions (FK) }
+        result := ccallnode.createintern(procname,ccallparanode.create(right,
+          ccallparanode.create(left,nil)));
         left := nil;
         right := nil;
         firstpass(result);
@@ -839,7 +841,12 @@ begin
 end.
 {
   $Log$
-  Revision 1.54  2003-12-09 21:17:04  jonas
+  Revision 1.55  2004-01-23 15:12:49  florian
+    * fixed generic shl/shr operations
+    + added register allocation hook calls for arm specific operand types:
+      register set and shifter op
+
+  Revision 1.54  2003/12/09 21:17:04  jonas
     + support for evaluating qword constant expressions (both arguments have
       to be a qword, constants have to be explicitly typecasted to qword)