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* fix register method pointer for ppc64 and x86_64-linux
git-svn-id: trunk@22351 -
This commit is contained in:
florian
parent
95c69f1f9e
commit
d93cee995b
@ -465,6 +465,7 @@ unit cgobj;
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tcg128 = class
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procedure a_load128_reg_reg(list : TAsmList;regsrc,regdst : tregister128);virtual;
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procedure a_load128_reg_ref(list : TAsmList;reg : tregister128;const ref : treference);virtual;
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procedure a_load128_ref_reg(list : TAsmList;const ref : treference;reg : tregister128);virtual;
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procedure a_load128_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;
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procedure a_load128_reg_loc(list : TAsmList;reg : tregister128;const l : tlocation);virtual;
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@ -2636,6 +2637,41 @@ implementation
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end;
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procedure tcg128.a_load128_ref_reg(list: TAsmList; const ref: treference;
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reg: tregister128);
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var
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tmpreg: tregister;
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tmpref: treference;
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begin
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if target_info.endian = endian_big then
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begin
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tmpreg := reg.reglo;
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reg.reglo := reg.reghi;
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reg.reghi := tmpreg;
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end;
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tmpref := ref;
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if (tmpref.base=reg.reglo) then
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begin
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tmpreg:=cg.getaddressregister(list);
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cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
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tmpref.base:=tmpreg;
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end
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else
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{ this works only for the i386, thus the i386 needs to override }
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{ this method and this method must be replaced by a more generic }
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{ implementation FK }
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if (tmpref.index=reg.reglo) then
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begin
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tmpreg:=cg.getaddressregister(list);
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cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.index,tmpreg);
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tmpref.index:=tmpreg;
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end;
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cg.a_load_ref_reg(list,OS_64,OS_64,tmpref,reg.reglo);
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inc(tmpref.offset,8);
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cg.a_load_ref_reg(list,OS_64,OS_64,tmpref,reg.reghi);
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end;
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procedure tcg128.a_load128_loc_ref(list: TAsmList; const l: tlocation;
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const ref: treference);
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begin
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@ -1359,7 +1359,7 @@ implementation
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begin
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{$ifdef cpu64bitalu}
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{ use cg128 only if no "chained" location is used }
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if (l.size in [OS_128,OS_S128]) and (cgpara.Size in [OS_128,OS_S128]) then
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if is_methodpointer(cgpara.def) and (l.size in [OS_128,OS_S128]) and (cgpara.Size in [OS_128,OS_S128]) then
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cg128.a_load128_loc_cgpara(list,l,cgpara)
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else
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{$else cpu64bitalu}
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@ -716,11 +716,15 @@ implementation
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LOC_REGISTER,
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LOC_CREGISTER :
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begin
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if left.location.size in [OS_128,OS_S128] then
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cg128.a_load128_ref_reg(current_asmdata.CurrAsmList,right.location.reference,left.location.register128)
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else
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{$else cpu64bitalu}
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if left.location.size in [OS_64,OS_S64] then
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cg64.a_load64_ref_reg(current_asmdata.CurrAsmList,right.location.reference,left.location.register64)
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else
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{$endif not cpu64bitalu}
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{$endif cpu64bitalu}
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hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,right.resultdef,left.resultdef,right.location.reference,left.location.register);
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end;
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LOC_FPUREGISTER,
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@ -205,7 +205,7 @@ implementation
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if getsupreg(location.register64.reghi)<first_int_imreg then
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cg.ungetcpuregister(list,location.register64.reghi);
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end
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{$endif}
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{$endif cpu64bitalu}
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else
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if getsupreg(location.register)<first_int_imreg then
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cg.ungetcpuregister(list,location.register);
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@ -317,7 +317,17 @@ implementation
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end;
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LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE :
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begin
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if opsize in [OS_128,OS_S128] then
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begin
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hlcg.location_force_reg(list,p.location,p.resultdef,hlcg.tcgsize2orddef(opsize),true);
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tmpreg:=cg.getintregister(list,OS_64);
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cg.a_op_reg_reg_reg(list,OP_OR,OS_64,p.location.register128.reglo,p.location.register128.reghi,tmpreg);
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location_reset(p.location,LOC_REGISTER,OS_64);
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p.location.register:=tmpreg;
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opsize:=OS_64;
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end;
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{$else cpu64bitalu}
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if opsize in [OS_64,OS_S64] then
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begin
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hlcg.location_force_reg(list,p.location,p.resultdef,hlcg.tcgsize2orddef(opsize),true);
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@ -327,7 +337,7 @@ implementation
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p.location.register:=tmpreg;
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opsize:=OS_32;
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end;
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{$endif not cpu64bitalu}
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{$endif cpu64bitalu}
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cg.a_cmp_const_loc_label(list,opsize,OC_NE,0,p.location,current_procinfo.CurrTrueLabel);
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cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
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end;
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@ -614,14 +624,21 @@ implementation
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location_reset(l,LOC_CREGISTER,l.size)
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else
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location_reset(l,LOC_REGISTER,l.size);
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if l.size in [OS_128,OS_S128,OS_F128] then
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begin
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l.register128.reglo:=cg.getintregister(list,OS_64);
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l.register128.reghi:=cg.getintregister(list,OS_64);
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end
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else
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{$else cpu64bitalu}
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if l.size in [OS_64,OS_S64,OS_F64] then
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begin
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l.register64.reglo:=cg.getintregister(list,OS_32);
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l.register64.reghi:=cg.getintregister(list,OS_32);
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end
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else
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{$endif not cpu64bitalu}
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{$endif cpu64bitalu}
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l.register:=cg.getintregister(list,l.size);
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end;
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end;
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@ -773,7 +790,14 @@ implementation
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case loc.loc of
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LOC_CREGISTER:
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begin
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if loc.size in [OS_128,OS_S128] then
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begin
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loc.register128.reglo:=cg.getintregister(list,OS_64);
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loc.register128.reghi:=cg.getintregister(list,OS_64);
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end
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else
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{$else cpu64bitalu}
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if loc.size in [OS_64,OS_S64] then
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begin
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loc.register64.reglo:=cg.getintregister(list,OS_32);
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@ -803,14 +827,21 @@ implementation
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begin
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{ Allocate register already, to prevent first allocation to be
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inside a loop }
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if sym.initialloc.size in [OS_128,OS_S128] then
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begin
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cg.a_reg_sync(list,sym.initialloc.register128.reglo);
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cg.a_reg_sync(list,sym.initialloc.register128.reghi);
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end
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else
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{$else cpu64bitalu}
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if sym.initialloc.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(list,sym.initialloc.register64.reglo);
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cg.a_reg_sync(list,sym.initialloc.register64.reghi);
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end
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else
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{$endif not cpu64bitalu}
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{$endif cpu64bitalu}
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cg.a_reg_sync(list,sym.initialloc.register);
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end;
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sym.localloc:=sym.initialloc;
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@ -897,7 +928,53 @@ implementation
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LOC_REGISTER,
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LOC_CREGISTER :
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begin
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if (para.size in [OS_128,OS_S128,OS_F128]) and
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({ in case of fpu emulation, or abi's that pass fpu values
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via integer registers }
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(vardef.typ=floatdef) or
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is_methodpointer(vardef)) then
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begin
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case paraloc^.loc of
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LOC_REGISTER:
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begin
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if not assigned(paraloc^.next) then
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internalerror(200410104);
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if (target_info.endian=ENDIAN_BIG) then
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begin
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{ paraloc^ -> high
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paraloc^.next -> low }
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unget_para(paraloc^);
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gen_alloc_regloc(list,destloc);
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{ reg->reg, alignment is irrelevant }
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cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reghi,8);
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unget_para(paraloc^.next^);
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cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reglo,8);
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end
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else
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begin
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{ paraloc^ -> low
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paraloc^.next -> high }
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unget_para(paraloc^);
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gen_alloc_regloc(list,destloc);
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cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reglo,8);
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unget_para(paraloc^.next^);
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cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reghi,8);
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end;
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end;
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LOC_REFERENCE:
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begin
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gen_alloc_regloc(list,destloc);
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reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
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cg128.a_load128_ref_reg(list,href,destloc.register128);
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unget_para(paraloc^);
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end;
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else
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internalerror(2012090607);
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end
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end
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else
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{$else cpu64bitalu}
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if (para.size in [OS_64,OS_S64,OS_F64]) and
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(is_64bit(vardef) or
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{ in case of fpu emulation, or abi's that pass fpu values
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@ -944,7 +1021,7 @@ implementation
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end
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end
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else
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{$endif not cpu64bitalu}
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{$endif cpu64bitalu}
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begin
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if assigned(paraloc^.next) then
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internalerror(200410105);
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@ -1520,14 +1597,21 @@ implementation
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begin
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case location.loc of
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LOC_CREGISTER:
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{$ifndef cpu64bitalu}
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{$ifdef cpu64bitalu}
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if location.size in [OS_128,OS_S128] then
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begin
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rv.intregvars.addnodup(getsupreg(location.register128.reglo));
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rv.intregvars.addnodup(getsupreg(location.register128.reghi));
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end
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else
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{$else cpu64bitalu}
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if location.size in [OS_64,OS_S64] then
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begin
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rv.intregvars.addnodup(getsupreg(location.register64.reglo));
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rv.intregvars.addnodup(getsupreg(location.register64.reghi));
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end
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else
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{$endif not cpu64bitalu}
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{$endif cpu64bitalu}
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rv.intregvars.addnodup(getsupreg(location.register));
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LOC_CFPUREGISTER:
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rv.fpuregvars.addnodup(getsupreg(location.register));
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@ -359,7 +359,7 @@ implementation
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reg_cgsize:=OS_32
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end
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else
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internalerror(200303181);
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internalerror(2003031801);
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end;
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end;
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