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* converted register_maybe_adjust_setbase() to the high level code generator

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git-svn-id: trunk@32591 -
This commit is contained in:
Jonas Maebe 2015-12-05 18:03:37 +00:00
parent ab22aaa2b7
commit da696057ab
9 changed files with 21 additions and 21 deletions
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4
compiler/arm/narmset.pas
View File

@ -105,8 +105,8 @@ implementation
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
left.resultdef, opdef, true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList, left.location,
setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef,
left.location, setbase);
hlcg.location_force_reg(current_asmdata.CurrAsmList, right.location,
right.resultdef, right.resultdef, true);

2
compiler/ncgadd.pas
View File

@ -350,7 +350,7 @@ interface
tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,mask,tmpreg);
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,resultdef,right.location,setbase);
hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
right.location.register,tmpreg);
if left.location.loc <> LOC_CONSTANT then

2
compiler/ncginl.pas
View File

@ -510,7 +510,7 @@ implementation
else
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList,elepara.location,elepara.resultdef,u32inttype,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,elepara.location,tsetdef(setpara.resultdef).setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,elepara.location,tsetdef(setpara.resultdef).setbase);
hlcg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
u32inttype,setpara.resultdef,elepara.location.register,setpara.location);
end;

6
compiler/ncgset.pas
View File

@ -194,7 +194,7 @@ implementation
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
left.resultdef, opdef, true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList, left.location,
register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
setbase);
hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
right.resultdef, resultdef, left.location.register, right.location,
@ -395,7 +395,7 @@ implementation
{ load left in register }
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
{ emit bit test operation -- warning: do not use
location_force_reg() to force a set into a register, except
to a register of the same size as the set. The reason is
@ -434,7 +434,7 @@ implementation
else
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
pleftreg := left.location.register;
if (opsize >= OS_S8) or { = if signed }

10
compiler/ncgutil.pas
View File

@ -71,7 +71,7 @@ interface
set to LOC_CREGISTER/LOC_CFPUREGISTER/... }
procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
procedure register_maybe_adjust_setbase(list: TAsmList; opdef: tdef; var l: tlocation; setbase: aint);
function has_alias_name(pd:tprocdef;const s:string):boolean;
@ -485,7 +485,7 @@ implementation
*****************************************************************************}
procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
procedure register_maybe_adjust_setbase(list: TAsmList; opdef: tdef; var l: tlocation; setbase: aint);
var
tmpreg: tregister;
begin
@ -497,14 +497,14 @@ implementation
case l.loc of
LOC_CREGISTER:
begin
tmpreg := cg.getintregister(list,l.size);
cg.a_op_const_reg_reg(list,OP_SUB,l.size,setbase,l.register,tmpreg);
tmpreg := hlcg.getintregister(list,opdef);
hlcg.a_op_const_reg_reg(list,OP_SUB,opdef,setbase,l.register,tmpreg);
l.loc:=LOC_REGISTER;
l.register:=tmpreg;
end;
LOC_REGISTER:
begin
cg.a_op_const_reg(list,OP_SUB,l.size,setbase,l.register);
hlcg.a_op_const_reg(list,OP_SUB,opdef,setbase,l.register);
end;
end;
end;

2
compiler/ppcgen/ngppcadd.pas
View File

@ -451,7 +451,7 @@ implementation
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,true);
tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,aint((aword(1) shl (resultdef.size*8-1))),tmpreg);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,right.location,setbase);
cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_INT,
right.location.register,tmpreg);
if left.location.loc <> LOC_CONSTANT then

2
compiler/x86/nx86add.pas
View File

@ -494,7 +494,7 @@ unit nx86add;
{ bts requires both elements to be registers }
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,right.location,setbase);
op:=A_BTS;
noswap:=true;
end

2
compiler/x86/nx86inl.pas
View File

@ -730,7 +730,7 @@ implementation
asmop:=A_BTR;
hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,opdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.resultdef,tcallparanode(tcallparanode(left).right).left.location,setbase);
hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)

12
compiler/x86/nx86set.pas
View File

@ -540,7 +540,7 @@ implementation
else
begin
{$ifdef i8086}
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.resultdef,left.location,setbase);
cg.getcpuregister(current_asmdata.CurrAsmList,NR_CX);
if TCGSize2Size[left.location.size] > 2 then
left.location.size := OS_16;
@ -572,7 +572,7 @@ implementation
location.resflags:=F_NE;
{$else i8086}
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,left.location,setbase);
if (tcgsize2size[right.location.size] < 4) or
(right.location.loc = LOC_CONSTANT) then
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,true);
@ -610,7 +610,7 @@ implementation
(setbase<>0) then
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
end;
cg.getcpuregister(current_asmdata.CurrAsmList,NR_CX);
@ -640,7 +640,7 @@ implementation
(setbase<>0) then
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
end;
case left.location.loc of
@ -707,7 +707,7 @@ implementation
begin
{$ifdef i8086}
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
if TCGSize2Size[left.location.size] > 2 then
left.location.size := OS_16;
@ -796,7 +796,7 @@ implementation
end;
{$else i8086}
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,true);
pleftreg:=left.location.register;