mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-21 15:29:25 +02:00
totally messy m68k changes. cleanup in progress
git-svn-id: trunk@2352 -
This commit is contained in:
Károly Balogh
parent
ea2af1b3aa
commit
db07870443
2
.gitattributes
vendored
2
.gitattributes
vendored
@ -179,10 +179,10 @@ compiler/m68k/cpupi.pas svneol=native#text/plain
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compiler/m68k/cpuswtch.pas svneol=native#text/plain
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compiler/m68k/cputarg.pas svneol=native#text/plain
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compiler/m68k/itcpugas.pas svneol=native#text/plain
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compiler/m68k/n68kadd.pas svneol=native#text/plain
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compiler/m68k/n68kcal.pas svneol=native#text/plain
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compiler/m68k/n68kcnv.pas svneol=native#text/plain
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compiler/m68k/n68kmat.pas svneol=native#text/plain
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compiler/m68k/ncpuadd.pas svneol=native#text/plain
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compiler/m68k/r68kcon.inc svneol=native#text/plain
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compiler/m68k/r68kgas.inc svneol=native#text/plain
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compiler/m68k/r68kgri.inc svneol=native#text/plain
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@ -311,11 +311,15 @@ unit cgcpu;
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procedure tcg68k.a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);
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var
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href : treference;
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// p: pointer;
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begin
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if getregtype(r)=R_ADDRESSREGISTER then
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begin
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internalerror(2002072901);
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end;
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{$WARNING FIX ME!!! take a look on this mess again...}
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// if getregtype(r)=R_ADDRESSREGISTER then
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// begin
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// writeln('address reg?!?');
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// p:=nil; dword(p^):=0; {DEBUG CODE... :D )
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// internalerror(2002072901);
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// end;
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href:=ref;
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fixref(list, href);
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list.concat(taicpu.op_ref_reg(A_LEA,S_L,href,r));
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@ -400,16 +400,31 @@ implementation
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end;
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function cgsize2subreg(s:Tcgsize):Tsubregister;
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var p: pointer;
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begin
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case s of
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OS_NO: begin
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{$WARNING FIX ME!!! results in bad code generation}
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cgsize2subreg:=R_SUBWHOLE;
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end;
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OS_8,OS_S8:
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cgsize2subreg:=R_SUBWHOLE;
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OS_16,OS_S16:
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cgsize2subreg:=R_SUBWHOLE;
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OS_32,OS_S32:
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cgsize2subreg:=R_SUBWHOLE;
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else
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internalerror(200301231);
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OS_64,OS_S64:
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begin
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writeln('64bit regsize?');
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cgsize2subreg:=R_SUBWHOLE;
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end;
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else begin
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writeln('miafasz?');
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// p:=nil; dword(p^):=0;
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// internalerror(200301231);
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cgsize2subreg:=R_SUBWHOLE;
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end;
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end;
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end;
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@ -34,7 +34,7 @@ unit cpunode;
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the processor specific nodes must be included
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after the generic one (FK)
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}
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ncpuadd,
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n68kadd,
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n68kcal,
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// nppccon,
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// nppcflw,
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@ -19,7 +19,7 @@
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****************************************************************************
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}
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unit ncpuadd;
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unit n68kadd;
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{$i fpcdefs.inc}
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@ -31,12 +31,13 @@ interface
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type
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t68kaddnode = class(tcgaddnode)
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private
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function getresflags(unsigned: boolean) : tresflags;
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protected
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procedure second_cmpordinal;override;
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procedure second_cmpsmallset;override;
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procedure second_cmp64bit;override;
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procedure second_cmpboolean;override;
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private
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function getresflags(unsigned: boolean) : tresflags;
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procedure second_cmpboolean;override;
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end;
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@ -146,7 +147,7 @@ implementation
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exprasmlist.concat(taicpu.op_reg_reg(A_AND,S_L,
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right.location.register,left.location.register));
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end;
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cg.ungetcpuregister(exprasmlist,tmpreg);
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// cg.ungetcpuregister(exprasmlist,tmpreg);
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location.resflags := getresflags(true);
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end;
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else
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@ -168,7 +169,8 @@ implementation
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tmpreg : tregister;
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op : tasmop;
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begin
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writeln('second_cmpordinal');
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// writeln('second_cmpordinal');
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pass_left_right;
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{ set result location }
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location_reset(location,LOC_JUMP,OS_NO);
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@ -227,7 +229,7 @@ implementation
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begin
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exprasmlist.concat(taicpu.op_reg_reg(op,S_L,
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left.location.register,tmpreg));
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cg.ungetcpuregister(exprasmlist,tmpreg);
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// cg.ungetcpuregister(exprasmlist,tmpreg);
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end
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else
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exprasmlist.concat(taicpu.op_reg_reg(op,S_L,
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@ -245,6 +247,7 @@ implementation
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isjump : boolean;
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otl,ofl : tasmlabel;
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begin
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// writeln('second_cmpboolean');
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if (torddef(left.resulttype.def).typ=bool8bit) or
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(torddef(right.resulttype.def).typ=bool8bit) then
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cgsize:=OS_8
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@ -270,8 +273,11 @@ implementation
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objectlibrary.getjumplabel(falselabel);
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end;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then begin
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// writeln('ajjaj');
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location_force_reg(exprasmlist,left.location,cgsize,false);
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// writeln('reccs?');
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end;
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if isjump then
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begin
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truelabel:=otl;
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@ -160,6 +160,7 @@ implementation
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resflags : tresflags;
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opsize : tcgsize;
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begin
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secondpass(left);
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{ byte(boolean) or word(wordbool) or longint(longbool) must }
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{ be accepted for var parameters }
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if (nf_explicit in flags) and
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@ -186,7 +187,7 @@ implementation
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cg.a_load_ref_reg(exprasmlist,opsize,opsize,
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left.location.reference,hreg2);
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exprasmlist.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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cg.ungetcpuregister(exprasmlist,hreg2);
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// cg.ungetcpuregister(exprasmlist,hreg2);
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end;
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// reference_release(exprasmlist,left.location.reference);
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resflags:=F_NE;
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@ -196,7 +197,7 @@ implementation
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begin
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hreg2:=left.location.register;
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exprasmlist.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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cg.ungetcpuregister(exprasmlist,hreg2);
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// cg.ungetcpuregister(exprasmlist,hreg2);
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hreg1:=cg.getintregister(exprasmlist,opsize);
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resflags:=F_NE;
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end;
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@ -206,7 +207,7 @@ implementation
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resflags:=left.location.resflags;
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end;
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else
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internalerror(10062);
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internalerror(200512182);
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end;
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cg.g_flags2reg(exprasmlist,location.size,resflags,hreg1);
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location.register := hreg1;
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@ -40,6 +40,11 @@ interface
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procedure emit_mod_reg_reg(signed: boolean;denum,num : tregister);override;
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end;
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tm68kshlshrnode = class(tshlshrnode)
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procedure pass_2;override;
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{ everything will be handled in pass_2 }
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function first_shlshr64bitint: tnode; override;
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end;
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implementation
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@ -179,12 +184,14 @@ implementation
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end;
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end;
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procedure tm68kmoddivnode.emit_mod_reg_reg(signed: boolean;denum,num : tregister);
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var tmpreg : tregister;
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continuelabel : tasmlabel;
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signlabel : tasmlabel;
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reg_d0,reg_d1 : tregister;
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begin
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// writeln('emit mod reg reg');
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{ no RTL call, so inline a zero denominator verification }
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if aktoptprocessor <> MC68000 then
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begin
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@ -217,7 +224,7 @@ implementation
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_DIVUL,S_L,denum,tmpreg,num));
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{ remainder in tmpreg }
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cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,tmpreg,denum);
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cg.ungetcpuregister(exprasmlist,tmpreg);
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// cg.ungetcpuregister(exprasmlist,tmpreg);
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end
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else
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begin
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@ -238,11 +245,116 @@ implementation
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cg.ungetcpuregister(exprasmlist,Reg_D0);
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cg.ungetcpuregister(exprasmlist,Reg_D1);
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end;
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// writeln('exits');
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end;
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{*****************************************************************************
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TM68KSHLRSHRNODE
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*****************************************************************************}
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function tm68kShlShrNode.first_shlshr64bitint:TNode;
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begin
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{ 2nd pass is our friend }
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result := nil;
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end;
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{$WARNING FIX ME!!! shlshrnode needs review}
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procedure tm68kshlshrnode.pass_2;
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var
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hregister,resultreg,hregister1,
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hreg64hi,hreg64lo : tregister;
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op : topcg;
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shiftval: aword;
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begin
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secondpass(left);
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secondpass(right);
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if is_64bit(left.resulttype.def) then
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begin
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location_reset(location,LOC_REGISTER,OS_64);
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{ load left operator in a register }
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location_force_reg(exprasmlist,left.location,OS_64,false);
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hreg64hi:=left.location.register64.reghi;
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hreg64lo:=left.location.register64.reglo;
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shiftval := tordconstnode(right).value and 63;
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if shiftval > 31 then
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begin
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if nodetype = shln then
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begin
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cg.a_load_const_reg(exprasmlist,OS_32,0,hreg64hi);
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if (shiftval and 31) <> 0 then
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cg.a_op_const_reg_reg(exprasmlist,OP_SHL,OS_32,shiftval and 31,hreg64lo,hreg64lo);
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end
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else
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begin
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cg.a_load_const_reg(exprasmlist,OS_32,0,hreg64lo);
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if (shiftval and 31) <> 0 then
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cg.a_op_const_reg_reg(exprasmlist,OP_SHR,OS_32,shiftval and 31,hreg64hi,hreg64hi);
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end;
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location.register64.reglo:=hreg64hi;
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location.register64.reghi:=hreg64lo;
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end
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else
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begin
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hregister:=cg.getintregister(exprasmlist,OS_32);
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if nodetype = shln then
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begin
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cg.a_op_const_reg_reg(exprasmlist,OP_SHR,OS_32,32-shiftval,hreg64lo,hregister);
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cg.a_op_const_reg_reg(exprasmlist,OP_SHL,OS_32,shiftval,hreg64hi,hreg64hi);
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cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_32,hregister,hreg64hi,hreg64hi);
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cg.a_op_const_reg_reg(exprasmlist,OP_SHL,OS_32,shiftval,hreg64lo,hreg64lo);
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end
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else
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begin
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cg.a_op_const_reg_reg(exprasmlist,OP_SHL,OS_32,32-shiftval,hreg64hi,hregister);
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cg.a_op_const_reg_reg(exprasmlist,OP_SHR,OS_32,shiftval,hreg64lo,hreg64lo);
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cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_32,hregister,hreg64lo,hreg64lo);
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cg.a_op_const_reg_reg(exprasmlist,OP_SHR,OS_32,shiftval,hreg64hi,hreg64hi);
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end;
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location.register64.reghi:=hreg64hi;
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location.register64.reglo:=hreg64lo;
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end;
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end
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else
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begin
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{ load left operators in a register }
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location_force_reg(exprasmlist,left.location,def_cgsize(left.resulttype.def),true);
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location_copy(location,left.location);
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resultreg := location.register;
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hregister1 := location.register;
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if (location.loc = LOC_CREGISTER) then
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begin
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location.loc := LOC_REGISTER;
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resultreg := cg.GetIntRegister(exprasmlist,OS_INT);
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location.register := resultreg;
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end;
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{ determine operator }
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if nodetype=shln then
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op:=OP_SHL
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else
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op:=OP_SHR;
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{ shifting by a constant directly coded: }
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if (right.nodetype=ordconstn) then
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begin
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if tordconstnode(right).value and 31<>0 then
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cg.a_op_const_reg_reg(exprasmlist,op,OS_32,tordconstnode(right).value and 31,hregister1,resultreg)
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end
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else
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begin
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{ load shift count in a register if necessary }
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location_force_reg(exprasmlist,right.location,def_cgsize(right.resulttype.def),true);
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cg.a_op_reg_reg_reg(exprasmlist,op,OS_32,right.location.register,hregister1,resultreg);
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end;
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end;
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end;
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begin
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cnotnode:=tm68knotnode;
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cmoddivnode:=tm68kmoddivnode;
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cshlshrnode:=tm68kshlshrnode;
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end.
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@ -35,7 +35,7 @@ unit ra68k;
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Tm68kInstruction=class(TInstruction)
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opsize : topsize;
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function ConcatInstruction(p : taasmoutput):tai;override;
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// function ConcatInstruction(p : taasmoutput):tai;override;
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function ConcatLabeledInstr(p : taasmoutput):tai;
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end;
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@ -48,10 +48,12 @@ unit ra68k;
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TM68kInstruction
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*****************************************************************************}
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{
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function TM68kInstruction.ConcatInstruction(p : taasmoutput):tai;
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var
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fits : boolean;
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begin
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writeln('jaj mami');
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result:=nil;
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fits := FALSE;
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{ setup specific opcodetions for first pass }
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@ -317,7 +319,7 @@ unit ra68k;
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if assigned(result) then
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p.concat(result);
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end;
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}
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function TM68kInstruction.ConcatLabeledInstr(p : taasmoutput):tai;
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begin
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@ -524,10 +524,14 @@ const
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{---------------------------------------------------------------------}
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function tm68kmotreader.consume(t : tasmtoken):boolean;
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var
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p: pointer;
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begin
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Consume:=true;
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if t<>actasmtoken then
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begin
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p:=nil;
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dword(p^):=0;
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Message2(scan_f_syn_expected,token2str[t],token2str[actasmtoken]);
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Consume:=false;
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end;
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@ -1274,6 +1278,7 @@ const
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{ AS_COMMA or AS_SEPARATOR token. }
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{*********************************************************************}
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var
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expr: string;
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tempstr: string;
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lab: tasmlabel;
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l : longint;
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@ -1282,6 +1287,7 @@ const
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hl: tasmlabel;
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reg_one, reg_two: tregister;
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regset: tcpuregisterset;
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p: pointer;
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begin
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regset := [];
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tempstr := '';
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@ -1344,7 +1350,7 @@ const
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end;
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Consume(AS_ID);
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if not (actasmtoken in [AS_SEPARATOR,AS_COMMA]) then
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Message(asmr_e_syntax_error);
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Message(asmr_e_syntax_error);
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end
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{ probably a variable or normal expression }
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{ or a procedure (such as in CALL ID) }
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@ -1358,7 +1364,7 @@ const
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BuildReference(oper);
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end
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else { is it a label variable ? }
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begin
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{ // ID[ , ID.Field.Field or simple ID // }
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{ check if this is a label, if so then }
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{ emit it as a label. }
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@ -1371,22 +1377,62 @@ const
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Consume(AS_ID);
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if not (actasmtoken in [AS_SEPARATOR,AS_COMMA]) then
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Message(asmr_e_syntax_error);
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end
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else
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Message1(sym_e_unknown_id,actasmpattern);
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else begin
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expr:=actasmpattern;
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Consume(AS_ID);
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{ typecasting? }
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if SearchType(expr,l) then
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begin
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oper.hastype:=true;
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oper.typesize:=l;
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case actasmtoken of
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AS_LPAREN :
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begin
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{ Support Type([Reference]) }
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Consume(AS_LPAREN);
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BuildOperand(oper{,true});
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Consume(AS_RPAREN);
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end;
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AS_LBRACKET :
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begin
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{ Support Var.Type[Index] }
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{ Convert @label.Byte[1] to reference }
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if oper.opr.typ=OPR_SYMBOL then
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oper.initref;
|
||||
end;
|
||||
end;
|
||||
end
|
||||
else
|
||||
begin
|
||||
if not oper.SetupVar(expr,false) then
|
||||
begin
|
||||
{ not a variable, check special variables.. }
|
||||
if expr = 'SELF' then
|
||||
oper.SetupSelf
|
||||
else begin
|
||||
writeln('unknown id: ',expr);
|
||||
Message1(sym_e_unknown_id,expr);
|
||||
end;
|
||||
expr:='';
|
||||
end;
|
||||
end;
|
||||
// Message1(sym_e_unknown_id,actasmpattern);
|
||||
end;
|
||||
|
||||
Consume(AS_ID);
|
||||
case actasmtoken of
|
||||
AS_LPAREN: { indexing }
|
||||
BuildReference(oper);
|
||||
AS_SEPARATOR,AS_COMMA: ;
|
||||
else
|
||||
Message(asmr_e_syntax_error);
|
||||
AS_SEPARATOR,AS_COMMA: begin
|
||||
end;
|
||||
else
|
||||
Message(asmr_e_syntax_error);
|
||||
end;
|
||||
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
|
||||
{ // Pre-decrement mode reference or constant mem offset. // }
|
||||
AS_MINUS: begin
|
||||
Consume(AS_MINUS);
|
||||
@ -1546,6 +1592,7 @@ const
|
||||
AS_SEPARATOR, AS_COMMA: ;
|
||||
else
|
||||
begin
|
||||
writeln('looofasz');
|
||||
Message(asmr_e_invalid_opcode_and_operand);
|
||||
Consume(actasmtoken);
|
||||
end;
|
||||
@ -1729,8 +1776,9 @@ const
|
||||
{ instr.CheckOperandSizes;}
|
||||
if instr.labeled then
|
||||
instr.ConcatLabeledInstr(curlist)
|
||||
else
|
||||
else begin
|
||||
instr.ConcatInstruction(curlist);
|
||||
end;
|
||||
instr.Free;
|
||||
{
|
||||
instr.init;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user