From ddba821561fde59d20a8860b52748411f73f6976 Mon Sep 17 00:00:00 2001 From: nickysn Date: Mon, 11 Sep 2017 14:53:06 +0000 Subject: [PATCH] * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved from cpubase unit to a method in the tcg class. The reason for doing that is that this is now a standard part of the 16-bit and 8-bit code generators and moving to the tcg class allows doing extra checks (not done yet, but for example, in the future, we can keep track of whether there was an extra register allocated with getintregister and halt with an internalerror in case GetNextReg() is called for registers, which weren't allocated as a part of a sequence, therefore catching a certain class of 8-bit and 16-bit code generator bugs at compile time, instead of generating wrong code). - removed GetLastReg() from avr's cpubase unit, because it isn't used for anything. It might be added to the tcg class, in case it's ever needed, but for now I've left it out. * GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit. git-svn-id: trunk@37180 - --- compiler/avr/cgcpu.pas | 32 ++++++++ compiler/avr/cpubase.pas | 45 ---------- compiler/avr/navradd.pas | 8 +- compiler/avr/rgcpu.pas | 4 +- compiler/cgobj.pas | 11 +++ compiler/cgutils.pas | 29 +++---- compiler/i8086/cgcpu.pas | 159 +++++++++++++++++++----------------- compiler/i8086/hlcgcpu.pas | 14 ++-- compiler/i8086/n8086add.pas | 48 +++++------ compiler/i8086/n8086inl.pas | 30 +++---- compiler/i8086/n8086mem.pas | 2 +- compiler/ncgbas.pas | 26 +++--- compiler/ncgset.pas | 130 ++++++++++++++--------------- compiler/ncgutil.pas | 110 ++++++++++++------------- compiler/x86/cpubase.pas | 14 ---- compiler/x86/nx86cnv.pas | 10 +-- compiler/x86/nx86mat.pas | 6 +- 17 files changed, 338 insertions(+), 340 deletions(-) diff --git a/compiler/avr/cgcpu.pas b/compiler/avr/cgcpu.pas index a797ba795f..2a38ba2fcb 100644 --- a/compiler/avr/cgcpu.pas +++ b/compiler/avr/cgcpu.pas @@ -47,6 +47,11 @@ unit cgcpu; function getintregister(list:TAsmList;size:Tcgsize):Tregister;override; function getaddressregister(list:TAsmList):TRegister;override; + function GetHigh(const r : TRegister) : TRegister;inline; + function GetNextReg(const r: TRegister): TRegister;override; + function GetOffsetReg(const r: TRegister;ofs : shortint): TRegister;override; + function GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister;override; + procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override; procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override; procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override; @@ -202,6 +207,33 @@ unit cgcpu; end; + function tcgavr.GetHigh(const r : TRegister) : TRegister; + begin + result:=GetNextReg(r); + end; + + + function tcgavr.GetNextReg(const r: TRegister): TRegister; + begin + result:=TRegister(longint(r)+1); + end; + + + function tcgavr.GetOffsetReg(const r: TRegister;ofs : shortint): TRegister; + begin + result:=TRegister(longint(r)+ofs); + end; + + + function tcgavr.GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister; + begin + if ofs>3 then + result:=TRegister(longint(rhi)+ofs-4) + else + result:=TRegister(longint(r)+ofs); + end; + + procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara); procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation); diff --git a/compiler/avr/cpubase.pas b/compiler/avr/cpubase.pas index f36cc5aeae..91ecf6ef79 100644 --- a/compiler/avr/cpubase.pas +++ b/compiler/avr/cpubase.pas @@ -318,18 +318,6 @@ unit cpubase; function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE} function dwarf_reg(r:tregister):byte; - function GetHigh(const r : TRegister) : TRegister; - - { returns the next virtual register } - function GetNextReg(const r : TRegister) : TRegister; - - { returns the last virtual register } - function GetLastReg(const r : TRegister) : TRegister; - - { returns the register with the offset of ofs of a continuous set of register starting with r } - function GetOffsetReg(const r : TRegister;ofs : shortint) : TRegister; - { returns the register with the offset of ofs of a continuous set of register starting with r and being continued with rhi } - function GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister; function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE} @@ -453,39 +441,6 @@ unit cpubase; end; - function GetHigh(const r : TRegister) : TRegister; - begin - result:=TRegister(longint(r)+1) - end; - - - function GetNextReg(const r: TRegister): TRegister; - begin - result:=TRegister(longint(r)+1); - end; - - - function GetLastReg(const r: TRegister): TRegister; - begin - result:=TRegister(longint(r)-1); - end; - - - function GetOffsetReg(const r: TRegister;ofs : shortint): TRegister; - begin - result:=TRegister(longint(r)+ofs); - end; - - - function GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister; - begin - if ofs>3 then - result:=TRegister(longint(rhi)+ofs-4) - else - result:=TRegister(longint(r)+ofs); - end; - - function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE} begin is_calljmp:= o in call_jmp_instructions; diff --git a/compiler/avr/navradd.pas b/compiler/avr/navradd.pas index 1bb22d195c..84a3342631 100644 --- a/compiler/avr/navradd.pas +++ b/compiler/avr/navradd.pas @@ -137,8 +137,8 @@ interface current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CP,tmpreg1,tmpreg2)); for i:=2 to tcgsize2size[left.location.size] do begin - tmpreg1:=GetNextReg(tmpreg1); - tmpreg2:=GetNextReg(tmpreg2); + tmpreg1:=cg.GetNextReg(tmpreg1); + tmpreg2:=cg.GetNextReg(tmpreg2); current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CPC,tmpreg1,tmpreg2)); end; end; @@ -231,9 +231,9 @@ interface else begin if left.location.loc<>LOC_CONSTANT then - tmpreg1:=GetNextReg(tmpreg1); + tmpreg1:=cg.GetNextReg(tmpreg1); if right.location.loc<>LOC_CONSTANT then - tmpreg2:=GetNextReg(tmpreg2); + tmpreg2:=cg.GetNextReg(tmpreg2); end; if right.location.loc=LOC_CONSTANT then begin diff --git a/compiler/avr/rgcpu.pas b/compiler/avr/rgcpu.pas index 50e84ac160..c925c7c25b 100644 --- a/compiler/avr/rgcpu.pas +++ b/compiler/avr/rgcpu.pas @@ -102,7 +102,7 @@ unit rgcpu; helplist.concat(taicpu.op_reg_const(A_LDI,NR_R26,lo(word(spilltemp.offset)))); helplist.concat(taicpu.op_reg_const(A_LDI,NR_R27,hi(word(spilltemp.offset)))); helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base)); - helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,GetNextReg(spilltemp.base))); + helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,cg.GetNextReg(spilltemp.base))); reference_reset_base(tmpref,NR_R26,0,1,[]); helpins:=spilling_create_load(tmpref,tempreg); @@ -128,7 +128,7 @@ unit rgcpu; helplist.concat(taicpu.op_reg_const(A_LDI,NR_R26,lo(word(spilltemp.offset)))); helplist.concat(taicpu.op_reg_const(A_LDI,NR_R27,hi(word(spilltemp.offset)))); helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base)); - helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,GetNextReg(spilltemp.base))); + helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,cg.GetNextReg(spilltemp.base))); reference_reset_base(tmpref,NR_R26,0,1,[]); helplist.concat(spilling_create_store(tempreg,tmpref)); diff --git a/compiler/cgobj.pas b/compiler/cgobj.pas index 84eace318d..2faaf5192f 100644 --- a/compiler/cgobj.pas +++ b/compiler/cgobj.pas @@ -89,6 +89,17 @@ unit cgobj; {Does the generic cg need SIMD registers, like getmmxregister? Or should the cpu specific child cg object have such a method?} +{$if defined(cpu8bitalu) or defined(cpu16bitalu)} + {# returns the next virtual register } + function GetNextReg(const r: TRegister): TRegister;virtual;abstract; +{$endif cpu8bitalu or cpu16bitalu} +{$ifdef cpu8bitalu} + {# returns the register with the offset of ofs of a continuous set of register starting with r } + function GetOffsetReg(const r : TRegister;ofs : shortint) : TRegister;virtual;abstract; + {# returns the register with the offset of ofs of a continuous set of register starting with r and being continued with rhi } + function GetOffsetReg64(const r,rhi: TRegister;ofs : shortint): TRegister;virtual;abstract; +{$endif cpu8bitalu} + procedure add_reg_instruction(instr:Tai;r:tregister);virtual; procedure add_move_instruction(instr:Taicpu);virtual; diff --git a/compiler/cgutils.pas b/compiler/cgutils.pas index e36642d8c5..124ca4016f 100644 --- a/compiler/cgutils.pas +++ b/compiler/cgutils.pas @@ -210,7 +210,8 @@ implementation uses systems, - verbose; + verbose, + cgobj; {**************************************************************************** TReference @@ -332,13 +333,13 @@ uses result:='??:'+std_regname(locreg.registerhi) +':??:'+std_regname(locreg.register) else - result:=std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi) - +':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register); + result:=std_regname(cg.GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi) + +':'+std_regname(cg.GetNextReg(locreg.register))+':'+std_regname(locreg.register); OS_32,OS_S32: if getsupreg(locreg.register)R_INTREGISTER then + internalerror(2017091101); + if getsubreg(r)<>R_SUBW then + internalerror(2017091102); + result:=TRegister(longint(r)+1); + end; + + procedure tcg8086.a_call_name(list: TAsmList; const s: string; weak: boolean); begin if current_settings.x86memorymodel in x86_far_code_models then @@ -2794,11 +2807,11 @@ unit cgcpu; cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_ref_reg(op1,S_W,tempref,reg.reglo)); inc(tempref.offset,2); - list.concat(taicpu.op_ref_reg(op2,S_W,tempref,GetNextReg(reg.reglo))); + list.concat(taicpu.op_ref_reg(op2,S_W,tempref,cg.GetNextReg(reg.reglo))); inc(tempref.offset,2); list.concat(taicpu.op_ref_reg(op2,S_W,tempref,reg.reghi)); inc(tempref.offset,2); - list.concat(taicpu.op_ref_reg(op2,S_W,tempref,GetNextReg(reg.reghi))); + list.concat(taicpu.op_ref_reg(op2,S_W,tempref,cg.GetNextReg(reg.reghi))); if op in [OP_ADD,OP_SUB] then cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end @@ -2858,11 +2871,11 @@ unit cgcpu; cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_reg_ref(op1,S_W,reg.reglo,tempref)); inc(tempref.offset,2); - list.concat(taicpu.op_reg_ref(op2,S_W,GetNextReg(reg.reglo),tempref)); + list.concat(taicpu.op_reg_ref(op2,S_W,cg.GetNextReg(reg.reglo),tempref)); inc(tempref.offset,2); list.concat(taicpu.op_reg_ref(op2,S_W,reg.reghi,tempref)); inc(tempref.offset,2); - list.concat(taicpu.op_reg_ref(op2,S_W,GetNextReg(reg.reghi),tempref)); + list.concat(taicpu.op_reg_ref(op2,S_W,cg.GetNextReg(reg.reghi),tempref)); if op in [OP_ADD,OP_SUB] then cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -2882,12 +2895,12 @@ unit cgcpu; if (regsrc.reglo<>regdst.reglo) then a_load64_reg_reg(list,regsrc,regdst); cg.a_op_reg_reg(list,OP_NOT,OS_32,regdst.reghi,regdst.reghi); - list.concat(taicpu.op_reg(A_NOT,S_W,GetNextReg(regdst.reglo))); + list.concat(taicpu.op_reg(A_NOT,S_W,cg.GetNextReg(regdst.reglo))); cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_reg(A_NEG,S_W,regdst.reglo)); - list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,GetNextReg(regdst.reglo))); + list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,cg.GetNextReg(regdst.reglo))); list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,regdst.reghi)); - list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,GetNextReg(regdst.reghi))); + list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,cg.GetNextReg(regdst.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); exit; end; @@ -2918,17 +2931,17 @@ unit cgcpu; begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_const_reg(A_SHL,S_W,1,regdst.reglo)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(regdst.reglo))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(regdst.reglo))); list.concat(taicpu.op_const_reg(A_RCL,S_W,1,regdst.reghi)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(regdst.reghi))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(regdst.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; OP_SHR,OP_SAR: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); - cg.a_op_const_reg(list,op,OS_16,1,GetNextReg(regdst.reghi)); + cg.a_op_const_reg(list,op,OS_16,1,cg.GetNextReg(regdst.reghi)); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,regdst.reghi)); - list.concat(taicpu.op_const_reg(A_RCR,S_W,1,GetNextReg(regdst.reglo))); + list.concat(taicpu.op_const_reg(A_RCR,S_W,1,cg.GetNextReg(regdst.reglo))); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,regdst.reglo)); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -2946,9 +2959,9 @@ unit cgcpu; if op in [OP_ADD,OP_SUB] then cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_reg_reg(op1,S_W,regsrc.reglo,regdst.reglo)); - list.concat(taicpu.op_reg_reg(op2,S_W,GetNextReg(regsrc.reglo),GetNextReg(regdst.reglo))); + list.concat(taicpu.op_reg_reg(op2,S_W,cg.GetNextReg(regsrc.reglo),cg.GetNextReg(regdst.reglo))); list.concat(taicpu.op_reg_reg(op2,S_W,regsrc.reghi,regdst.reghi)); - list.concat(taicpu.op_reg_reg(op2,S_W,GetNextReg(regsrc.reghi),GetNextReg(regdst.reghi))); + list.concat(taicpu.op_reg_reg(op2,S_W,cg.GetNextReg(regsrc.reghi),cg.GetNextReg(regdst.reghi))); if op in [OP_ADD,OP_SUB] then cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -2972,31 +2985,31 @@ unit cgcpu; if (value and $ffffffffffff) = 0 then begin { use a_op_const_reg to allow the use of inc/dec } - cg.a_op_const_reg(list,op,OS_16,aint((value shr 48) and $ffff),GetNextReg(reg.reghi)); + cg.a_op_const_reg(list,op,OS_16,aint((value shr 48) and $ffff),cg.GetNextReg(reg.reghi)); end // can't use a_op_const_ref because this may use dec/inc else if (value and $ffffffff) = 0 then begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_const_reg(op1,S_W,aint((value shr 32) and $ffff),reg.reghi)); - list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end else if (value and $ffff) = 0 then begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); - list.concat(taicpu.op_const_reg(op1,S_W,aint((value shr 16) and $ffff),GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(op1,S_W,aint((value shr 16) and $ffff),cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 32) and $ffff),reg.reghi)); - list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end else begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_const_reg(op1,S_W,aint(value and $ffff),reg.reglo)); - list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 16) and $ffff),GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 16) and $ffff),cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 32) and $ffff),reg.reghi)); - list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; end; @@ -3012,17 +3025,17 @@ unit cgcpu; begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_const_reg(A_SHL,S_W,1,reg.reglo)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCL,S_W,1,reg.reghi)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; OP_SHR,OP_SAR: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); - cg.a_op_const_reg(list,op,OS_16,1,GetNextReg(reg.reghi)); + cg.a_op_const_reg(list,op,OS_16,1,cg.GetNextReg(reg.reghi)); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reghi)); - list.concat(taicpu.op_const_reg(A_RCR,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_RCR,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo)); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -3038,17 +3051,17 @@ unit cgcpu; begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); list.concat(taicpu.op_const_reg(A_SHL,S_W,1,reg.reglo)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCL,S_W,1,reg.reghi)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; OP_SHR,OP_SAR: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); - cg.a_op_const_reg(list,op,OS_16,1,GetNextReg(reg.reghi)); + cg.a_op_const_reg(list,op,OS_16,1,cg.GetNextReg(reg.reghi)); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reghi)); - list.concat(taicpu.op_const_reg(A_RCR,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_RCR,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo)); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -3063,24 +3076,24 @@ unit cgcpu; case op of OP_SHL: begin - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reghi)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reghi); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reglo,GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reghi); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reglo,cg.GetNextReg(reg.reglo)); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reglo,reg.reglo); end; OP_SHR: begin - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reglo); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reglo)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reghi); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reghi),GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reglo); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reghi),cg.GetNextReg(reg.reghi)); end; OP_SAR: begin - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reglo); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reglo)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reghi); - cg.a_op_const_reg(list,OP_SAR,OS_16,15,GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reglo); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi); + cg.a_op_const_reg(list,OP_SAR,OS_16,15,cg.GetNextReg(reg.reghi)); end; end; if value=17 then @@ -3088,16 +3101,16 @@ unit cgcpu; OP_SHL: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); - list.concat(taicpu.op_const_reg(A_SHL,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_SHL,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCL,S_W,1,reg.reghi)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; OP_SHR,OP_SAR: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); cg.a_op_const_reg(list,op,OS_16,1,reg.reghi); - list.concat(taicpu.op_const_reg(A_RCR,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_RCR,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo)); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -3108,24 +3121,24 @@ unit cgcpu; case op of OP_SHL: begin - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reghi)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reghi); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reglo,GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reghi); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reglo,cg.GetNextReg(reg.reglo)); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reglo,reg.reglo); end; OP_SHR: begin - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reglo); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reglo)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reghi); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reghi),GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reglo); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reghi),cg.GetNextReg(reg.reghi)); end; OP_SAR: begin - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reglo); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reglo)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reghi); - cg.a_op_const_reg(list,OP_SAR,OS_16,15,GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reglo); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi); + cg.a_op_const_reg(list,OP_SAR,OS_16,15,cg.GetNextReg(reg.reghi)); end; end; cg.getcpuregister(list,NR_CX); @@ -3136,16 +3149,16 @@ unit cgcpu; OP_SHL: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); - list.concat(taicpu.op_const_reg(A_SHL,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_SHL,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCL,S_W,1,reg.reghi)); - list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(reg.reghi))); + list.concat(taicpu.op_const_reg(A_RCL,S_W,1,cg.GetNextReg(reg.reghi))); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; OP_SHR,OP_SAR: begin cg.a_reg_alloc(list,NR_DEFAULTFLAGS); cg.a_op_const_reg(list,op,OS_16,1,reg.reghi); - list.concat(taicpu.op_const_reg(A_RCR,S_W,1,GetNextReg(reg.reglo))); + list.concat(taicpu.op_const_reg(A_RCR,S_W,1,cg.GetNextReg(reg.reglo))); list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo)); cg.a_reg_dealloc(list,NR_DEFAULTFLAGS); end; @@ -3161,53 +3174,53 @@ unit cgcpu; begin cg.a_op_const_reg_reg(list,OP_SHL,OS_32,value-32,reg.reglo,reg.reghi); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reglo,reg.reglo); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reglo),GetNextReg(reg.reglo)); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reglo),cg.GetNextReg(reg.reglo)); end; OP_SHR: begin cg.a_op_const_reg_reg(list,OP_SHR,OS_32,value-32,reg.reghi,reg.reglo); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reghi,reg.reghi); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reghi),GetNextReg(reg.reghi)); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reghi),cg.GetNextReg(reg.reghi)); end; OP_SAR: begin cg.a_op_const_reg_reg(list,OP_SAR,OS_32,value-32,reg.reghi,reg.reglo); - cg.a_op_const_reg_reg(list,OP_SAR,OS_16,15-(value-32),GetNextReg(reg.reglo),reg.reghi); - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,GetNextReg(reg.reghi)); + cg.a_op_const_reg_reg(list,OP_SAR,OS_16,15-(value-32),cg.GetNextReg(reg.reglo),reg.reghi); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reghi)); end; end; 48..63: case op of OP_SHL: begin - cg.a_load_reg_reg(list,OS_16,OS_16,reg.reglo,GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,reg.reglo,cg.GetNextReg(reg.reghi)); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reglo,reg.reglo); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reglo),GetNextReg(reg.reglo)); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reglo),cg.GetNextReg(reg.reglo)); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reghi,reg.reghi); - cg.a_op_const_reg(list,OP_SHL,OS_16,value-48,GetNextReg(reg.reghi)); + cg.a_op_const_reg(list,OP_SHL,OS_16,value-48,cg.GetNextReg(reg.reghi)); end; OP_SHR: begin - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reglo); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reghi),GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reglo); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reghi),cg.GetNextReg(reg.reghi)); cg.a_op_reg_reg(list,OP_XOR,OS_16,reg.reghi,reg.reghi); - cg.a_op_reg_reg(list,OP_XOR,OS_16,GetNextReg(reg.reglo),GetNextReg(reg.reglo)); + cg.a_op_reg_reg(list,OP_XOR,OS_16,cg.GetNextReg(reg.reglo),cg.GetNextReg(reg.reglo)); cg.a_op_const_reg(list,OP_SHR,OS_16,value-48,reg.reglo); end; OP_SAR: if value=63 then begin - cg.a_op_const_reg(list,OP_SAR,OS_16,15,GetNextReg(reg.reghi)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reghi); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),GetNextReg(reg.reglo)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reghi),reg.reglo); + cg.a_op_const_reg(list,OP_SAR,OS_16,15,cg.GetNextReg(reg.reghi)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),cg.GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reglo); end else begin - cg.a_op_const_reg_reg(list,OP_SAR,OS_16,value-48,GetNextReg(reg.reghi),reg.reglo); - cg.a_op_const_reg_reg(list,OP_SAR,OS_16,15-(value-48),reg.reglo,GetNextReg(reg.reglo)); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),reg.reghi); - cg.a_load_reg_reg(list,OS_16,OS_16,GetNextReg(reg.reglo),GetNextReg(reg.reghi)); + cg.a_op_const_reg_reg(list,OP_SAR,OS_16,value-48,cg.GetNextReg(reg.reghi),reg.reglo); + cg.a_op_const_reg_reg(list,OP_SAR,OS_16,15-(value-48),reg.reglo,cg.GetNextReg(reg.reglo)); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reghi); + cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),cg.GetNextReg(reg.reghi)); end; end; end; diff --git a/compiler/i8086/hlcgcpu.pas b/compiler/i8086/hlcgcpu.pas index b8f98e768d..98718d6a34 100644 --- a/compiler/i8086/hlcgcpu.pas +++ b/compiler/i8086/hlcgcpu.pas @@ -294,7 +294,7 @@ implementation x86pt_far, x86pt_huge: if reg<>NR_NO then - ref.segment:=GetNextReg(reg); + ref.segment:=cg.GetNextReg(reg); end; end; @@ -345,7 +345,7 @@ implementation if loc.registerhi<>tregister(0) then cg.a_load_reg_ref(list,OS_16,OS_16,loc.registerhi,tmpref) else - cg.a_load_reg_ref(list,OS_16,OS_16,GetNextReg(loc.register),tmpref); + cg.a_load_reg_ref(list,OS_16,OS_16,cg.GetNextReg(loc.register),tmpref); end else inherited a_load_loc_ref(list, fromsize, tosize, loc, ref); @@ -372,9 +372,9 @@ implementation if ref.segment<>NR_NO then begin if is_segment_reg(ref.segment) then - list.concat(Taicpu.op_reg_reg(A_MOV,S_W,ref.segment,GetNextReg(r))) + list.concat(Taicpu.op_reg_reg(A_MOV,S_W,ref.segment,cg.GetNextReg(r))) else - cg.a_load_reg_reg(list,OS_16,OS_16,ref.segment,GetNextReg(r)); + cg.a_load_reg_reg(list,OS_16,OS_16,ref.segment,cg.GetNextReg(r)); end { references relative to a symbol use the segment of the symbol, which can be obtained by the SEG directive } @@ -382,10 +382,10 @@ implementation begin reference_reset_symbol(segref,ref.symbol,0,ref.alignment,ref.volatility); segref.refaddr:=addr_seg; - cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_16,OS_16,segref,GetNextReg(r)); + cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_16,OS_16,segref,cg.GetNextReg(r)); end else if ref.base=NR_BP then - list.concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_SS,GetNextReg(r))) + list.concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_SS,cg.GetNextReg(r))) else internalerror(2014032801); end; @@ -702,7 +702,7 @@ implementation if l.registerhi<>tregister(0) then cg.a_load_reg_ref(list,OS_16,OS_16,l.registerhi,tmpref) else - cg.a_load_reg_ref(list,OS_16,OS_16,GetNextReg(l.register),tmpref); + cg.a_load_reg_ref(list,OS_16,OS_16,cg.GetNextReg(l.register),tmpref); location_reset_ref(l,LOC_REFERENCE,l.size,size.alignment,[]); l.reference:=r; diff --git a/compiler/i8086/n8086add.pas b/compiler/i8086/n8086add.pas index fc8ec9f667..ec5c26d164 100644 --- a/compiler/i8086/n8086add.pas +++ b/compiler/i8086/n8086add.pas @@ -291,15 +291,15 @@ interface r:=cg.getintregister(current_asmdata.CurrAsmList,OS_32); cg64.a_load64low_loc_reg(current_asmdata.CurrAsmList,right.location,r); emit_reg_reg(op1,S_W,left.location.register64.reglo,r); - emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reglo),GetNextReg(r)); + emit_reg_reg(op2,S_W,cg.GetNextReg(left.location.register64.reglo),cg.GetNextReg(r)); emit_reg_reg(A_MOV,S_W,r,left.location.register64.reglo); - emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reglo)); + emit_reg_reg(A_MOV,S_W,cg.GetNextReg(r),cg.GetNextReg(left.location.register64.reglo)); cg64.a_load64high_loc_reg(current_asmdata.CurrAsmList,right.location,r); { the carry flag is still ok } emit_reg_reg(op2,S_W,left.location.register64.reghi,r); - emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reghi),GetNextReg(r)); + emit_reg_reg(op2,S_W,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(r)); emit_reg_reg(A_MOV,S_W,r,left.location.register64.reghi); - emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reghi)); + emit_reg_reg(A_MOV,S_W,cg.GetNextReg(r),cg.GetNextReg(left.location.register64.reghi)); end else begin @@ -468,7 +468,7 @@ interface cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16, left.location.register,right.location.register,location.register); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16, - GetNextReg(pointernode.location.register),GetNextReg(location.register)); + cg.GetNextReg(pointernode.location.register),cg.GetNextReg(location.register)); end else begin @@ -478,7 +478,7 @@ interface cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16, right.location.value,left.location.register,location.register); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16, - GetNextReg(left.location.register),GetNextReg(location.register)); + cg.GetNextReg(left.location.register),cg.GetNextReg(location.register)); end else begin @@ -489,7 +489,7 @@ interface cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16, left.location.register,tmpreg,location.register); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16, - GetNextReg(tmpreg),GetNextReg(location.register)); + cg.GetNextReg(tmpreg),cg.GetNextReg(location.register)); end; end; end @@ -507,7 +507,7 @@ interface cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16, right.location.register,left.location.register,location.register); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16, - GetNextReg(pointernode.location.register),GetNextReg(location.register)); + cg.GetNextReg(pointernode.location.register),cg.GetNextReg(location.register)); end else begin @@ -515,7 +515,7 @@ interface cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16, right.location.value,left.location.register,location.register); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16, - GetNextReg(left.location.register),GetNextReg(location.register)); + cg.GetNextReg(left.location.register),cg.GetNextReg(location.register)); end; end else @@ -527,7 +527,7 @@ interface cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16, right.location.register,tmpreg,location.register); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16, - GetNextReg(tmpreg),GetNextReg(location.register)); + cg.GetNextReg(tmpreg),cg.GetNextReg(location.register)); end; end; end; @@ -696,11 +696,11 @@ interface { at this point, left.location.loc should be LOC_REGISTER } if right.location.loc=LOC_REGISTER then begin - emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi)); + emit_reg_reg(A_CMP,S_W,cg.GetNextReg(right.location.register64.reghi),cg.GetNextReg(left.location.register64.reghi)); firstjmp64bitcmp; emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi); middlejmp64bitcmp; - emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo)); + emit_reg_reg(A_CMP,S_W,cg.GetNextReg(right.location.register64.reglo),cg.GetNextReg(left.location.register64.reglo)); middlejmp64bitcmp; emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo); lastjmp64bitcmp; @@ -710,11 +710,11 @@ interface case right.location.loc of LOC_CREGISTER : begin - emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi)); + emit_reg_reg(A_CMP,S_W,cg.GetNextReg(right.location.register64.reghi),cg.GetNextReg(left.location.register64.reghi)); firstjmp64bitcmp; emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi); middlejmp64bitcmp; - emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo)); + emit_reg_reg(A_CMP,S_W,cg.GetNextReg(right.location.register64.reglo),cg.GetNextReg(left.location.register64.reglo)); middlejmp64bitcmp; emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo); lastjmp64bitcmp; @@ -725,13 +725,13 @@ interface tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference); href:=right.location.reference; inc(href.offset,6); - emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reghi)); + emit_ref_reg(A_CMP,S_W,href,cg.GetNextReg(left.location.register64.reghi)); firstjmp64bitcmp; dec(href.offset,2); emit_ref_reg(A_CMP,S_W,href,left.location.register64.reghi); middlejmp64bitcmp; dec(href.offset,2); - emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reglo)); + emit_ref_reg(A_CMP,S_W,href,cg.GetNextReg(left.location.register64.reglo)); middlejmp64bitcmp; emit_ref_reg(A_CMP,S_W,right.location.reference,left.location.register64.reglo); lastjmp64bitcmp; @@ -740,11 +740,11 @@ interface end; LOC_CONSTANT : begin - current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 48) and $FFFF),GetNextReg(left.location.register64.reghi))); + current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 48) and $FFFF),cg.GetNextReg(left.location.register64.reghi))); firstjmp64bitcmp; current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 32) and $FFFF),left.location.register64.reghi)); middlejmp64bitcmp; - current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 16) and $FFFF),GetNextReg(left.location.register64.reglo))); + current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 16) and $FFFF),cg.GetNextReg(left.location.register64.reglo))); middlejmp64bitcmp; current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value64 and $FFFF),left.location.register64.reglo)); lastjmp64bitcmp; @@ -872,7 +872,7 @@ interface { at this point, left.location.loc should be LOC_REGISTER } if right.location.loc=LOC_REGISTER then begin - emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register)); + emit_reg_reg(A_CMP,S_W,cg.GetNextReg(right.location.register),cg.GetNextReg(left.location.register)); firstjmp32bitcmp; emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register); secondjmp32bitcmp; @@ -882,7 +882,7 @@ interface case right.location.loc of LOC_CREGISTER : begin - emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register)); + emit_reg_reg(A_CMP,S_W,cg.GetNextReg(right.location.register),cg.GetNextReg(left.location.register)); firstjmp32bitcmp; emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register); secondjmp32bitcmp; @@ -893,7 +893,7 @@ interface tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference); href:=right.location.reference; inc(href.offset,2); - emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register)); + emit_ref_reg(A_CMP,S_W,href,cg.GetNextReg(left.location.register)); firstjmp32bitcmp; dec(href.offset,2); emit_ref_reg(A_CMP,S_W,href,left.location.register); @@ -905,12 +905,12 @@ interface begin if (right.location.value=0) and (nodetype in [equaln,unequaln]) and (left.location.loc=LOC_REGISTER) then begin - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_OR,S_W,GetNextReg(left.location.register),left.location.register)); + current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_OR,S_W,cg.GetNextReg(left.location.register),left.location.register)); secondjmp32bitcmp; end else begin - current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value shr 16) and $FFFF),GetNextReg(left.location.register))); + current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value shr 16) and $FFFF),cg.GetNextReg(left.location.register))); firstjmp32bitcmp; current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value and $FFFF),left.location.register)); secondjmp32bitcmp; @@ -1054,7 +1054,7 @@ interface {Allocate an imaginary 32-bit register, which consists of a pair of 16-bit registers and store DX:AX into it} location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_32); - cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,GetNextReg(location.register)); + cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,cg.GetNextReg(location.register)); cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register); end diff --git a/compiler/i8086/n8086inl.pas b/compiler/i8086/n8086inl.pas index a52d485a7e..79094906fa 100644 --- a/compiler/i8086/n8086inl.pas +++ b/compiler/i8086/n8086inl.pas @@ -134,7 +134,7 @@ implementation location_reset(location,LOC_REGISTER,OS_32); location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_32); emit_reg_reg(A_MOV,S_W,current_procinfo.framepointer,location.register); - current_asmdata.CurrAsmList.Concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_SS,GetNextReg(location.register))); + current_asmdata.CurrAsmList.Concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_SS,cg.GetNextReg(location.register))); end else inherited second_get_frame; @@ -264,15 +264,15 @@ implementation location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32); location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32); cg64.a_load64_reg_reg(current_asmdata.CurrAsmList,left.location.register64,location.register64); - cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_16,15,GetNextReg(left.location.register64.reghi)); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,GetNextReg(left.location.register64.reghi),location.register64.reglo); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,GetNextReg(left.location.register64.reghi),GetNextReg(location.register64.reglo)); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,GetNextReg(left.location.register64.reghi),location.register64.reghi); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,GetNextReg(left.location.register64.reghi),GetNextReg(location.register64.reghi)); - emit_reg_reg(A_SUB,S_W,GetNextReg(left.location.register64.reghi),location.register64.reglo); - emit_reg_reg(A_SBB,S_W,GetNextReg(left.location.register64.reghi),GetNextReg(location.register64.reglo)); - emit_reg_reg(A_SBB,S_W,GetNextReg(left.location.register64.reghi),location.register64.reghi); - emit_reg_reg(A_SBB,S_W,GetNextReg(left.location.register64.reghi),GetNextReg(location.register64.reghi)); + cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_16,15,cg.GetNextReg(left.location.register64.reghi)); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),location.register64.reglo); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reglo)); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),location.register64.reghi); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reghi)); + emit_reg_reg(A_SUB,S_W,cg.GetNextReg(left.location.register64.reghi),location.register64.reglo); + emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reglo)); + emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register64.reghi),location.register64.reghi); + emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reghi)); end else if opsize in [OS_32,OS_S32] then begin @@ -281,11 +281,11 @@ implementation location:=left.location; location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize); cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,location.register); - cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_16,15,GetNextReg(left.location.register)); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,GetNextReg(left.location.register),location.register); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,GetNextReg(left.location.register),GetNextReg(location.register)); - emit_reg_reg(A_SUB,S_W,GetNextReg(left.location.register),location.register); - emit_reg_reg(A_SBB,S_W,GetNextReg(left.location.register),GetNextReg(location.register)); + cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_16,15,cg.GetNextReg(left.location.register)); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register),location.register); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register),cg.GetNextReg(location.register)); + emit_reg_reg(A_SUB,S_W,cg.GetNextReg(left.location.register),location.register); + emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register),cg.GetNextReg(location.register)); end else inherited second_abs_long; diff --git a/compiler/i8086/n8086mem.pas b/compiler/i8086/n8086mem.pas index 1bbcbd9caa..15a59a0310 100644 --- a/compiler/i8086/n8086mem.pas +++ b/compiler/i8086/n8086mem.pas @@ -140,7 +140,7 @@ implementation begin hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true); location.reference.base := left.location.register; - location.reference.segment := GetNextReg(left.location.register); + location.reference.segment := cg.GetNextReg(left.location.register); end; LOC_CREFERENCE, LOC_REFERENCE: diff --git a/compiler/ncgbas.pas b/compiler/ncgbas.pas index ce602e5558..632f9513ad 100644 --- a/compiler/ncgbas.pas +++ b/compiler/ncgbas.pas @@ -593,42 +593,42 @@ interface if tempinfo^.location.size in [OS_64,OS_S64] then begin cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reghi); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reghi)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register64.reghi)); cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reglo); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reglo)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register64.reglo)); end else if tempinfo^.location.size in [OS_32,OS_S32] then begin cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register)); end else {$elseif defined(cpu8bitalu)} if tempinfo^.location.size in [OS_64,OS_S64] then begin cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reghi); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reghi)); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(tempinfo^.location.register64.reghi))); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(GetNextReg(tempinfo^.location.register64.reghi)))); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register64.reghi)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(cg.GetNextReg(tempinfo^.location.register64.reghi))); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(tempinfo^.location.register64.reghi)))); cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reglo); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reglo)); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(tempinfo^.location.register64.reglo))); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(GetNextReg(tempinfo^.location.register64.reglo)))); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register64.reglo)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(cg.GetNextReg(tempinfo^.location.register64.reglo))); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(tempinfo^.location.register64.reglo)))); end else if tempinfo^.location.size in [OS_32,OS_S32] then begin cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register)); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(tempinfo^.location.register))); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(GetNextReg(tempinfo^.location.register)))); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(cg.GetNextReg(tempinfo^.location.register))); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(tempinfo^.location.register)))); end else if tempinfo^.location.size in [OS_16,OS_S16] then begin cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register); - cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register)); + cg.a_reg_sync(current_asmdata.CurrAsmList,cg.GetNextReg(tempinfo^.location.register)); end else {$endif} diff --git a/compiler/ncgset.pas b/compiler/ncgset.pas index 2cc5d00ab3..74ada95bc1 100644 --- a/compiler/ncgset.pas +++ b/compiler/ncgset.pas @@ -639,16 +639,16 @@ implementation if def_cgsize(opsize) in [OS_S64,OS_64] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),GetNextReg(hregister2),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_S32,OS_32] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end @@ -657,29 +657,29 @@ implementation if def_cgsize(opsize) in [OS_S64,OS_64] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_S32,OS_32] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_S16,OS_16] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end @@ -717,18 +717,18 @@ implementation begin current_asmdata.getjumplabel(l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))), - GetNextReg(hregister2), elselabel); + cg.GetNextReg(hregister2), elselabel); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))), - GetNextReg(hregister2), l1); + cg.GetNextReg(hregister2), l1); { the comparison of the low words must be always unsigned! } cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))), hregister2, elselabel); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))), hregister2, l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))), - GetNextReg(hregister), elselabel); + cg.GetNextReg(hregister), elselabel); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))), - GetNextReg(hregister), l1); + cg.GetNextReg(hregister), l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel); cg.a_label(current_asmdata.CurrAsmList,l1); end @@ -736,9 +736,9 @@ implementation begin current_asmdata.getjumplabel(l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))), - GetNextReg(hregister), elselabel); + cg.GetNextReg(hregister), elselabel); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))), - GetNextReg(hregister), l1); + cg.GetNextReg(hregister), l1); { the comparisation of the low dword must be always unsigned! } cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel); cg.a_label(current_asmdata.CurrAsmList,l1); @@ -748,42 +748,42 @@ implementation if def_cgsize(opsize) in [OS_64,OS_S64] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1); { the comparison of the low words must be always unsigned! } - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_32,OS_S32] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1); { the comparison of the low words must be always unsigned! } - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_16,OS_S16] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),elselabel); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1); { the comparisation of the low dword must be always unsigned! } cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel); cg.a_label(current_asmdata.CurrAsmList,l1); @@ -811,17 +811,17 @@ implementation if def_cgsize(opsize) in [OS_S64,OS_64] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2), + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2), blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2), + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2), l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2, blocklabel(t^.blockid)); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2, l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister), + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister), blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister), + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister), l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); @@ -829,9 +829,9 @@ implementation else if def_cgsize(opsize) in [OS_S32,OS_32] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister), + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister), blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister), + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister), l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); @@ -841,40 +841,40 @@ implementation if def_cgsize(opsize) in [OS_S64,OS_64] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid)); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_S32,OS_32] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end else if def_cgsize(opsize) in [OS_S16,OS_16] then begin current_asmdata.getjumplabel(l1); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),blocklabel(t^.blockid)); - cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),l1); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid)); + cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1); cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid)); cg.a_label(current_asmdata.CurrAsmList,l1); end diff --git a/compiler/ncgutil.pas b/compiler/ncgutil.pas index f8b8b7bcf2..8df2869dda 100644 --- a/compiler/ncgutil.pas +++ b/compiler/ncgutil.pas @@ -594,42 +594,42 @@ implementation if sym.initialloc.size in [OS_64,OS_S64] then begin cg.a_reg_sync(list,sym.initialloc.register64.reglo); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reglo)); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register64.reglo)); cg.a_reg_sync(list,sym.initialloc.register64.reghi); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reghi)); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register64.reghi)); end else if sym.initialloc.size in [OS_32,OS_S32] then begin cg.a_reg_sync(list,sym.initialloc.register); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register)); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register)); end else {$elseif defined(cpu8bitalu)} if sym.initialloc.size in [OS_64,OS_S64] then begin cg.a_reg_sync(list,sym.initialloc.register64.reglo); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reglo)); - cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register64.reglo))); - cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register64.reglo)))); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register64.reglo)); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(sym.initialloc.register64.reglo))); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(sym.initialloc.register64.reglo)))); cg.a_reg_sync(list,sym.initialloc.register64.reghi); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reghi)); - cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register64.reghi))); - cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register64.reghi)))); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register64.reghi)); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(sym.initialloc.register64.reghi))); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(sym.initialloc.register64.reghi)))); end else if sym.initialloc.size in [OS_32,OS_S32] then begin cg.a_reg_sync(list,sym.initialloc.register); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register)); - cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register))); - cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register)))); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register)); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(sym.initialloc.register))); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(sym.initialloc.register)))); end else if sym.initialloc.size in [OS_16,OS_S16] then begin cg.a_reg_sync(list,sym.initialloc.register); - cg.a_reg_sync(list,GetNextReg(sym.initialloc.register)); + cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register)); end else {$endif} @@ -812,11 +812,11 @@ implementation unget_para(paraloc^); gen_alloc_regloc(list,destloc,vardef); { reg->reg, alignment is irrelevant } - cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,GetNextReg(destloc.register64.reghi),1); + cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,cg.GetNextReg(destloc.register64.reghi),1); unget_para(paraloc^.next^); cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,1); unget_para(paraloc^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,GetNextReg(destloc.register64.reglo),1); + cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,cg.GetNextReg(destloc.register64.reglo),1); unget_para(paraloc^.next^.next^.next^); cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,1); end @@ -829,21 +829,21 @@ implementation gen_alloc_regloc(list,destloc,vardef); cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^,destloc.register64.reglo,2); unget_para(curparaloc^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^,GetNextReg(destloc.register64.reglo),1); + cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^,cg.GetNextReg(destloc.register64.reglo),1); unget_para(curparaloc^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^,GetNextReg(GetNextReg(destloc.register64.reglo)),1); + cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^,cg.GetNextReg(cg.GetNextReg(destloc.register64.reglo)),1); unget_para(curparaloc^.next^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^.next^,GetNextReg(GetNextReg(GetNextReg(destloc.register64.reglo))),1); + cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^.next^,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(destloc.register64.reglo))),1); curparaloc:=paraloc^.next^.next^.next^.next; unget_para(curparaloc^); cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^,destloc.register64.reghi,2); unget_para(curparaloc^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^,GetNextReg(destloc.register64.reghi),1); + cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^,cg.GetNextReg(destloc.register64.reghi),1); unget_para(curparaloc^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^,GetNextReg(GetNextReg(destloc.register64.reghi)),1); + cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^,cg.GetNextReg(cg.GetNextReg(destloc.register64.reghi)),1); unget_para(curparaloc^.next^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^.next^,GetNextReg(GetNextReg(GetNextReg(destloc.register64.reghi))),1); + cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^.next^,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(destloc.register64.reghi))),1); end; {$endif defined(cpu8bitalu)} {$if defined(cpu16bitalu) or defined(cpu8bitalu)} @@ -856,11 +856,11 @@ implementation unget_para(paraloc^); gen_alloc_regloc(list,destloc,vardef); { reg->reg, alignment is irrelevant } - cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,GetNextReg(destloc.register64.reghi),2); + cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,cg.GetNextReg(destloc.register64.reghi),2); unget_para(paraloc^.next^); cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,2); unget_para(paraloc^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,GetNextReg(destloc.register64.reglo),2); + cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,cg.GetNextReg(destloc.register64.reglo),2); unget_para(paraloc^.next^.next^.next^); cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,2); end @@ -872,11 +872,11 @@ implementation gen_alloc_regloc(list,destloc,vardef); cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,destloc.register64.reglo,2); unget_para(paraloc^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,GetNextReg(destloc.register64.reglo),2); + cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,cg.GetNextReg(destloc.register64.reglo),2); unget_para(paraloc^.next^.next^); cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,destloc.register64.reghi,2); unget_para(paraloc^.next^.next^.next^); - cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,GetNextReg(destloc.register64.reghi),2); + cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,cg.GetNextReg(destloc.register64.reghi),2); end; {$endif defined(cpu16bitalu) or defined(cpu8bitalu)} 2: @@ -930,7 +930,7 @@ implementation cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint)); unget_para(paraloc^.Next^); {$if defined(cpu16bitalu) or defined(cpu8bitalu)} - cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint)); + cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,cg.GetNextReg(destloc.register),sizeof(aint)); {$else} cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint)); {$endif} @@ -943,11 +943,11 @@ implementation gen_alloc_regloc(list,destloc,vardef); cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^,destloc.register,sizeof(aint)); unget_para(paraloc^.Next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint)); + cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^,cg.GetNextReg(destloc.register),sizeof(aint)); unget_para(paraloc^.Next^.Next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^.Next^,GetNextReg(GetNextReg(destloc.register)),sizeof(aint)); + cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^.Next^,cg.GetNextReg(cg.GetNextReg(destloc.register)),sizeof(aint)); unget_para(paraloc^.Next^.Next^.Next^); - cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^.Next^.Next^,GetNextReg(GetNextReg(GetNextReg(destloc.register))),sizeof(aint)); + cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^.Next^.Next^,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(destloc.register))),sizeof(aint)); end {$endif defined(cpu8bitalu)} else @@ -1524,42 +1524,42 @@ implementation if location.size in [OS_64,OS_S64] then begin rv.intregvars.addnodup(getsupreg(location.register64.reglo)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reglo))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register64.reglo))); rv.intregvars.addnodup(getsupreg(location.register64.reghi)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reghi))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register64.reghi))); end else if location.size in [OS_32,OS_S32] then begin rv.intregvars.addnodup(getsupreg(location.register)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register))); end else {$elseif defined(cpu8bitalu)} if location.size in [OS_64,OS_S64] then begin rv.intregvars.addnodup(getsupreg(location.register64.reglo)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reglo))); - rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register64.reglo)))); - rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register64.reglo))))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register64.reglo))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(cg.GetNextReg(location.register64.reglo)))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(location.register64.reglo))))); rv.intregvars.addnodup(getsupreg(location.register64.reghi)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reghi))); - rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register64.reghi)))); - rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register64.reghi))))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register64.reghi))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(cg.GetNextReg(location.register64.reghi)))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(location.register64.reghi))))); end else if location.size in [OS_32,OS_S32] then begin rv.intregvars.addnodup(getsupreg(location.register)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register))); - rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register)))); - rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register))))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(cg.GetNextReg(location.register)))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(location.register))))); end else if location.size in [OS_16,OS_S16] then begin rv.intregvars.addnodup(getsupreg(location.register)); - rv.intregvars.addnodup(getsupreg(GetNextReg(location.register))); + rv.intregvars.addnodup(getsupreg(cg.GetNextReg(location.register))); end else {$endif} @@ -1706,42 +1706,42 @@ implementation if def_cgsize(vardef) in [OS_64,OS_S64] then begin cg.a_reg_sync(list,localloc.register64.reglo); - cg.a_reg_sync(list,GetNextReg(localloc.register64.reglo)); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register64.reglo)); cg.a_reg_sync(list,localloc.register64.reghi); - cg.a_reg_sync(list,GetNextReg(localloc.register64.reghi)); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register64.reghi)); end else if def_cgsize(vardef) in [OS_32,OS_S32] then begin cg.a_reg_sync(list,localloc.register); - cg.a_reg_sync(list,GetNextReg(localloc.register)); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register)); end else {$elseif defined(cpu8bitalu)} if def_cgsize(vardef) in [OS_64,OS_S64] then begin cg.a_reg_sync(list,localloc.register64.reglo); - cg.a_reg_sync(list,GetNextReg(localloc.register64.reglo)); - cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register64.reglo))); - cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register64.reglo)))); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register64.reglo)); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(localloc.register64.reglo))); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(localloc.register64.reglo)))); cg.a_reg_sync(list,localloc.register64.reghi); - cg.a_reg_sync(list,GetNextReg(localloc.register64.reghi)); - cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register64.reghi))); - cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register64.reghi)))); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register64.reghi)); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(localloc.register64.reghi))); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(localloc.register64.reghi)))); end else if def_cgsize(vardef) in [OS_32,OS_S32] then begin cg.a_reg_sync(list,localloc.register); - cg.a_reg_sync(list,GetNextReg(localloc.register)); - cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register))); - cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register)))); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register)); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(localloc.register))); + cg.a_reg_sync(list,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(localloc.register)))); end else if def_cgsize(vardef) in [OS_16,OS_S16] then begin cg.a_reg_sync(list,localloc.register); - cg.a_reg_sync(list,GetNextReg(localloc.register)); + cg.a_reg_sync(list,cg.GetNextReg(localloc.register)); end else {$endif} diff --git a/compiler/x86/cpubase.pas b/compiler/x86/cpubase.pas index 927ef78669..bbdc799eb3 100644 --- a/compiler/x86/cpubase.pas +++ b/compiler/x86/cpubase.pas @@ -316,9 +316,6 @@ uses function segment_regs_equal(r1,r2:tregister):boolean; {$ifdef i8086} - { returns the next virtual register } - function GetNextReg(const r : TRegister) : TRegister; - { return whether we need to add an extra FWAIT instruction before the given instruction, when we're targeting the i8087. This includes almost all x87 instructions, but certain ones, which always have or have not a built in @@ -643,17 +640,6 @@ implementation {$ifdef i8086} - function GetNextReg(const r: TRegister): TRegister; - begin - if getsupreg(r)R_INTREGISTER then - internalerror(2017091101); - if getsubreg(r)<>R_SUBW then - internalerror(2017091102); - result:=TRegister(longint(r)+1); - end; - function requires_fwait_on_8087(op: TAsmOp): boolean; begin case op of diff --git a/compiler/x86/nx86cnv.pas b/compiler/x86/nx86cnv.pas index dda045242c..ff3399a477 100644 --- a/compiler/x86/nx86cnv.pas +++ b/compiler/x86/nx86cnv.pas @@ -163,13 +163,13 @@ implementation begin hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,GetNextReg(left.location.register64.reglo),hregister); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reglo),hregister); cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister); - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,GetNextReg(left.location.register64.reghi),hregister); + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reghi),hregister); end else if left.location.size in [OS_32,OS_S32] then - cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,GetNextReg(left.location.register)) + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,cg.GetNextReg(left.location.register)) else {$endif} cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register); @@ -332,13 +332,13 @@ implementation {$elseif defined(cpu32bitalu)} emit_const_reg(A_BT,S_L,31,left.location.register64.reghi); {$elseif defined(cpu16bitalu)} - emit_const_reg(A_BT,S_W,15,GetNextReg(left.location.register64.reghi)); + emit_const_reg(A_BT,S_W,15,cg.GetNextReg(left.location.register64.reghi)); {$endif} end else begin {$ifdef i8086} - emit_const_reg(A_TEST,S_W,aint($8000),GetNextReg(left.location.register64.reghi)); + emit_const_reg(A_TEST,S_W,aint($8000),cg.GetNextReg(left.location.register64.reghi)); {$else i8086} internalerror(2013052510); {$endif i8086} diff --git a/compiler/x86/nx86mat.pas b/compiler/x86/nx86mat.pas index 06ff6e1ffd..b13f5c85d4 100644 --- a/compiler/x86/nx86mat.pas +++ b/compiler/x86/nx86mat.pas @@ -308,14 +308,14 @@ interface if is_64bit(resultdef) then begin hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false); - emit_reg_reg(A_OR,S_W,GetNextReg(left.location.register64.reghi),left.location.register64.reghi); - emit_reg_reg(A_OR,S_W,GetNextReg(left.location.register64.reglo),left.location.register64.reglo); + emit_reg_reg(A_OR,S_W,cg.GetNextReg(left.location.register64.reghi),left.location.register64.reghi); + emit_reg_reg(A_OR,S_W,cg.GetNextReg(left.location.register64.reglo),left.location.register64.reglo); emit_reg_reg(A_OR,S_W,left.location.register64.reghi,left.location.register64.reglo); end else if is_32bit(resultdef) then begin hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false); - emit_reg_reg(A_OR,S_L,GetNextReg(left.location.register),left.location.register); + emit_reg_reg(A_OR,S_L,cg.GetNextReg(left.location.register),left.location.register); end else {$endif}