diff --git a/compiler/mips/cgcpu.pas b/compiler/mips/cgcpu.pas index 309b4b943d..ed4d342658 100644 --- a/compiler/mips/cgcpu.pas +++ b/compiler/mips/cgcpu.pas @@ -517,10 +517,10 @@ begin first_int_imreg, []); rg[R_FPUREGISTER] := trgcpu.Create(R_FPUREGISTER, R_SUBFS{R_SUBFD}, - [RS_F0, RS_F2, RS_F4, RS_F6, - RS_F8, RS_F10, RS_F12, RS_F14, - RS_F16, RS_F18, RS_F20, RS_F22, - RS_F24, RS_F26, RS_F28, RS_F30], + [RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7, + RS_F8,RS_F9,RS_F10,RS_F11,RS_F12,RS_F13,RS_F14,RS_F15, + RS_F16,RS_F17,RS_F18,RS_F19,RS_F20,RS_F21,RS_F22,RS_F23, + RS_F24,RS_F25,RS_F26,RS_F27,RS_F28,RS_F29,RS_F30,RS_F31], first_fpu_imreg, []); { needs at least one element for rgobj not to crash } @@ -542,7 +542,7 @@ end; function TCgMPSel.getfpuregister(list: tasmlist; size: Tcgsize): Tregister; begin if size = OS_F64 then - Result := rg[R_FPUREGISTER].getregister(list, R_SUBFD) + Result := rg[R_FPUREGISTER].getregister(list, R_SUBFS) else Result := rg[R_FPUREGISTER].getregister(list, R_SUBFS); end; @@ -696,7 +696,7 @@ begin list.concat(taicpu.op_reg_reg(A_MOVE, reg, NR_R0)) { LUI allows to set the upper 16 bits, so we'll take full advantage of it } else if (a and aint($ffff)) = 0 then - list.concat(taicpu.op_reg_const(A_LUI, reg, a shr 16)) + list.concat(taicpu.op_reg_const(A_LUI, reg, aint(a) shr 16)) else if (a >= simm16lo) and (a <= simm16hi) then list.concat(taicpu.op_reg_reg_const(A_ADDIU, reg, NR_R0, a)) else if (a>=0) and (a <= 65535) then diff --git a/compiler/mips/cpubase.pas b/compiler/mips/cpubase.pas index 3674677158..7926019946 100644 --- a/compiler/mips/cpubase.pas +++ b/compiler/mips/cpubase.pas @@ -67,7 +67,7 @@ unit cpubase; {$i rmipssup.inc} { No Subregisters } - R_SUBWHOLE = R_SUBNONE; + R_SUBWHOLE = R_SUBD; { Available Registers } {$i rmipscon.inc} diff --git a/compiler/mips/mipsreg.dat b/compiler/mips/mipsreg.dat index 3b97a25205..1e2bf6b645 100644 --- a/compiler/mips/mipsreg.dat +++ b/compiler/mips/mipsreg.dat @@ -4,80 +4,80 @@ ; layout ; ,,,, ; -NO,$00,$00,INVALID,INVALID,-1,-1 +NO,$00,$00,$00,INVALID,INVALID,-1,-1 -R0,$01,$00,zero,$0,0,0 -R1,$01,$01,at,$1,1,1 -R2,$01,$02,v0,$2,2,2 -R3,$01,$03,v1,$3,3,3 -R4,$01,$04,a0,$4,4,4 -R5,$01,$05,a1,$5,5,5 -R6,$01,$06,a2,$6,6,6 -R7,$01,$07,a3,$7,7,7 -R8,$01,$08,t0,$8,8,8 -R9,$01,$09,t1,$9,9,9 -R10,$01,$0a,t2,$10,10,10 -R11,$01,$0b,t3,$11,11,11 -R12,$01,$0c,t4,$12,12,12 -R13,$01,$0d,t5,$13,13,13 -R14,$01,$0e,t6,$14,14,14 -R15,$01,$0f,t7,$15,15,15 -R16,$01,$10,s0,$16,16,16 -R17,$01,$11,s1,$17,17,17 -R18,$01,$12,s2,$18,18,18 -R19,$01,$13,s3,$19,19,19 -R20,$01,$14,s4,$20,20,20 -R21,$01,$15,s5,$21,21,21 -R22,$01,$16,s6,$22,22,22 -R23,$01,$17,s7,$23,23,23 -R24,$01,$18,t8,$24,24,24 -R25,$01,$19,t9,$25,25,25 -R26,$01,$1a,k0,$26,26,26 -R27,$01,$1b,k1,$27,27,27 -R28,$01,$1c,gp,$28,28,28 -R29,$01,$1d,sp,$29,29,29 -R30,$01,$1e,fp,$30,30,30 -R31,$01,$1f,$a,$31,31,31 +R0,$01,$04,$00,zero,$0,0,0 +R1,$01,$04,$01,at,$1,1,1 +R2,$01,$04,$02,v0,$2,2,2 +R3,$01,$04,$03,v1,$3,3,3 +R4,$01,$04,$04,a0,$4,4,4 +R5,$01,$04,$05,a1,$5,5,5 +R6,$01,$04,$06,a2,$6,6,6 +R7,$01,$04,$07,a3,$7,7,7 +R8,$01,$04,$08,t0,$8,8,8 +R9,$01,$04,$09,t1,$9,9,9 +R10,$01,$04,$0A,t2,$10,10,10 +R11,$01,$04,$0B,t3,$11,11,11 +R12,$01,$04,$0C,t4,$12,12,12 +R13,$01,$04,$0D,t5,$13,13,13 +R14,$01,$04,$0E,t6,$14,14,14 +R15,$01,$04,$0F,t7,$15,15,15 +R16,$01,$04,$10,s0,$16,16,16 +R17,$01,$04,$11,s1,$17,17,17 +R18,$01,$04,$12,s2,$18,18,18 +R19,$01,$04,$13,s3,$19,19,19 +R20,$01,$04,$14,s4,$20,20,20 +R21,$01,$04,$15,s5,$21,21,21 +R22,$01,$04,$16,s6,$22,22,22 +R23,$01,$04,$17,s7,$23,23,23 +R24,$01,$04,$18,t8,$24,24,24 +R25,$01,$04,$19,t9,$25,25,25 +R26,$01,$04,$1A,k0,$26,26,26 +R27,$01,$04,$1B,k1,$27,27,27 +R28,$01,$04,$1C,gp,$28,28,28 +R29,$01,$04,$1D,sp,$29,29,29 +R30,$01,$04,$1E,fp,$30,30,30 +R31,$01,$04,$1F,$a,$31,31,31 -F0,$02,$06,F0,f0,32,32 -F1,$02,$06,F1,f1,33,33 -F2,$02,$06,F2,f2,34,34 -F3,$02,$06,F3,f3,35,35 -F4,$02,$06,F4,f4,36,36 -F5,$02,$06,F5,f5,37,37 -F6,$02,$06,F6,f6,38,38 -F7,$02,$06,F7,f7,39,39 -F8,$02,$06,F8,f8,40,40 -F9,$02,$06,F9,f9,41,41 -F10,$02,$06,F10,f10,42,42 -F11,$02,$06,F11,f11,43,43 -F12,$02,$06,F12,f12,44,44 -F13,$02,$06,F13,f13,45,45 -F14,$02,$06,F14,f14,46,46 -F15,$02,$06,F15,f15,47,47 -F16,$02,$06,F16,f16,48,48 -F17,$02,$06,F17,f17,49,49 -F18,$02,$06,F18,f18,50,50 -F19,$02,$06,F19,f19,51,51 -F20,$02,$06,F20,f20,52,52 -F21,$02,$06,F21,f21,53,53 -F22,$02,$06,F22,f22,54,54 -F23,$02,$06,F23,f23,55,55 -F24,$02,$06,F24,f24,56,56 -F25,$02,$06,F25,f25,57,57 -F26,$02,$06,F26,f26,58,58 -F27,$02,$06,F27,f27,59,59 -F28,$02,$06,F28,f28,60,60 -F29,$02,$06,F29,f29,61,61 -F30,$02,$06,F30,f30,62,62 -F31,$02,$06,F31,f31,63,63 +F0,$02,$06,$00,F0,$0,32,32 +F1,$02,$06,$01,F1,$1,33,33 +F2,$02,$06,$02,F2,$2,34,34 +F3,$02,$06,$03,F3,$3,35,35 +F4,$02,$06,$04,F4,$4,36,36 +F5,$02,$06,$05,F5,$5,37,37 +F6,$02,$06,$06,F6,$6,38,38 +F7,$02,$06,$07,F7,$7,39,39 +F8,$02,$06,$08,F8,$8,40,40 +F9,$02,$06,$09,F9,$9,41,41 +F10,$02,$06,$0A,F10,$10,42,42 +F11,$02,$06,$0B,F11,$11,43,43 +F12,$02,$06,$0C,F12,$12,44,44 +F13,$02,$06,$0D,F13,$13,45,45 +F14,$02,$06,$0E,F14,$14,46,46 +F15,$02,$06,$0F,F15,$15,47,47 +F16,$02,$06,$10,F16,$16,48,48 +F17,$02,$06,$11,F17,$17,49,49 +F18,$02,$06,$12,F18,$18,50,50 +F19,$02,$06,$13,F19,$19,51,51 +F20,$02,$06,$14,F20,$20,52,52 +F21,$02,$06,$15,F21,$21,53,53 +F22,$02,$06,$16,F22,$22,54,54 +F23,$02,$06,$17,F23,$23,55,55 +F24,$02,$06,$18,F24,$24,56,56 +F25,$02,$06,$19,F25,$25,57,57 +F26,$02,$06,$1A,F26,$26,58,58 +F27,$02,$06,$1B,F27,$27,59,59 +F28,$02,$06,$1C,F28,$28,60,60 +F29,$02,$06,$1D,F29,$29,61,61 +F30,$02,$06,$1E,F30,$30,62,62 +F31,$02,$06,$1F,F31,$31,63,63 -PC,$05,$00,PC,pc,-1,-1 -HI,$05,$01,HI,hi,68,68 -LO,$05,$02,LO,lo,69,69 -CR,$05,$03,CR,cr,70,70 -FCR0,$05,$04,FCR0,fcr0,71,71 -FCR25,$05,$05,FCR25,fcr25,72,72 -FCR26,$05,$06,FCR26,fcr26,73,73 -FCR28,$05,$07,FCR28,fcr28,74,74 -FCSR,$05,$08,FCSR,fcsr,75,75 +PC,$05,$00,$00,PC,pc,-1,-1 +HI,$05,$00,$01,HI,hi,68,68 +LO,$05,$00,$02,LO,lo,69,69 +CR,$05,$00,$03,CR,cr,70,70 +FCR0,$05,$00,$04,FCR0,fcr0,71,71 +FCR25,$05,$00,$05,FCR25,fcr25,72,72 +FCR26,$05,$00,$06,FCR26,fcr26,73,73 +FCR28,$05,$00,$07,FCR28,fcr28,74,74 +FCSR,$05,$00,$08,FCSR,fcsr,75,75 diff --git a/compiler/mips/rgcpu.pas b/compiler/mips/rgcpu.pas index b1d6607105..b3ea11366d 100644 --- a/compiler/mips/rgcpu.pas +++ b/compiler/mips/rgcpu.pas @@ -117,7 +117,8 @@ implementation helpins:=spilling_create_load(tmpref,tempreg); helplist.concat(helpins); - list.insertlistafter(pos,helplist) + list.insertlistafter(pos,helplist); + helplist.free; end else inherited do_spill_read(list,pos,spilltemp,tempreg); @@ -126,7 +127,6 @@ implementation procedure trgcpu.do_spill_written(list:tasmlist;pos:tai;const spilltemp:treference;tempreg:tregister); var - helpins : tai; tmpref : treference; helplist : tasmlist; hreg : tregister; @@ -151,12 +151,12 @@ implementation reference_reset_base(tmpref,hreg,0,sizeof(aint)); - helpins:=spilling_create_store(tempreg,tmpref); - helplist.concat(helpins); + helplist.concat(spilling_create_store(tempreg,tmpref)); if getregtype(tempreg)=R_INTREGISTER then ungetregisterinline(helplist,hreg); - list.insertlistafter(pos,helplist) + list.insertlistafter(pos,helplist); + helplist.free; end else inherited do_spill_written(list,pos,spilltemp,tempreg); diff --git a/compiler/mips/rmipscon.inc b/compiler/mips/rmipscon.inc index 9178c0eca5..83732b5ea6 100644 --- a/compiler/mips/rmipscon.inc +++ b/compiler/mips/rmipscon.inc @@ -1,69 +1,69 @@ { don't edit, this file is generated from mipsreg.dat } NR_NO = tregister($00000000); -NR_R0 = tregister($01000000); -NR_R1 = tregister($01000001); -NR_R2 = tregister($01000002); -NR_R3 = tregister($01000003); -NR_R4 = tregister($01000004); -NR_R5 = tregister($01000005); -NR_R6 = tregister($01000006); -NR_R7 = tregister($01000007); -NR_R8 = tregister($01000008); -NR_R9 = tregister($01000009); -NR_R10 = tregister($0100000a); -NR_R11 = tregister($0100000b); -NR_R12 = tregister($0100000c); -NR_R13 = tregister($0100000d); -NR_R14 = tregister($0100000e); -NR_R15 = tregister($0100000f); -NR_R16 = tregister($01000010); -NR_R17 = tregister($01000011); -NR_R18 = tregister($01000012); -NR_R19 = tregister($01000013); -NR_R20 = tregister($01000014); -NR_R21 = tregister($01000015); -NR_R22 = tregister($01000016); -NR_R23 = tregister($01000017); -NR_R24 = tregister($01000018); -NR_R25 = tregister($01000019); -NR_R26 = tregister($0100001a); -NR_R27 = tregister($0100001b); -NR_R28 = tregister($0100001c); -NR_R29 = tregister($0100001d); -NR_R30 = tregister($0100001e); -NR_R31 = tregister($0100001f); -NR_F0 = tregister($02000006); -NR_F1 = tregister($02000006); -NR_F2 = tregister($02000006); -NR_F3 = tregister($02000006); -NR_F4 = tregister($02000006); -NR_F5 = tregister($02000006); -NR_F6 = tregister($02000006); -NR_F7 = tregister($02000006); -NR_F8 = tregister($02000006); -NR_F9 = tregister($02000006); -NR_F10 = tregister($02000006); -NR_F11 = tregister($02000006); -NR_F12 = tregister($02000006); -NR_F13 = tregister($02000006); -NR_F14 = tregister($02000006); -NR_F15 = tregister($02000006); -NR_F16 = tregister($02000006); -NR_F17 = tregister($02000006); -NR_F18 = tregister($02000006); -NR_F19 = tregister($02000006); -NR_F20 = tregister($02000006); -NR_F21 = tregister($02000006); -NR_F22 = tregister($02000006); -NR_F23 = tregister($02000006); -NR_F24 = tregister($02000006); -NR_F25 = tregister($02000006); -NR_F26 = tregister($02000006); -NR_F27 = tregister($02000006); -NR_F28 = tregister($02000006); -NR_F29 = tregister($02000006); -NR_F30 = tregister($02000006); -NR_F31 = tregister($02000006); +NR_R0 = tregister($01040000); +NR_R1 = tregister($01040001); +NR_R2 = tregister($01040002); +NR_R3 = tregister($01040003); +NR_R4 = tregister($01040004); +NR_R5 = tregister($01040005); +NR_R6 = tregister($01040006); +NR_R7 = tregister($01040007); +NR_R8 = tregister($01040008); +NR_R9 = tregister($01040009); +NR_R10 = tregister($0104000A); +NR_R11 = tregister($0104000B); +NR_R12 = tregister($0104000C); +NR_R13 = tregister($0104000D); +NR_R14 = tregister($0104000E); +NR_R15 = tregister($0104000F); +NR_R16 = tregister($01040010); +NR_R17 = tregister($01040011); +NR_R18 = tregister($01040012); +NR_R19 = tregister($01040013); +NR_R20 = tregister($01040014); +NR_R21 = tregister($01040015); +NR_R22 = tregister($01040016); +NR_R23 = tregister($01040017); +NR_R24 = tregister($01040018); +NR_R25 = tregister($01040019); +NR_R26 = tregister($0104001A); +NR_R27 = tregister($0104001B); +NR_R28 = tregister($0104001C); +NR_R29 = tregister($0104001D); +NR_R30 = tregister($0104001E); +NR_R31 = tregister($0104001F); +NR_F0 = tregister($02060000); +NR_F1 = tregister($02060001); +NR_F2 = tregister($02060002); +NR_F3 = tregister($02060003); +NR_F4 = tregister($02060004); +NR_F5 = tregister($02060005); +NR_F6 = tregister($02060006); +NR_F7 = tregister($02060007); +NR_F8 = tregister($02060008); +NR_F9 = tregister($02060009); +NR_F10 = tregister($0206000A); +NR_F11 = tregister($0206000B); +NR_F12 = tregister($0206000C); +NR_F13 = tregister($0206000D); +NR_F14 = tregister($0206000E); +NR_F15 = tregister($0206000F); +NR_F16 = tregister($02060010); +NR_F17 = tregister($02060011); +NR_F18 = tregister($02060012); +NR_F19 = tregister($02060013); +NR_F20 = tregister($02060014); +NR_F21 = tregister($02060015); +NR_F22 = tregister($02060016); +NR_F23 = tregister($02060017); +NR_F24 = tregister($02060018); +NR_F25 = tregister($02060019); +NR_F26 = tregister($0206001A); +NR_F27 = tregister($0206001B); +NR_F28 = tregister($0206001C); +NR_F29 = tregister($0206001D); +NR_F30 = tregister($0206001E); +NR_F31 = tregister($0206001F); NR_PC = tregister($05000000); NR_HI = tregister($05000001); NR_LO = tregister($05000002); diff --git a/compiler/mips/rmipsgas.inc b/compiler/mips/rmipsgas.inc index 30ed1ea53f..961dd679d9 100644 --- a/compiler/mips/rmipsgas.inc +++ b/compiler/mips/rmipsgas.inc @@ -32,38 +32,38 @@ '$29', '$30', '$31', -'f0', -'f1', -'f2', -'f3', -'f4', -'f5', -'f6', -'f7', -'f8', -'f9', -'f10', -'f11', -'f12', -'f13', -'f14', -'f15', -'f16', -'f17', -'f18', -'f19', -'f20', -'f21', -'f22', -'f23', -'f24', -'f25', -'f26', -'f27', -'f28', -'f29', -'f30', -'f31', +'$0', +'$1', +'$2', +'$3', +'$4', +'$5', +'$6', +'$7', +'$8', +'$9', +'$10', +'$11', +'$12', +'$13', +'$14', +'$15', +'$16', +'$17', +'$18', +'$19', +'$20', +'$21', +'$22', +'$23', +'$24', +'$25', +'$26', +'$27', +'$28', +'$29', +'$30', +'$31', 'pc', 'hi', 'lo', diff --git a/compiler/mips/rmipsgri.inc b/compiler/mips/rmipsgri.inc index 6cd775f824..31f6709d80 100644 --- a/compiler/mips/rmipsgri.inc +++ b/compiler/mips/rmipsgri.inc @@ -1,70 +1,70 @@ { don't edit, this file is generated from mipsreg.dat } 1, -2, -11, -12, -13, -14, -15, -16, -17, -18, -19, -20, -3, -21, -22, -23, -24, -25, -26, -27, -28, -29, -30, -4, -31, -32, -5, -6, -7, -8, -9, -10, -0, -68, 33, +2, 34, +11, 43, +12, 44, +13, 45, +14, 46, +15, 47, +16, 48, +17, 49, +18, 50, +19, 51, +20, 52, +3, 35, +21, 53, +22, 54, +23, 55, +24, 56, +25, 57, +26, 58, +27, 59, +28, 60, +29, 61, +30, 62, +4, 36, +31, 63, 64, +32, +5, 37, +6, 38, +7, 39, +8, 40, +9, 41, +10, 42, +0, +68, 69, 70, 71, diff --git a/compiler/mips/rmipsnum.inc b/compiler/mips/rmipsnum.inc index b2ff0daa9c..225796f402 100644 --- a/compiler/mips/rmipsnum.inc +++ b/compiler/mips/rmipsnum.inc @@ -1,75 +1,75 @@ { don't edit, this file is generated from mipsreg.dat } -tregister($00000000), -tregister($01000000), -tregister($01000001), -tregister($01000002), -tregister($01000003), -tregister($01000004), -tregister($01000005), -tregister($01000006), -tregister($01000007), -tregister($01000008), -tregister($01000009), -tregister($0100000a), -tregister($0100000b), -tregister($0100000c), -tregister($0100000d), -tregister($0100000e), -tregister($0100000f), -tregister($01000010), -tregister($01000011), -tregister($01000012), -tregister($01000013), -tregister($01000014), -tregister($01000015), -tregister($01000016), -tregister($01000017), -tregister($01000018), -tregister($01000019), -tregister($0100001a), -tregister($0100001b), -tregister($0100001c), -tregister($0100001d), -tregister($0100001e), -tregister($0100001f), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($02000006), -tregister($05000000), -tregister($05000001), -tregister($05000002), -tregister($05000003), -tregister($05000004), -tregister($05000005), -tregister($05000006), -tregister($05000007), -tregister($05000008) +NR_NO, +NR_R0, +NR_R1, +NR_R2, +NR_R3, +NR_R4, +NR_R5, +NR_R6, +NR_R7, +NR_R8, +NR_R9, +NR_R10, +NR_R11, +NR_R12, +NR_R13, +NR_R14, +NR_R15, +NR_R16, +NR_R17, +NR_R18, +NR_R19, +NR_R20, +NR_R21, +NR_R22, +NR_R23, +NR_R24, +NR_R25, +NR_R26, +NR_R27, +NR_R28, +NR_R29, +NR_R30, +NR_R31, +NR_F0, +NR_F1, +NR_F2, +NR_F3, +NR_F4, +NR_F5, +NR_F6, +NR_F7, +NR_F8, +NR_F9, +NR_F10, +NR_F11, +NR_F12, +NR_F13, +NR_F14, +NR_F15, +NR_F16, +NR_F17, +NR_F18, +NR_F19, +NR_F20, +NR_F21, +NR_F22, +NR_F23, +NR_F24, +NR_F25, +NR_F26, +NR_F27, +NR_F28, +NR_F29, +NR_F30, +NR_F31, +NR_PC, +NR_HI, +NR_LO, +NR_CR, +NR_FCR0, +NR_FCR25, +NR_FCR26, +NR_FCR28, +NR_FCSR diff --git a/compiler/mips/rmipssup.inc b/compiler/mips/rmipssup.inc index e1994dfae7..a5d819db30 100644 --- a/compiler/mips/rmipssup.inc +++ b/compiler/mips/rmipssup.inc @@ -10,12 +10,12 @@ RS_R6 = $06; RS_R7 = $07; RS_R8 = $08; RS_R9 = $09; -RS_R10 = $0a; -RS_R11 = $0b; -RS_R12 = $0c; -RS_R13 = $0d; -RS_R14 = $0e; -RS_R15 = $0f; +RS_R10 = $0A; +RS_R11 = $0B; +RS_R12 = $0C; +RS_R13 = $0D; +RS_R14 = $0E; +RS_R15 = $0F; RS_R16 = $10; RS_R17 = $11; RS_R18 = $12; @@ -26,44 +26,44 @@ RS_R22 = $16; RS_R23 = $17; RS_R24 = $18; RS_R25 = $19; -RS_R26 = $1a; -RS_R27 = $1b; -RS_R28 = $1c; -RS_R29 = $1d; -RS_R30 = $1e; -RS_R31 = $1f; -RS_F0 = $06; -RS_F1 = $06; -RS_F2 = $06; -RS_F3 = $06; -RS_F4 = $06; -RS_F5 = $06; +RS_R26 = $1A; +RS_R27 = $1B; +RS_R28 = $1C; +RS_R29 = $1D; +RS_R30 = $1E; +RS_R31 = $1F; +RS_F0 = $00; +RS_F1 = $01; +RS_F2 = $02; +RS_F3 = $03; +RS_F4 = $04; +RS_F5 = $05; RS_F6 = $06; -RS_F7 = $06; -RS_F8 = $06; -RS_F9 = $06; -RS_F10 = $06; -RS_F11 = $06; -RS_F12 = $06; -RS_F13 = $06; -RS_F14 = $06; -RS_F15 = $06; -RS_F16 = $06; -RS_F17 = $06; -RS_F18 = $06; -RS_F19 = $06; -RS_F20 = $06; -RS_F21 = $06; -RS_F22 = $06; -RS_F23 = $06; -RS_F24 = $06; -RS_F25 = $06; -RS_F26 = $06; -RS_F27 = $06; -RS_F28 = $06; -RS_F29 = $06; -RS_F30 = $06; -RS_F31 = $06; +RS_F7 = $07; +RS_F8 = $08; +RS_F9 = $09; +RS_F10 = $0A; +RS_F11 = $0B; +RS_F12 = $0C; +RS_F13 = $0D; +RS_F14 = $0E; +RS_F15 = $0F; +RS_F16 = $10; +RS_F17 = $11; +RS_F18 = $12; +RS_F19 = $13; +RS_F20 = $14; +RS_F21 = $15; +RS_F22 = $16; +RS_F23 = $17; +RS_F24 = $18; +RS_F25 = $19; +RS_F26 = $1A; +RS_F27 = $1B; +RS_F28 = $1C; +RS_F29 = $1D; +RS_F30 = $1E; +RS_F31 = $1F; RS_PC = $00; RS_HI = $01; RS_LO = $02; diff --git a/compiler/utils/mkmpsreg.pp b/compiler/utils/mkmpsreg.pp index b3494a50c4..b8cae43d03 100644 --- a/compiler/utils/mkmpsreg.pp +++ b/compiler/utils/mkmpsreg.pp @@ -26,6 +26,7 @@ var s : string; names, regtypes, supregs, + subregs, numbers, stdnames, gasnames, @@ -205,6 +206,8 @@ begin readcomma; regtypes[regcount]:=readstr; readcomma; + subregs[regcount]:=readstr; + readcomma; supregs[regcount]:=readstr; readcomma; stdnames[regcount]:=readstr; @@ -221,7 +224,7 @@ begin writeln('Line: "',s,'"'); halt(1); end; - numbers[regcount]:=regtypes[regcount]+'0000'+copy(supregs[regcount],2,255); + numbers[regcount]:=regtypes[regcount]+copy(subregs[regcount],2,255)+'00'+copy(supregs[regcount],2,255); if i