powerpc: converted some partial tabs indentation to spaces. no functional changes.

git-svn-id: trunk@34436 -
This commit is contained in:
Károly Balogh 2016-09-05 21:42:28 +00:00
parent 7a6f18c496
commit de6d7be8df

View File

@ -293,14 +293,14 @@ const
op := loadinstr[fromsize,ref2.index<>NR_NO,false]; op := loadinstr[fromsize,ref2.index<>NR_NO,false];
a_load_store(list,op,reg,ref2); a_load_store(list,op,reg,ref2);
{ sign extend shortint if necessary (because there is { sign extend shortint if necessary (because there is
no load instruction to sign extend an 8 bit value automatically) no load instruction to sign extend an 8 bit value automatically)
and mask out extra sign bits when loading from a smaller signed and mask out extra sign bits when loading from a smaller signed
to a larger unsigned type } to a larger unsigned type }
if fromsize = OS_S8 then if fromsize = OS_S8 then
begin begin
a_load_reg_reg(list, OS_8, OS_S8, reg, reg); a_load_reg_reg(list, OS_8, OS_S8, reg, reg);
a_load_reg_reg(list, OS_S8, tosize, reg, reg); a_load_reg_reg(list, OS_S8, tosize, reg, reg);
end; end;
end; end;
@ -532,20 +532,20 @@ const
if (a shr 5) <> 0 then if (a shr 5) <> 0 then
internalError(68991); internalError(68991);
end; end;
OP_ROL: OP_ROL:
begin begin
if (not (size in [OS_32, OS_S32])) then begin if (not (size in [OS_32, OS_S32])) then begin
internalerror(2008091307); internalerror(2008091307);
end; end;
list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM, dst, src, a and 31, 0, 31)); list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM, dst, src, a and 31, 0, 31));
end; end;
OP_ROR: OP_ROR:
begin begin
if (not (size in [OS_32, OS_S32])) then begin if (not (size in [OS_32, OS_S32])) then begin
internalerror(2008091308); internalerror(2008091308);
end; end;
list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM, dst, src, (32 - a) and 31, 0, 31)); list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM, dst, src, (32 - a) and 31, 0, 31));
end end
else else
internalerror(200109091); internalerror(200109091);
end; end;
@ -583,22 +583,22 @@ const
{ zero/sign extend result again } { zero/sign extend result again }
a_load_reg_reg(list,OS_32,size,dst,dst); a_load_reg_reg(list,OS_32,size,dst,dst);
end; end;
OP_ROL: OP_ROL:
begin begin
if (not (size in [OS_32, OS_S32])) then begin if (not (size in [OS_32, OS_S32])) then begin
internalerror(2008091305); internalerror(2008091305);
end; end;
list.concat(taicpu.op_reg_reg_reg_const_const(A_RLWNM, dst, src2, src1, 0, 31)); list.concat(taicpu.op_reg_reg_reg_const_const(A_RLWNM, dst, src2, src1, 0, 31));
end; end;
OP_ROR: OP_ROR:
begin begin
if (not (size in [OS_32, OS_S32])) then begin if (not (size in [OS_32, OS_S32])) then begin
internalerror(2008091306); internalerror(2008091306);
end; end;
tmpreg := getintregister(list, OS_INT); tmpreg := getintregister(list, OS_INT);
list.concat(taicpu.op_reg_reg(A_NEG, tmpreg, src1)); list.concat(taicpu.op_reg_reg(A_NEG, tmpreg, src1));
list.concat(taicpu.op_reg_reg_reg_const_const(A_RLWNM, dst, src2, tmpreg, 0, 31)); list.concat(taicpu.op_reg_reg_reg_const_const(A_RLWNM, dst, src2, tmpreg, 0, 31));
end; end;
else else
list.concat(taicpu.op_reg_reg_reg(op_reg_reg_opcg2asmop[op],dst,src2,src1)); list.concat(taicpu.op_reg_reg_reg(op_reg_reg_opcg2asmop[op],dst,src2,src1));
end; end;