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o patch by Nico Erfurth: Support Assembly optimized functions of SwapEndian on ARM
Currently the ARM-Port uses generic functions for SwapEndian, which are
relativly slow.
This patch adds optimized functions for the 32 and 64-bit case, the 16
bit case is still handled with a normal function, while the generated
code is far from optimal, the inlining (which is not possible with
asm-functions) makes it faster than the optimized function.
Some Numbers from my 1.2GHz Kirkwood (ARMv5):
Old New Result
SwapEndian(Integer) 12.168s 5.411s 44.47%
SwapEndian(Int64) 168.28s 9.015s 5.36%
Testcode was
begin
I := $FFFFFFF;
while I > 0 do
begin
Val2 := MySwapEndian(Val);
Dec(I);
end;
end.
Currently only the ARM implementation is tested. ARMv6+ includes a rev
instruction, while I've implemented them, I was not able to test them.
git-svn-id: trunk@20685 -
This commit is contained in:
florian
parent
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commit
df0201799e
121
rtl/arm/arm.inc
121
rtl/arm/arm.inc
@ -855,6 +855,127 @@ begin
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{$endif FPC_SYSTEM_FPC_MOVE}
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end;
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{$define FPC_SYSTEM_HAS_SWAPENDIAN}
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{ SwapEndian(<16 Bit>) being inlined is faster than using assembler }
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function SwapEndian(const AValue: SmallInt): SmallInt;{$ifdef SYSTEMINLINE}inline;{$endif}
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begin
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{ the extra Word type cast is necessary because the "AValue shr 8" }
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{ is turned into "longint(AValue) shr 8", so if AValue < 0 then }
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{ the sign bits from the upper 16 bits are shifted in rather than }
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{ zeroes. }
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Result := SmallInt((Word(AValue) shr 8) or (Word(AValue) shl 8));
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end;
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function SwapEndian(const AValue: Word): Word;{$ifdef SYSTEMINLINE}inline;{$endif}
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begin
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Result := Word((AValue shr 8) or (AValue shl 8));
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end;
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(*
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This is kept for reference. Thats what the compiler COULD generate in these cases.
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But FPC currently does not support inlining of asm-functions, so the whole call-overhead
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is bigger than the gain of the optimized function.
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function AsmSwapEndian(const AValue: SmallInt): SmallInt;{$ifdef SYSTEMINLINE}inline;{$endif};assembler;nostackframe;
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asm
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// We're starting with 4321
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{$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
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mov r0, r0, shl #16 // Shift to make that 2100
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mov r0, r0, ror #24 // Rotate to 1002
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orr r0, r0, r0 shr #16 // Shift and combine into 0012
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{$else}
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rev r0, r0 // Reverse byteorder r0 = 1234
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mov r0, r0, shr #16 // Shift down to 16bits r0 = 0012
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{$endif}
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end;
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*)
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function SwapEndian(const AValue: LongInt): LongInt;assembler;nostackframe;
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asm
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// We're starting with r0 = 4321
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{$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
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mov r2, r0, lsr #24 // r2 = 0004
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and r1, r0, #16711680 // r1 = 0300
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orr r2, r2, r0, lsl #24 // r2 = 1004
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orr r2, r2, r1, lsr #8 // r2 = 1034
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and r0, r0, #65280 // r0 = 0020
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orr r0, r2, r0, lsl #8 // r0 = 1234
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{$else}
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rev r0, r0
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{$endif}
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end;
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function SwapEndian(const AValue: DWord): DWord;assembler;nostackframe;
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asm
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// We're starting with r0 = 4321
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{$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
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mov r2, r0, lsr #24 // r2 = 0004
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and r1, r0, #16711680 // r1 = 0300
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orr r2, r2, r0, lsl #24 // r2 = 1004
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orr r2, r2, r1, lsr #8 // r2 = 1034
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and r0, r0, #65280 // r0 = 0020
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orr r0, r2, r0, lsl #8 // r0 = 1234
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{$else}
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rev r0, r0
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{$endif}
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end;
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function SwapEndian(const AValue: Int64): Int64; assembler; nostackframe;
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asm
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// We're starting with r0 = 4321 r1 = 8765
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{$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
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mov ip, r1
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mov r2, r0, lsr #24 // r2 = 0004
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and r3, r0, #16711680 // r3 = 0300
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orr r2, r2, r0, lsl #24 // r2 = 1004
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orr r2, r2, r3, lsr #8 // r2 = 1034
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and r0, r0, #65280 // r0 = 0020
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orr r1, r2, r0, lsl #8 // r1 = 1234
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mov r2, ip, lsr #24 // r2 = 0008
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and r3, ip, #16711680 // r1 = 0700
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orr r2, r2, ip, lsl #24 // r2 = 5008
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orr r2, r2, r3, lsr #8 // r2 = 5078
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and ip, ip, #65280 // ip = 0060
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orr r0, r2, ip, lsl #8 // r0 = 5678
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bx lr
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{$else}
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rev r2, r0
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rev r0, r1
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mov r1, r2
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{$endif}
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end;
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function SwapEndian(const AValue: QWord): QWord; assembler; nostackframe;
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asm
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// We're starting with r0 = 4321 r1 = 8765
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{$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
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mov ip, r1
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mov r2, r0, lsr #24 // r2 = 0004
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and r3, r0, #16711680 // r3 = 0300
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orr r2, r2, r0, lsl #24 // r2 = 1004
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orr r2, r2, r3, lsr #8 // r2 = 1034
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and r0, r0, #65280 // r0 = 0020
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orr r1, r2, r0, lsl #8 // r1 = 1234
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mov r2, ip, lsr #24 // r2 = 0008
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and r3, ip, #16711680 // r1 = 0700
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orr r2, r2, ip, lsl #24 // r2 = 5008
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orr r2, r2, r3, lsr #8 // r2 = 5078
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and ip, ip, #65280 // ip = 0060
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orr r0, r2, ip, lsl #8 // r0 = 5678
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bx lr
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{$else}
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rev r2, r0
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rev r0, r1
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mov r1, r2
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{$endif}
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end;
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{include hand-optimized assembler division code}
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{$i divide.inc}
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