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* fixed sparc bootstrap

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* use -Av9 assembler option so it accepts the memory barrier opcodes

git-svn-id: trunk@8244 -
This commit is contained in:
Jonas Maebe 2007-08-08 09:48:37 +00:00
parent 98ad33a0c7
commit e205481027
3 changed files with 8 additions and 1 deletions
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1
compiler/options.pas
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@ -2049,6 +2049,7 @@ begin
{$ifdef powerpc64}
def_system_macro('FPC_HAS_LWSYNC');
{$endif}
def_system_macro('FPC_HAS_MEMBAR');
{$if defined(x86) or defined(arm)}
def_system_macro('INTERNAL_BACKTRACE');

2
compiler/sparc/cpugas.pas
View File

@ -224,7 +224,7 @@ implementation
id : as_ggas;
idtxt : 'GAS';
asmbin : 'gas';
asmcmd : '-o $OBJ $ASM';
asmcmd : '-Av9 -o $OBJ $ASM';
supported_target : system_any;
flags : [af_allowdirect,af_needar,af_smartlink_sections];
labelprefix : '.L';

6
rtl/sparc/sparc.inc
View File

@ -522,9 +522,11 @@ const
procedure ReadBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
asm
{$ifdef FPC_HAS_MEMBAR}
ba,pt .L1
membar LoadLoad
.L1:
{$endif}
end;
procedure ReadDependencyBarrier;{$ifdef SYSTEMINLINE}inline;{$endif}
@ -534,16 +536,20 @@ end;
procedure ReadWriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
asm
{$ifdef FPC_HAS_MEMBAR}
ba,pt .L1
membar LoadLoad + LoadStore + StoreLoad + StoreStore
.L1:
{$endif}
end;
procedure WriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
asm
{$ifdef FPC_HAS_MEMBAR}
ba,pt .L1
stbar
.L1:
{$endif}
end;
{$endif}