From e2a26ecece15f944eaa327c30143bb55a4528235 Mon Sep 17 00:00:00 2001 From: florian Date: Thu, 13 Oct 2022 23:15:38 +0200 Subject: [PATCH] * fixes tcg64frv.a_op64_const_reg_reg based on the analysis of Bart B, resolves #39953 --- compiler/riscv32/cgcpu.pas | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/riscv32/cgcpu.pas b/compiler/riscv32/cgcpu.pas index 462cc706c9..80c16f7c65 100644 --- a/compiler/riscv32/cgcpu.pas +++ b/compiler/riscv32/cgcpu.pas @@ -481,7 +481,7 @@ unit cgcpu; else begin cg.a_load_const_reg(list,OS_INT,aint(lo(value)),tmplo); - list.concat(taicpu.op_reg_reg_reg(A_SUB,tmplo,tmplo,regsrc.reglo)) + list.concat(taicpu.op_reg_reg_reg(A_SUB,tmplo,regsrc.reglo,tmplo)) end; list.concat(taicpu.op_reg_reg_reg(A_SLTU,carry,regsrc.reglo,tmplo)); cg.a_load_reg_reg(list,OS_32,OS_32,tmplo,regdst.reglo);