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* initial release derieved from the ALPHA cpubase.pas, the
file still contains some ALPHA stuff
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295
compiler/new/iA64/cpubase.pas
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295
compiler/new/iA64/cpubase.pas
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{
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$Id$
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Copyright (C) 2000 by Florian Klaempfl
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this unit implements an asmlistitem class for the iA-64 architecture
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cpubase;
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interface
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uses
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strings,systems,cobjects,globals,aasm,cpuinfo;
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type
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tasmop = (A_ADD,A_SUB,A_ADDP4,A_AND,A_ANDCM,A_OR,A_XOR,A_SHLADD,
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A_SHLADDP4,A_ADDS,A_ADDL,A_CMP,A_CMP4,A_PADD1,A_PADD2,
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A_PADD4,A_PSUB1,A_PSUB2,A_PSUB4,A_PAVG1,A_PAVG2,A_PAVGSUB1,
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A_PAVGSUB2,A_PCMP1,A_PCMP2,A_PCMP4,A_PSHLADD2,A_PSHRADD2,
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A_PMPY2,A_MIX1,A_MIX2,A_MIX4,A_PACK2,A_PACK4,A_UNPACK2,
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A_UNPACK4,A_PMIN1,A_PMAX1,A_PMIN2,A_PMAX2,A_PSAD1,A_MUX1,
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A_MUX2,A_PSHR2,A_PSHR4,A_SHR,A_PSHL2,A_SHL4,A_SHL,
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A_POPCNT,A_SHRP,A_EXTR,A_DEP,A_TBIT,A_TNAT,A_BREAK,
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A_NOP,A_CHK,A_MOV,A_ZX1,A_ZX2,A_ZXT4,A_SXT1,A_SXT2,A_SXT4,
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A_CXZ1,A_CZX2,A_LD1,A_LD2,A_LD4,A_LD8,A_ST1,A_ST2,A_ST4,
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A_ST8,A_LDFS,A_LDFD,A_LDF8,A_LDFE,A_LDF,A_STFS,A_STFD,A_STF8,
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A_STFE,A_STF,A_LDFPS,A_LDFPD,A_LDFP8,A_LFETCH,A_CMPXCHG1,
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A_CMPXCHG2,A_CMPXHG4,A_CMPXCHG8,A_XCHG1,A_XCHG2,A_XCHG4,
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A_XCHG8,A_FETCHADD4,A_FETCHADD8,A_SETF,A_GETF,A_CHK,
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A_INVALA,A_MF,A_SRLZ,A_SYNC,A_FLUSHRS,A_FC,A_ALLOC,A_SUM
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A_RUM,A_BR,A_CLRRRB,A_FMA,A_FPMA,A_FMS,A_FPMS,A_FNMA,A_FPNMA,
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A_XMA,A_FSELECT,A_CMP,A_FCLASS,A_FRCPA,A_FPRCPA,A_FRSQRTA,
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A_FPRSQRTA,A_FMIN,A_FMAX,A_FAMIN,A_FAMAX,A_FPMIN,A_FPMAX,
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A_FPAMIN,A_FPAMAX,A_FPCMP,A_FMERGE,A_FMIX,A_FSXT,A_FPACK,
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A_FSWAP,A_FAND,A_FANDCM,A_FOR,A_FXOR,A_FPMERGE,A_FCVT,
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A_FPCVT,A_FSETC,A_FCLRT,A_FCHKF,A_MOVL);
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Const
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firstop = low(tasmop);
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lastop = high(tasmop);
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type
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TAsmCond =
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(
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C_None,C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
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C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,C_NS,C_NZ,C_O,C_P,
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C_PE,C_PO,C_S,C_Z
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);
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Type
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{ ALL registers }
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TRegister = (R_NO, { R_NO is Mandatory, signifies no register }
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R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,
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R_10,R_11,R_12,R_13,R_14,R_15,R_16,R_17,R_18,R_19,
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R_20,R_21,R_22,R_23,R_24,R_25,R_26,R_27,R_28,R_29,
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R_30,R_31,
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R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,
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R_F10,R_F11,R_F12,R_F13,R_F14,R_F15,R_F16,R_F17,R_F18,R_F19,
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R_F20,R_F21,R_F22,R_F23,R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,
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R_F30,R_F31);
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TRegisterset = Set of TRegister;
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{ Constants describing the registers }
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Const
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Firstreg = R_0;
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LastReg = R_F31;
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stack_pointer = R_30;
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frame_pointer = R_15;
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self_pointer = R_16;
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accumulator = R_0;
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global_pointer = R_29;
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return_pointer = R_26;
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{ it is used to pass the offset to the destructor helper routine }
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vmt_offset_reg = R_1;
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max_scratch_regs = 2;
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scratch_regs : array[1..max_scratch_regs] of tregister = (R_1,R_2);
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{ low and high of the available maximum width integer general purpose }
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{ registers }
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LoGPReg = R_0;
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HiGPReg = R_31;
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{ low and high of every possible width general purpose register (same as }
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{ above on most architctures apart from the 80x86) }
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LoReg = R_0;
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HiReg = R_31;
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cpuflags = [cf_64bitaddr];
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{ sizes }
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pointersize = 8;
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extended_size = 16;
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general_registers = [R_0..R_31];
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intregs = [R_0..R_31];
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fpuregs = [R_F0..R_F31];
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mmregs = [];
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availabletempregsint = [R_0..R_14,R_16..R_25,R_28];
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availabletempregsfpu = [R_F0..R_F30];
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availabletempregsmm = [];
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c_countusableregsint = 26;
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c_countusableregsfpu = 31;
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c_countusableregsmm = 0;
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max_operands = 4;
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registers_saved_on_cdecl = [R_9..R_14,R_F2..R_F9];
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maxvarregs = 6;
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varregs : Array [1..maxvarregs] of Tregister =
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(R_9,R_10,R_11,R_12,R_13,R_14);
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Type
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TReference = record
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offset : aword;
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symbol : pasmsymbol;
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base : tregister;
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is_immediate : boolean;
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offsetfixup : word; {needed for inline}
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{ the boundary to which the reference is surely aligned }
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alignment : byte;
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end;
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PReference = ^TReference;
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tloc = (LOC_INVALID,
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LOC_REGISTER,
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LOC_MEM,
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LOC_REFERENCE,
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LOC_JUMP,
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{ the alpha doesn't have flags, but this }
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{ avoid some conditional compiling }
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{ DON'T USE for the alpha }
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LOC_FLAGS,
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LOC_CREGISTER,
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LOC_CONST);
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tlocation = record
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case loc : tloc of
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LOC_REFERENCE,LOC_MEM : (reference : treference);
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LOC_REGISTER : (register : tregister);
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end;
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{*****************************************************************************
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Operands
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*****************************************************************************}
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{ Types of operand }
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toptype=(top_none,top_reg,top_ref,top_const,top_symbol);
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toper=record
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ot : longint;
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case typ : toptype of
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top_none : ();
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top_reg : (reg:tregister);
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top_ref : (ref:preference);
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top_const : (val:longint);
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top_symbol : (sym:pasmsymbol;symofs:longint);
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end;
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Const
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{ offsets for the integer and floating point registers }
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INT_REG = 0;
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FLOAT_REG = 32;
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{ operator qualifiers }
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OQ_CHOPPED_ROUNDING = $01; { /C }
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OQ_ROUNDING_MODE_DYNAMIC = $02; { /D }
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OQ_ROUND_TOWARD_MINUS_INFINITY = $04; { /M }
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OQ_INEXACT_RESULT_ENABLE = $08; { /I }
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OQ_SOFTWARE_COMPLETION_ENABLE = $10; { /S }
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OQ_FLOATING_UNDERFLOW_ENABLE = $20; { /U }
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OQ_INTEGER_OVERFLOW_ENABLE = $40; { /V }
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{*****************************************************************************
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Opcode propeties (needed for optimizer)
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*****************************************************************************}
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{$ifndef NOOPT}
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Type
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{What an instruction can change}
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TInsChange = (Ch_None);
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{$endif}
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{ resets all values of ref to defaults }
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procedure reset_reference(var ref : treference);
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{ set mostly used values of a new reference }
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function new_reference(base : tregister;offset : longint) : preference;
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function newreference(const r : treference) : preference;
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procedure disposereference(var r : preference);
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function reg2str(r : tregister) : string;
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{*****************************************************************************
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Init/Done
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*****************************************************************************}
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procedure InitCpu;
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procedure DoneCpu;
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implementation
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uses
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verbose;
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function reg2str(r : tregister) : string;
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begin
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if r in [R_0..R_31] then
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reg2str:='R'+tostr(longint(r)-longint(R_0))
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else if r in [R_F0..R_F31] then
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reg2str:='F'+tostr(longint(r)-longint(R_F0))
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else internalerror(38991);
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end;
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procedure reset_reference(var ref : treference);
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begin
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FillChar(ref,sizeof(treference),0);
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end;
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function new_reference(base : tregister;offset : longint) : preference;
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var
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r : preference;
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begin
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new(r);
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FillChar(r^,sizeof(treference),0);
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r^.offset:=offset;
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r^.alignment:=8;
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new_reference:=r;
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end;
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function newreference(const r : treference) : preference;
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var
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p : preference;
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begin
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new(p);
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p^:=r;
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newreference:=p;
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end;
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procedure disposereference(var r : preference);
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begin
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dispose(r);
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r:=Nil;
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end;
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{*****************************************************************************
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Init/Done
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*****************************************************************************}
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procedure InitCpu;
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begin
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end;
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procedure DoneCpu;
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begin
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end;
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end.
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{
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$Log$
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Revision 1.1 2000-03-09 20:28:00 florian
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* initial release derieved from the ALPHA cpubase.pas, the
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file still contains some ALPHA stuff
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}
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