mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-09-11 11:29:29 +02:00
* fixed a serious bug in the CSE which (I think) only showed with
-dnewoptimizations when using multi-dimensional arrays with
elements of a size different from 1, 2 or 4 (especially strings).
* made the DFA/CSE more robust (much less dependent on specifics of the
code generator)
This commit is contained in:
Jonas Maebe
parent
55988e6f55
commit
e4ceb46242
@ -172,6 +172,7 @@ Begin {CheckSequence}
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{ be used anymore after the sequence, are still used nevertheless (when }
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{ range checking is on for instance, because this is not "normal" generated }
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{ code, but more or less manually inserted) }
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(*
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{$ifndef fpc}
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If TmpResult Then
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{$else fpc}
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@ -210,6 +211,7 @@ Begin {CheckSequence}
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Exclude(RegInfo.RegsLoadedForRef,RegCounter);
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End;
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End;
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*)
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{$ifndef fpc}
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CheckSequence := TmpResult;
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{$endif fpc}
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@ -543,69 +545,6 @@ begin
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end;
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end;
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function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
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{ assumes hp doesn't modify registers implicitely (like div) }
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{ and that reg is a 32bit register }
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var p: paicpu;
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opCount: byte;
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begin
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RegReadByInstruction := false;
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p := paicpu(hp);
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if hp^.typ <> ait_instruction then
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exit;
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case p^.opcode of
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A_IMUL:
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case p^.ops of
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1: regReadByInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
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2,3:
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regReadByInstruction := regInOp(reg,p^.oper[0]) or
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regInOp(reg,p^.oper[1]);
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end;
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{ A_IDIV,A_DIV,A_IMUL:
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begin
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regReadByInstruction :=
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regInOp(reg,p^.oper[0]) or
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(((p^.opcode = A_IDIV) or
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(p^.opcode = A_DIV)) and
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(reg = R_EAX));
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end;}
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else
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begin
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for opCount := 0 to 2 do
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if (p^.oper[opCount].typ = top_ref) and
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RegInRef(reg,p^.oper[opCount].ref^) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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for opCount := 1 to MaxCh do
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case InsProp[p^.opcode].Ch[opCount] of
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Ch_RWOp1,Ch_ROp1{$ifdef arithopt},Ch_MOp1{$endif}:
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if (p^.oper[0].typ = top_reg) and
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(reg32(p^.oper[0].reg) = reg) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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Ch_RWOp2,Ch_ROp2{$ifdef arithopt},Ch_MOp2{$endif}:
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if (p^.oper[1].typ = top_reg) and
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(reg32(p^.oper[1].reg) = reg) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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Ch_RWOp3,Ch_ROp3{$ifdef arithopt},Ch_MOp3{$endif}:
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if (p^.oper[2].typ = top_reg) and
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(reg32(p^.oper[2].reg) = reg) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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end;
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end;
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end;
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end;
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procedure DoReplaceReadReg(orgReg,newReg: tregister; p: paicpu);
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var opCount: byte;
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begin
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@ -653,7 +592,7 @@ function ReplaceReg(asmL: PaasmOutput; orgReg, newReg: TRegister; p: pai;
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{ false otherwise. If successful, the contents of newReg are set to c, }
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{ which should hold the contents of newReg before the current sequence }
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{ started }
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{ if the functino returns true, returnEndP holds the lat instruction }
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{ if the function returns true, returnEndP holds the last instruction }
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{ where newReg was replaced by orgReg }
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var endP, hp: Pai;
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removeLast, sequenceEnd, tmpResult, newRegModified, orgRegRead: Boolean;
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@ -878,7 +817,7 @@ Procedure DoCSE(AsmL: PAasmOutput; First, Last: Pai);
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{marks the instructions that can be removed by RemoveInstructs. They're not
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removed immediately because sometimes an instruction needs to be checked in
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two different sequences}
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Var Cnt, Cnt2: Longint;
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Var Cnt, Cnt2, Cnt3: Longint;
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p, hp1, hp2: Pai;
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hp3, hp4: pai;
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{$ifdef replacereg}
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@ -916,9 +855,14 @@ Begin
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Begin
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If (p = StartMod) And
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GetLastInstruction (p, hp1) And
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(hp1^.typ <> ait_marker)
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Then
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(hp1^.typ <> ait_marker) Then
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{so we don't try to check a sequence when p is the first instruction of the block}
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begin
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{$ifdef csdebug}
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hp5 := new(pai_asm_comment,init(strpnew(
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'cse checking '+att_reg2str[Reg32(Paicpu(p)^.oper[1].reg)])));
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insertLLItem(asml,p,p^.next,hp5);
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{$endif csdebug}
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If CheckSequence(p, Paicpu(p)^.oper[1].reg, Cnt, RegInfo) And
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(Cnt > 0) Then
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Begin
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@ -943,16 +887,31 @@ Begin
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While Cnt2 <= Cnt Do
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Begin
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If (hp1 = nil) And
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Not(RegInInstruction(Paicpu(hp2)^.oper[1].reg, p) Or
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RegInInstruction(Reg32(Paicpu(hp2)^.oper[1].reg), p)) And
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Not((p^.typ = ait_instruction) And
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(paicpu(p)^.OpCode = A_MOV) And
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(paicpu(p)^.Oper[0].typ = top_ref) And
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(PPaiProp(p^.OptInfo)^.Regs[Reg32(paicpu(p)^.Oper[1].reg)].NrOfMods
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<= (Cnt - Cnt2 + 1)))
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Then hp1 := p;
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Not(RegInInstruction(Paicpu(hp2)^.oper[1].reg, p)) And
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((p^.typ = ait_instruction) And
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((paicpu(p)^.OpCode = A_MOV) or
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(paicpu(p)^.opcode = A_MOVZX) or
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(paicpu(p)^.opcode = A_MOVSX)) And
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(paicpu(p)^.Oper[0].typ = top_ref)) Then
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if (PPaiProp(p^.OptInfo)^.Regs[Reg32(paicpu(p)^.Oper[1].reg)].NrOfMods
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<= (Cnt - Cnt2 + 1)) and
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(Reg32(paicpu(p)^.Oper[1].reg) in regInfo.regsLoadedForRef) then
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begin
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hp3 := p;
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for Cnt3 := PPaiProp(p^.OptInfo)^.Regs[Reg32(paicpu(p)^.Oper[1].reg)].NrOfMods
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downto 1 do
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begin
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{$ifndef noremove}
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PPaiProp(p^.OptInfo)^.CanBeRemoved := True;
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if regInInstruction(paicpu(p)^.Oper[1].reg,hp3) then
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PPaiProp(hp3^.OptInfo)^.CanBeRemoved := True;
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{$endif noremove}
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getNextInstruction(hp3,hp3);
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end
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end
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else hp1 := p;
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{$ifndef noremove}
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if regInInstruction(Paicpu(hp2)^.oper[1].reg,p) then
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PPaiProp(p^.OptInfo)^.CanBeRemoved := True;
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{$endif noremove}
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Inc(Cnt2);
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GetNextInstruction(p, p);
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@ -1072,7 +1031,8 @@ Begin
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End;
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hp3 := New(Pai_Marker,Init(NoPropInfoEnd));
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InsertLLItem(AsmL, Pai(hp2^.Previous), hp2, hp3);
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If hp1 <> nil Then p := hp1;
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If hp1 <> nil Then
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p := hp1;
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Continue;
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End
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Else
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@ -1085,14 +1045,14 @@ Begin
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Cnt2 := 1;
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While Cnt2 <= Cnt Do
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Begin
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If RegInInstruction(Paicpu(hp2)^.oper[1].reg, p) Or
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RegInInstruction(Reg32(Paicpu(hp2)^.oper[1].reg), p) Then
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If RegInInstruction(Paicpu(hp2)^.oper[1].reg, p) Then
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PPaiProp(p^.OptInfo)^.CanBeRemoved := False;
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Inc(Cnt2);
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GetNextInstruction(p, p);
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End;
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Continue;
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End;
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End;
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End;
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End;
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{$ifdef replacereg}
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@ -1216,7 +1176,14 @@ End.
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{
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$Log$
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Revision 1.56 2000-03-25 19:05:47 jonas
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Revision 1.57 2000-04-10 12:45:57 jonas
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* fixed a serious bug in the CSE which (I think) only showed with
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-dnewoptimizations when using multi-dimensional arrays with
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elements of a size different from 1, 2 or 4 (especially strings).
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* made the DFA/CSE more robust (much less dependent on specifics of the
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code generator)
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Revision 1.56 2000/03/25 19:05:47 jonas
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* fixed some things for -Or. Make cycle now works with -OG2p3r if
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you use -Aas. There still a bug in popt386.pas that causes a
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problem with the binary writer, but I haven't found it yet
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@ -1352,4 +1319,4 @@ End.
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Revision 1.24 1999/08/25 11:59:58 jonas
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* changed pai386, paippc and paiapha (same for tai*) to paicpu (taicpu)
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}
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}
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@ -64,11 +64,10 @@ Function RefsEquivalent(Const R1, R2: TReference; Var RegInfo: TRegInfo; OpAct:
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Function RefsEqual(Const R1, R2: TReference): Boolean;
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Function IsGP32Reg(Reg: TRegister): Boolean;
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Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
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Function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
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{$ifdef newOptimizations}
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Function RegInOp(Reg: TRegister; const o:toper): Boolean;
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{$endif newOptimizations}
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Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
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function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
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function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
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function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
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function RegInOp(Reg: TRegister; const o:toper): Boolean;
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Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
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Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
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@ -771,52 +770,138 @@ Begin {checks whether Ref contains a reference to Reg}
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RegInRef := (Ref.Base = Reg) Or (Ref.Index = Reg)
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End;
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Function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
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{checks if Reg is used by the instruction p1}
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Var Counter: Longint;
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TmpResult: Boolean;
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Begin
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TmpResult := False;
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If (Pai(p1)^.typ = ait_instruction) Then
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Begin
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Reg := Reg32(Reg);
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Counter := 0;
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Repeat
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Case Paicpu(p1)^.oper[Counter].typ Of
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Top_Reg: TmpResult := Reg = Reg32(Paicpu(p1)^.oper[Counter].reg);
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Top_Ref: TmpResult := RegInRef(Reg, Paicpu(p1)^.oper[Counter].ref^);
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End;
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Inc(Counter)
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Until (Counter = 3) or TmpResult;
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End;
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RegInInstruction := TmpResult
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End;
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function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
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var p: paicpu;
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opCount: byte;
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begin
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RegReadByInstruction := false;
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reg := reg32(reg);
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p := paicpu(hp);
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if hp^.typ <> ait_instruction then
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exit;
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case p^.opcode of
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A_IMUL:
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case p^.ops of
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1: regReadByInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
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2,3:
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regReadByInstruction := regInOp(reg,p^.oper[0]) or
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regInOp(reg,p^.oper[1]);
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end;
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A_IDIV,A_DIV,A_MUL:
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begin
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regReadByInstruction :=
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regInOp(reg,p^.oper[0]) or (reg = R_EAX);
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end;
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else
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begin
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for opCount := 0 to 2 do
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if (p^.oper[opCount].typ = top_ref) and
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RegInRef(reg,p^.oper[opCount].ref^) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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for opCount := 1 to MaxCh do
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case InsProp[p^.opcode].Ch[opCount] of
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Ch_REAX..CH_REDI,CH_RWEAX..Ch_MEDI:
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if reg = TCh2Reg(InsProp[p^.opcode].Ch[opCount]) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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Ch_RWOp1,Ch_ROp1{$ifdef arithopt},Ch_MOp1{$endif}:
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if (p^.oper[0].typ = top_reg) and
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(reg32(p^.oper[0].reg) = reg) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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Ch_RWOp2,Ch_ROp2{$ifdef arithopt},Ch_MOp2{$endif}:
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if (p^.oper[1].typ = top_reg) and
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(reg32(p^.oper[1].reg) = reg) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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Ch_RWOp3,Ch_ROp3{$ifdef arithopt},Ch_MOp3{$endif}:
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if (p^.oper[2].typ = top_reg) and
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(reg32(p^.oper[2].reg) = reg) then
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begin
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RegReadByInstruction := true;
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exit
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end;
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end;
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end;
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end;
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end;
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function regInInstruction(Reg: TRegister; p1: Pai): Boolean;
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{ Checks if Reg is used by the instruction p1 }
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{ Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
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{ this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
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var p: paicpu;
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opCount: byte;
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begin
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reg := reg32(reg);
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regInInstruction := false;
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p := paicpu(p1);
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if p1^.typ <> ait_instruction then
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exit;
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case p^.opcode of
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A_IMUL:
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case p^.ops of
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1: regInInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
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2,3:
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regInInstruction := regInOp(reg,p^.oper[0]) or
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regInOp(reg,p^.oper[1]) or regInOp(reg,p^.oper[2]);
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end;
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A_IDIV,A_DIV,A_MUL:
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regInInstruction :=
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regInOp(reg,p^.oper[0]) or
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(reg = R_EAX) or (reg = R_EDX)
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else
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begin
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for opCount := 1 to MaxCh do
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case InsProp[p^.opcode].Ch[opCount] of
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CH_REAX..CH_MEDI:
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if tch2reg(InsProp[p^.opcode].Ch[opCount]) = reg then
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begin
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regInInstruction := true;
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exit;
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end;
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Ch_ROp1..Ch_MOp1:
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if regInOp(reg,p^.oper[0]) then
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begin
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regInInstruction := true;
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exit
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end;
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Ch_ROp2..Ch_MOp2:
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if regInOp(reg,p^.oper[1]) then
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begin
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regInInstruction := true;
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exit
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end;
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Ch_ROp3..Ch_MOp3:
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if regInOp(reg,p^.oper[2]) then
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begin
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regInInstruction := true;
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exit
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end;
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end;
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end;
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end;
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end;
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{$ifdef newOptimizations}
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Function RegInOp(Reg: TRegister; const o:toper): Boolean;
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Begin
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RegInOp := False;
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reg := reg32(reg);
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Case o.typ Of
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top_reg: RegInOp := Reg = o.reg;
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top_reg: RegInOp := Reg = reg32(o.reg);
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top_ref: RegInOp := (Reg = o.ref^.Base) Or
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(Reg = o.ref^.Index);
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End;
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End;
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{$endif newOptimizations}
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(*
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Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
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{returns true if Reg is modified by the instruction p1. P1 is assumed to be
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of the type ait_instruction}
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Var hp: Pai;
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Begin
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If GetLastInstruction(p1, hp)
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Then
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RegModifiedByInstruction :=
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PPAiProp(p1^.OptInfo)^.Regs[Reg].WState <>
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PPAiProp(hp^.OptInfo)^.Regs[Reg].WState
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Else RegModifiedByInstruction := True;
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End;
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*)
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Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
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Var InstrProp: TInsProp;
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@ -830,7 +915,7 @@ Begin
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A_IMUL:
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With paicpu(p1)^ Do
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TmpResult :=
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((ops = 1) and (reg = R_EAX)) or
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((ops = 1) and (reg in [R_EAX,R_EDX])) or
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((ops = 2) and (Reg32(oper[1].reg) = reg)) or
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((ops = 3) and (Reg32(oper[2].reg) = reg));
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A_DIV, A_IDIV, A_MUL:
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@ -1098,10 +1183,11 @@ Begin
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Else s := 0
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End;
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|
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Function RegInSequence(Reg: TRegister; Const Content: TContent): Boolean;
|
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{checks the whole sequence of Content (so StartMod and and the next NrOfMods
|
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Pai objects) to see whether Reg is used somewhere, without it being loaded
|
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with something else first}
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Function sequenceDependsonReg(Const Content: TContent; seqReg, Reg: TRegister): Boolean;
|
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{ Content is the sequence of instructions that describes the contents of }
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{ seqReg. Reg is being overwritten by the current instruction. If the }
|
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{ content of seqReg depends on reg (ie. because of a }
|
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{ "movl (seqreg,reg), seqReg" instruction), this function returns true }
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Var p: Pai;
|
||||
Counter: Byte;
|
||||
TmpResult: Boolean;
|
||||
@ -1117,35 +1203,30 @@ Begin
|
||||
If (p^.typ = ait_instruction) and
|
||||
((Paicpu(p)^.opcode = A_MOV) or
|
||||
(Paicpu(p)^.opcode = A_MOVZX) or
|
||||
(Paicpu(p)^.opcode = A_MOVSX))
|
||||
Then
|
||||
Begin
|
||||
If (Paicpu(p)^.oper[0].typ = top_ref) Then
|
||||
With Paicpu(p)^.oper[0].ref^ Do
|
||||
If (Base = procinfo^.FramePointer) And
|
||||
(Index = R_NO)
|
||||
Then
|
||||
Begin
|
||||
RegsChecked := RegsChecked + [Reg32(Paicpu(p)^.oper[1].reg)];
|
||||
If Reg = Reg32(Paicpu(p)^.oper[1].reg) Then
|
||||
Break;
|
||||
End
|
||||
Else
|
||||
Begin
|
||||
If (Base = Reg) And
|
||||
Not(Base In RegsChecked)
|
||||
Then TmpResult := True;
|
||||
If Not(TmpResult) And
|
||||
(Index = Reg) And
|
||||
Not(Index In RegsChecked)
|
||||
Then TmpResult := True;
|
||||
End
|
||||
End
|
||||
Else TmpResult := RegInInstruction(Reg, p);
|
||||
(Paicpu(p)^.opcode = A_MOVSX) or
|
||||
(paicpu(p)^.opcode = A_LEA)) and
|
||||
(Paicpu(p)^.oper[0].typ = top_ref) Then
|
||||
With Paicpu(p)^.oper[0].ref^ Do
|
||||
If ((Base = procinfo^.FramePointer) or
|
||||
(assigned(symbol) and (base = R_NO))) And
|
||||
(Index = R_NO) Then
|
||||
Begin
|
||||
RegsChecked := RegsChecked + [Reg32(Paicpu(p)^.oper[1].reg)];
|
||||
If Reg = Reg32(Paicpu(p)^.oper[1].reg) Then
|
||||
Break;
|
||||
End
|
||||
Else
|
||||
tmpResult :=
|
||||
regReadByInstruction(reg,p) and
|
||||
regModifiedByInstruction(seqReg,p)
|
||||
Else
|
||||
tmpResult :=
|
||||
regReadByInstruction(reg,p) and
|
||||
regModifiedByInstruction(seqReg,p);
|
||||
Inc(Counter);
|
||||
GetNextInstruction(p,p)
|
||||
End;
|
||||
RegInSequence := TmpResult
|
||||
sequenceDependsonReg := TmpResult
|
||||
End;
|
||||
|
||||
Procedure DestroyReg(p1: PPaiProp; Reg: TRegister; doIncState:Boolean);
|
||||
@ -1173,20 +1254,19 @@ Begin
|
||||
WState := TmpWState;
|
||||
RState := TmpRState;
|
||||
End;
|
||||
For Counter := R_EAX to R_EDI Do
|
||||
With p1^.Regs[Counter] Do
|
||||
For counter := R_EAX to R_EDI Do
|
||||
With p1^.Regs[counter] Do
|
||||
If (Typ = Con_Ref) And
|
||||
RegInSequence(Reg, p1^.Regs[Counter])
|
||||
Then
|
||||
Begin
|
||||
if doIncState then
|
||||
IncState(WState);
|
||||
TmpWState := WState;
|
||||
TmpRState := RState;
|
||||
FillChar(p1^.Regs[Counter], SizeOf(TContent), 0);
|
||||
WState := TmpWState;
|
||||
RState := TmpRState;
|
||||
End;
|
||||
sequenceDependsOnReg(p1^.Regs[counter],counter,reg) Then
|
||||
Begin
|
||||
if doIncState then
|
||||
IncState(WState);
|
||||
TmpWState := WState;
|
||||
TmpRState := RState;
|
||||
FillChar(p1^.Regs[Counter], SizeOf(TContent), 0);
|
||||
WState := TmpWState;
|
||||
RState := TmpRState;
|
||||
End;
|
||||
End;
|
||||
End;
|
||||
|
||||
@ -1561,9 +1641,24 @@ Begin {initializes/desrtoys all registers}
|
||||
End;
|
||||
|
||||
Procedure DestroyOp(PaiObj: Pai; const o:Toper);
|
||||
{$ifdef statedebug}
|
||||
var hp: pai;
|
||||
{$endif statedebug}
|
||||
|
||||
Begin
|
||||
Case o.typ Of
|
||||
top_reg: DestroyReg(PPaiProp(PaiObj^.OptInfo), o.reg, true);
|
||||
top_reg:
|
||||
begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[o.reg])));
|
||||
hp^.next := paiobj^.next;
|
||||
hp^.previous := paiobj;
|
||||
paiobj^.next := hp;
|
||||
if assigned(hp^.next) then
|
||||
hp^.next^.previous := hp;
|
||||
{$endif statedebug}
|
||||
DestroyReg(PPaiProp(PaiObj^.OptInfo), o.reg, true);
|
||||
end;
|
||||
top_ref:
|
||||
Begin
|
||||
ReadRef(PPaiProp(PaiObj^.OptInfo), o.ref);
|
||||
@ -1610,6 +1705,10 @@ Begin
|
||||
End
|
||||
Else
|
||||
Begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[reg])));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyReg(PPaiProp(p^.optinfo), Reg, true);
|
||||
{$ifdef StateDebug}
|
||||
hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState))));
|
||||
@ -1890,6 +1989,11 @@ Begin
|
||||
Case Paicpu(p)^.oper[1].typ Of
|
||||
Top_Reg:
|
||||
Begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying '+
|
||||
att_reg2str[Paicpu(p)^.oper[1].reg])));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyReg(CurProp, Paicpu(p)^.oper[1].reg, true);
|
||||
ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
|
||||
{ CurProp^.Regs[Paicpu(p)^.oper[1].reg] :=
|
||||
@ -1908,7 +2012,6 @@ Begin
|
||||
Top_Ref:
|
||||
Begin {destination is always a register in this case}
|
||||
ReadRef(CurProp, Paicpu(p)^.oper[0].ref);
|
||||
ReadReg(CurProp, Paicpu(p)^.oper[1].reg);
|
||||
TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
|
||||
If RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^) And
|
||||
(CurProp^.Regs[TmpReg].Typ = Con_Ref)
|
||||
@ -1927,6 +2030,10 @@ Begin
|
||||
End
|
||||
Else
|
||||
Begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying & initing '+att_reg2str[tmpreg])));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyReg(CurProp, TmpReg, true);
|
||||
If Not(RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^)) Then
|
||||
With CurProp^.Regs[TmpReg] Do
|
||||
@ -1948,6 +2055,10 @@ Begin
|
||||
Top_Reg:
|
||||
Begin
|
||||
TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[tmpreg])));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
With CurProp^.Regs[TmpReg] Do
|
||||
Begin
|
||||
DestroyReg(CurProp, TmpReg, true);
|
||||
@ -1971,6 +2082,10 @@ Begin
|
||||
If (Paicpu(p)^.OpCode = A_IDIV) or
|
||||
(Paicpu(p)^.OpCode = A_DIV) Then
|
||||
ReadReg(CurProp,R_EDX);
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying eax and edx')));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyReg(CurProp, R_EAX, true);
|
||||
DestroyReg(CurProp, R_EDX, true)
|
||||
End;
|
||||
@ -1982,18 +2097,25 @@ Begin
|
||||
If (Paicpu(p)^.oper[1].typ = top_none) Then
|
||||
Begin
|
||||
ReadReg(CurProp,R_EAX);
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying eax and edx')));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyReg(CurProp, R_EAX, true);
|
||||
DestroyReg(CurProp, R_EDX, true)
|
||||
End
|
||||
Else
|
||||
{$ifdef arithopt}
|
||||
AddInstr2OpContents(Paicpu(p), Paicpu(p)^.oper[1])
|
||||
AddInstr2OpContents(
|
||||
{$ifdef statedebug}asml,{$endif}
|
||||
Paicpu(p), Paicpu(p)^.oper[1])
|
||||
{$else arithopt}
|
||||
DestroyOp(p, Paicpu(p)^.oper[1])
|
||||
{$endif arithopt}
|
||||
Else
|
||||
{$ifdef arithopt}
|
||||
AddInstr2OpContents(Paicpu(p), Paicpu(p)^.oper[2]);
|
||||
AddInstr2OpContents({$ifdef statedebug}asml,{$endif}
|
||||
Paicpu(p), Paicpu(p)^.oper[2]);
|
||||
{$else arithopt}
|
||||
DestroyOp(p, Paicpu(p)^.oper[2]);
|
||||
{$endif arithopt}
|
||||
@ -2003,8 +2125,17 @@ Begin
|
||||
begin
|
||||
readop(curprop,paicpu(p)^.oper[0]);
|
||||
if reginref(paicpu(p)^.oper[1].reg,paicpu(p)^.oper[0].ref^) then
|
||||
AddInstr2RegContents(paicpu(p), paicpu(p)^.oper[1].reg)
|
||||
else destroyreg(curprop,paicpu(p)^.oper[1].reg,true);
|
||||
AddInstr2RegContents({$ifdef statedebug}asml,{$endif}
|
||||
paicpu(p), paicpu(p)^.oper[1].reg)
|
||||
else
|
||||
begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying '+
|
||||
att_reg2str[paicpu(p)^.oper[1].reg])));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
destroyreg(curprop,paicpu(p)^.oper[1].reg,true);
|
||||
end;
|
||||
end;
|
||||
{$endif arithopt}
|
||||
Else
|
||||
@ -2019,13 +2150,17 @@ Begin
|
||||
Begin
|
||||
If (InstrProp.Ch[Cnt] >= Ch_RWEAX) Then
|
||||
ReadReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]));
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew('destroying '+
|
||||
att_reg2str[TCh2Reg(InstrProp.Ch[Cnt])])));
|
||||
insertllitem(asml,p,p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]), true);
|
||||
End;
|
||||
{$ifdef arithopt}
|
||||
Ch_MEAX..Ch_MEDI:
|
||||
AddInstr2RegContents({$ifdef statedebug} asml, {$endif}
|
||||
Paicpu(p),
|
||||
TCh2Reg(InstrProp.Ch[Cnt]));
|
||||
AddInstr2RegContents({$ifdef statedebug} asml,{$endif}
|
||||
Paicpu(p),TCh2Reg(InstrProp.Ch[Cnt]));
|
||||
{$endif arithopt}
|
||||
Ch_CDirFlag: CurProp^.DirFlag := F_NotSet;
|
||||
Ch_SDirFlag: CurProp^.DirFlag := F_Set;
|
||||
@ -2075,6 +2210,11 @@ Begin
|
||||
Ch_RFlags, Ch_WFlags, Ch_RWFlags, Ch_FPU:
|
||||
Else
|
||||
Begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew(
|
||||
'destroying all regs for prev instruction')));
|
||||
insertllitem(asml,p, p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyAllRegs(CurProp);
|
||||
End;
|
||||
End;
|
||||
@ -2086,6 +2226,11 @@ Begin
|
||||
End
|
||||
Else
|
||||
Begin
|
||||
{$ifdef statedebug}
|
||||
hp := new(pai_asm_comment,init(strpnew(
|
||||
'destroying all regs: unknown pai: '+tostr(ord(p^.typ)))));
|
||||
insertllitem(asml,p, p^.next,hp);
|
||||
{$endif statedebug}
|
||||
DestroyAllRegs(CurProp);
|
||||
End;
|
||||
End;
|
||||
@ -2190,7 +2335,14 @@ End.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.85 2000-03-25 18:58:00 jonas
|
||||
Revision 1.86 2000-04-10 12:45:56 jonas
|
||||
* fixed a serious bug in the CSE which (I think) only showed with
|
||||
-dnewoptimizations when using multi-dimensional arrays with
|
||||
elements of a size different from 1, 2 or 4 (especially strings).
|
||||
* made the DFA/CSE more robust (much less dependent on specifics of the
|
||||
code generator)
|
||||
|
||||
Revision 1.85 2000/03/25 18:58:00 jonas
|
||||
* moved AllocRegBetween() from csopt386 to this unit because it's now
|
||||
also used by popt386
|
||||
|
||||
@ -2278,4 +2430,4 @@ End.
|
||||
Revision 1.62 1999/10/07 16:07:35 jonas
|
||||
* small bugfix in ArrayRefsEq
|
||||
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user