From e540356be4d838df11f60cae2d66843b8e59226e Mon Sep 17 00:00:00 2001 From: tom_at_work Date: Thu, 13 Mar 2008 19:45:01 +0000 Subject: [PATCH] * fixed merge errors introduced by merge from resources branch, re-applied r9721 git-svn-id: trunk@10485 - --- compiler/powerpc64/cgcpu.pas | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/compiler/powerpc64/cgcpu.pas b/compiler/powerpc64/cgcpu.pas index a9ac55fc7d..9eac4998d2 100644 --- a/compiler/powerpc64/cgcpu.pas +++ b/compiler/powerpc64/cgcpu.pas @@ -726,33 +726,6 @@ begin ref2 := ref; fixref(list, ref2); - { unaligned 64 bit accesses are much slower than unaligned } - { 32 bit accesses because they cause a hardware exception } - { (which isn't handled by linux, so there you even get a } - { crash) } - if (ref.alignment<>0) and - (fromsize in [OS_64,OS_S64]) and - (ref.alignment<4) then - begin - if (ref2.base<>NR_NO) and - (ref2.index<>NR_NO) then - begin - // althoug fixref above makes sure that the location ref points to can be - // accessed using the existing opcode restrictions, ref+4 still may be too - // large to encode - tmpreg:=getintregister(list,OS_64); - a_op_reg_reg_reg(list,OP_ADD,OS_64,ref2.base,ref2.index,tmpreg); - ref2.base:=tmpreg; - ref2.index:=NR_NO; - end; - tmpreg:=getintregister(list,OS_32); - a_load_ref_reg(list,OS_32,OS_32,ref2,tmpreg); - inc(ref2.offset,4); - a_load_ref_reg(list,OS_32,OS_32,ref2,reg); - list.concat(taicpu.op_reg_reg_const_const(A_RLDIMI, reg, tmpreg, 32, 0)); - exit; - end; - op := loadinstr[fromsize, ref2.index <> NR_NO, false]; { there is no LWAU instruction, simulate using ADDI and LWA } if (op = A_NOP) then begin