From e5ebc65cce1acf404c0f8939e48b984ccd84491c Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Sun, 11 Feb 2018 15:54:37 +0000
Subject: [PATCH] * if si and di are allocated on i8086, using an index in
 references is not possible anymore

git-svn-id: trunk@38203 -
---
 .gitattributes         |  1 +
 compiler/x86/cgx86.pas | 11 +++++++++++
 tests/tbs/tb0637.pp    | 26 ++++++++++++++++++++++++++
 3 files changed, 38 insertions(+)
 create mode 100644 tests/tbs/tb0637.pp

diff --git a/.gitattributes b/.gitattributes
index fadb627ec0..7952bd1c5b 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -11487,6 +11487,7 @@ tests/tbs/tb0633.pp svneol=native#text/pascal
 tests/tbs/tb0634.pp svneol=native#text/pascal
 tests/tbs/tb0635.pp svneol=native#text/pascal
 tests/tbs/tb0636.pp svneol=native#text/pascal
+tests/tbs/tb0637.pp svneol=native#text/pascal
 tests/tbs/tb205.pp svneol=native#text/plain
 tests/tbs/tb610.pp svneol=native#text/pascal
 tests/tbs/tb613.pp svneol=native#text/plain
diff --git a/compiler/x86/cgx86.pas b/compiler/x86/cgx86.pas
index a6cae73553..2131d83830 100644
--- a/compiler/x86/cgx86.pas
+++ b/compiler/x86/cgx86.pas
@@ -2675,6 +2675,17 @@ unit cgx86;
                 list.concat(taicpu.op_reg(A_POP,push_segment_size,NR_ES));
               end;
             getcpuregister(list,REGSI);
+{$ifdef i8086}
+            { at this point, si and di are allocated, so no register is available as index =>
+              compiler will hang/ie during spilling, so avoid that srcref has base and index }
+            if (srcref.base<>NR_NO) and (srcref.index<>NR_NO) then
+              begin
+                r:=getaddressregister(list);
+                a_op_reg_reg_reg(list,OP_ADD,OS_ADDR,srcref.base,srcref.index,r);
+                srcref.base:=r;
+                srcref.index:=NR_NO;
+              end;
+{$endif i8086}
             if ((source.segment=NR_NO) and (segment_regs_equal(NR_SS,NR_DS) or ((source.base<>NR_BP) and (source.base<>NR_SP)))) or
                (is_segment_reg(source.segment) and segment_regs_equal(source.segment,NR_DS)) then
               begin
diff --git a/tests/tbs/tb0637.pp b/tests/tbs/tb0637.pp
new file mode 100644
index 0000000000..eb63358127
--- /dev/null
+++ b/tests/tbs/tb0637.pp
@@ -0,0 +1,26 @@
+{$IFDEF FPC}
+{$MODE TP}
+{$ENDIF}
+program a;
+
+type
+  rectyp = record
+    { it doesn't crash if this is 0..5 }
+    f: array[0..6] of byte;
+  end;
+  prectyp = ^rectyp;
+
+  arrrec = array[0..1] of rectyp;
+  parrrectyp = ^arrrec;
+
+var
+  arr: parrrectyp;
+
+procedure xx(x: integer);
+begin
+  { crash here }
+  arr^[x]:=arr^[x+1];
+end;
+
+begin
+end.