From e694897bb3bdea5f4606946dbad784ba7bf0af1c Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Mon, 15 Feb 2021 21:34:07 +0000
Subject: [PATCH]   * initial implementation of CFI support for arm (non-thumb)

git-svn-id: trunk@48684 -
---
 compiler/arm/cgcpu.pas | 14 +++++++++++++-
 compiler/cfidwarf.pas  | 19 +++----------------
 2 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/compiler/arm/cgcpu.pas b/compiler/arm/cgcpu.pas
index c68bc59959..6a8b034df8 100644
--- a/compiler/arm/cgcpu.pas
+++ b/compiler/arm/cgcpu.pas
@@ -1907,7 +1907,7 @@ unit cgcpu;
          r : byte;
          mmregs,
          regs, saveregs : tcpuregisterset;
-         registerarea,
+         registerarea, offset,
          r7offset,
          stackmisalignment : pint;
          imm1, imm2: DWord;
@@ -2005,6 +2005,7 @@ unit cgcpu;
                              break;
                            end;
                      list.concat(setoppostfix(taicpu.op_ref_regset(A_STM,ref,R_INTREGISTER,R_SUBWHOLE,regs),PF_FD));
+                     current_asmdata.asmcfi.cfa_def_cfa_offset(list,registerarea);
                    end;
 
                 if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
@@ -2013,6 +2014,15 @@ unit cgcpu;
                       framepointer is at R11-12 (for get_caller_frame) }
                     list.concat(taicpu.op_reg_reg_const(A_SUB,NR_FRAME_POINTER_REG,NR_R12,4));
                     a_reg_dealloc(list,NR_R12);
+                    current_asmdata.asmcfi.cfa_def_cfa_register(list,current_procinfo.framepointer);
+                    current_asmdata.asmcfi.cfa_def_cfa_offset(list,4);
+                    offset:=-4;
+                    for r:=RS_R15 downto RS_R0 do
+                      if r in regs then
+                        begin
+                          current_asmdata.asmcfi.cfa_offset(list,newreg(R_INTREGISTER,r,R_SUBWHOLE),offset);
+                          dec(offset,4);
+                        end;
                   end;
               end
             else
@@ -2095,6 +2105,8 @@ unit cgcpu;
                     list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R12));
                     a_reg_dealloc(list,NR_R12);
                   end;
+                if current_procinfo.framepointer=NR_STACK_POINTER_REG then
+                  current_asmdata.asmcfi.cfa_def_cfa_offset(list,registerarea+localsize);
               end;
 
             if (mmregs<>[]) or
diff --git a/compiler/cfidwarf.pas b/compiler/cfidwarf.pas
index e27c2dee1c..ca2115f627 100644
--- a/compiler/cfidwarf.pas
+++ b/compiler/cfidwarf.pas
@@ -292,22 +292,9 @@ implementation
 {$elseif defined(arm)}
     procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList);
       begin
-        if GenerateThumbCode then
-          begin
-            list.concat(tai_const.create_8bit(DW_CFA_def_cfa));
-            list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG)));
-            list.concat(tai_const.create_uleb128bit(0));
-          end
-        else
-          begin
-            { FIXME!!! }
-            list.concat(tai_const.create_8bit(DW_CFA_def_cfa));
-            list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG)));
-            list.concat(tai_const.create_uleb128bit(sizeof(aint)));
-            list.concat(tai_const.create_8bit(DW_CFA_offset_extended));
-            list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_RETURN_ADDRESS_REG)));
-            list.concat(tai_const.create_uleb128bit((-sizeof(aint)) div data_alignment_factor));
-          end;
+        list.concat(tai_const.create_8bit(DW_CFA_def_cfa));
+        list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG)));
+        list.concat(tai_const.create_uleb128bit(0));
       end;
 {$else}
     { if more cpu dependend stuff is implemented, this needs more refactoring }