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https://gitlab.com/freepascal.org/fpc/source.git
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* make fpu/mmx/xmm/ymm registers numbers instead of flags to have enough space for zmm/bnd/k registers
git-svn-id: trunk@38116 -
This commit is contained in:
parent
2d52536460
commit
e6a6938787
@ -86,6 +86,8 @@ interface
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otf_reg_mmx = $02000000;
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otf_reg_mmx = $02000000;
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otf_reg_xmm = $04000000;
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otf_reg_xmm = $04000000;
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otf_reg_ymm = $08000000;
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otf_reg_ymm = $08000000;
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otf_reg_extra_mask = $0F000000;
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{ Bits 16..19: subclasses, meaning depends on classes field }
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{ Bits 16..19: subclasses, meaning depends on classes field }
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otf_sub0 = $00010000;
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otf_sub0 = $00010000;
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otf_sub1 = $00020000;
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otf_sub1 = $00020000;
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@ -93,7 +95,9 @@ interface
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otf_sub3 = $00080000;
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otf_sub3 = $00080000;
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OT_REG_SMASK = otf_sub0 or otf_sub1 or otf_sub2 or otf_sub3;
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OT_REG_SMASK = otf_sub0 or otf_sub1 or otf_sub2 or otf_sub3;
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OT_REG_TYPMASK = otf_reg_cdt or otf_reg_gpr or otf_reg_sreg or otf_reg_fpu or otf_reg_mmx or otf_reg_xmm or otf_reg_ymm;
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OT_REG_EXTRA_MASK = $0F000000;
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OT_REG_TYPMASK = otf_reg_cdt or otf_reg_gpr or otf_reg_sreg or otf_reg_extra_mask;
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{ register class 0: CRx, DRx and TRx }
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{ register class 0: CRx, DRx and TRx }
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{$ifdef x86_64}
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{$ifdef x86_64}
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OT_REG_CDT = OT_REGISTER or otf_reg_cdt or OT_BITS64;
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OT_REG_CDT = OT_REGISTER or otf_reg_cdt or OT_BITS64;
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@ -175,7 +179,7 @@ interface
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{ simple [address] offset }
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{ simple [address] offset }
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{ Matches any type of r/m operand }
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{ Matches any type of r/m operand }
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OT_MEMORY_ANY = OT_MEMORY or OT_RM_GPR or OT_XMMRM or OT_MMXRM or OT_YMMRM;
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OT_MEMORY_ANY = OT_MEMORY or OT_RM_GPR or OT_XMMRM or OT_MMXRM or OT_YMMRM or OT_REG_EXTRA_MASK;
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{ Immediate operands }
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{ Immediate operands }
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OT_IMM8 = OT_IMMEDIATE or OT_BITS8;
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OT_IMM8 = OT_IMMEDIATE or OT_BITS8;
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@ -1096,16 +1100,16 @@ implementation
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s:=s+',';
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s:=s+',';
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{ type }
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{ type }
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addsize:=false;
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addsize:=false;
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if (ot and OT_XMMREG)=OT_XMMREG then
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if (ot and OT_REG_EXTRA_MASK)=OT_XMMREG then
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s:=s+'xmmreg'
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s:=s+'xmmreg'
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else
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else
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if (ot and OT_YMMREG)=OT_YMMREG then
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if (ot and OT_REG_EXTRA_MASK)=OT_YMMREG then
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s:=s+'ymmreg'
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s:=s+'ymmreg'
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else
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else
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if (ot and OT_MMXREG)=OT_MMXREG then
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if (ot and OT_REG_EXTRA_MASK)=OT_MMXREG then
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s:=s+'mmxreg'
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s:=s+'mmxreg'
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else
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else
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if (ot and OT_FPUREG)=OT_FPUREG then
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if (ot and OT_REG_EXTRA_MASK)=OT_FPUREG then
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s:=s+'fpureg'
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s:=s+'fpureg'
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else
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else
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if (ot and OT_REGISTER)=OT_REGISTER then
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if (ot and OT_REGISTER)=OT_REGISTER then
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@ -1595,12 +1599,12 @@ implementation
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for i:=0 to p^.ops-1 do
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for i:=0 to p^.ops-1 do
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begin
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begin
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insot:=p^.optypes[i];
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insot:=p^.optypes[i];
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if ((insot and OT_XMMRM) = OT_XMMRM) OR
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if ((insot and (OT_XMMRM or OT_REG_EXTRA_MASK)) = OT_XMMRM) OR
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((insot and OT_YMMRM) = OT_YMMRM) then
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((insot and (OT_YMMRM or OT_REG_EXTRA_MASK)) = OT_YMMRM) then
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begin
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begin
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if (insot and OT_SIZE_MASK) = 0 then
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if (insot and OT_SIZE_MASK) = 0 then
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begin
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begin
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case insot and (OT_XMMRM or OT_YMMRM) of
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case insot and (OT_XMMRM or OT_YMMRM or OT_REG_EXTRA_MASK) of
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OT_XMMRM: insot := insot or OT_BITS128;
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OT_XMMRM: insot := insot or OT_BITS128;
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OT_YMMRM: insot := insot or OT_BITS256;
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OT_YMMRM: insot := insot or OT_BITS256;
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end;
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end;
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@ -3066,14 +3070,14 @@ implementation
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end
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end
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else if IF_NEC in insentry^.flags then
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else if IF_NEC in insentry^.flags then
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begin
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begin
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{ the NEC V20/V30 extensions are incompatible with 386+, due to overlapping opcodes }
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{ the NEC V20/V30 extensions are incompatible with 386+, due to overlapping opcodes }
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if objdata.CPUType>=cpu_386 then
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if objdata.CPUType>=cpu_386 then
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Message(asmw_e_instruction_not_supported_by_cpu);
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Message(asmw_e_instruction_not_supported_by_cpu);
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end
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end
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else if IF_SANDYBRIDGE in insentry^.flags then
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else if IF_SANDYBRIDGE in insentry^.flags then
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begin
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begin
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{ todo: handle these properly }
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{ todo: handle these properly }
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end;
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end;
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end;
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end;
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{$endif i8086}
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{$endif i8086}
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@ -3547,7 +3551,8 @@ implementation
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if needed_VEX and
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if needed_VEX and
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(ops=4) and
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(ops=4) and
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(oper[opidx]^.typ=top_reg) and
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(oper[opidx]^.typ=top_reg) and
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(oper[opidx]^.ot and (otf_reg_xmm or otf_reg_ymm)<>0) then
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((oper[opidx]^.ot and OT_REG_EXTRA_MASK)=otf_reg_xmm) or
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((oper[opidx]^.ot and OT_REG_EXTRA_MASK)=otf_reg_ymm) then
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begin
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begin
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bytes[0] := ((getsupreg(oper[opidx]^.reg) and 15) shl 4);
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bytes[0] := ((getsupreg(oper[opidx]^.reg) and 15) shl 4);
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objdata.writebytes(bytes,1);
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objdata.writebytes(bytes,1);
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@ -3725,33 +3730,33 @@ implementation
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fillchar(operation_type_table^,sizeof(toperation_type_table),byte(operand_read));
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fillchar(operation_type_table^,sizeof(toperation_type_table),byte(operand_read));
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for opcode:=low(tasmop) to high(tasmop) do
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for opcode:=low(tasmop) to high(tasmop) do
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with InsProp[opcode] do
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with InsProp[opcode] do
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begin
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begin
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if Ch_Rop1 in Ch then
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if Ch_Rop1 in Ch then
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operation_type_table^[opcode,0]:=operand_read;
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operation_type_table^[opcode,0]:=operand_read;
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if Ch_Wop1 in Ch then
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if Ch_Wop1 in Ch then
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operation_type_table^[opcode,0]:=operand_write;
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operation_type_table^[opcode,0]:=operand_write;
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if [Ch_RWop1,Ch_Mop1]*Ch<>[] then
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if [Ch_RWop1,Ch_Mop1]*Ch<>[] then
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operation_type_table^[opcode,0]:=operand_readwrite;
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operation_type_table^[opcode,0]:=operand_readwrite;
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if Ch_Rop2 in Ch then
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if Ch_Rop2 in Ch then
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operation_type_table^[opcode,1]:=operand_read;
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operation_type_table^[opcode,1]:=operand_read;
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if Ch_Wop2 in Ch then
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if Ch_Wop2 in Ch then
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operation_type_table^[opcode,1]:=operand_write;
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operation_type_table^[opcode,1]:=operand_write;
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if [Ch_RWop2,Ch_Mop2]*Ch<>[] then
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if [Ch_RWop2,Ch_Mop2]*Ch<>[] then
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operation_type_table^[opcode,1]:=operand_readwrite;
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operation_type_table^[opcode,1]:=operand_readwrite;
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if Ch_Rop3 in Ch then
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if Ch_Rop3 in Ch then
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operation_type_table^[opcode,2]:=operand_read;
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operation_type_table^[opcode,2]:=operand_read;
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if Ch_Wop3 in Ch then
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if Ch_Wop3 in Ch then
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operation_type_table^[opcode,2]:=operand_write;
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operation_type_table^[opcode,2]:=operand_write;
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if [Ch_RWop3,Ch_Mop3]*Ch<>[] then
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if [Ch_RWop3,Ch_Mop3]*Ch<>[] then
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operation_type_table^[opcode,2]:=operand_readwrite;
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operation_type_table^[opcode,2]:=operand_readwrite;
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if Ch_Rop4 in Ch then
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if Ch_Rop4 in Ch then
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operation_type_table^[opcode,3]:=operand_read;
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operation_type_table^[opcode,3]:=operand_read;
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if Ch_Wop4 in Ch then
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if Ch_Wop4 in Ch then
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operation_type_table^[opcode,3]:=operand_write;
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operation_type_table^[opcode,3]:=operand_write;
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if [Ch_RWop4,Ch_Mop4]*Ch<>[] then
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if [Ch_RWop4,Ch_Mop4]*Ch<>[] then
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operation_type_table^[opcode,3]:=operand_readwrite;
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operation_type_table^[opcode,3]:=operand_readwrite;
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end;
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end;
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end;
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end;
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function taicpu.spilling_get_operation_type(opnr: longint): topertype;
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function taicpu.spilling_get_operation_type(opnr: longint): topertype;
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@ -4056,7 +4061,7 @@ implementation
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NewRegSize := (insentry^.optypes[j] and OT_SIZE_MASK);
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NewRegSize := (insentry^.optypes[j] and OT_SIZE_MASK);
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if NewRegSize = 0 then
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if NewRegSize = 0 then
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begin
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begin
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case insentry^.optypes[j] and (OT_MMXREG OR OT_XMMREG OR OT_YMMREG) of
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case insentry^.optypes[j] and (OT_MMXREG or OT_XMMREG or OT_YMMREG or OT_REG_EXTRA_MASK) of
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OT_MMXREG: begin
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OT_MMXREG: begin
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NewRegSize := OT_BITS64;
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NewRegSize := OT_BITS64;
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end;
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end;
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@ -4073,7 +4078,7 @@ implementation
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end;
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end;
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actRegSize := actRegSize or NewRegSize;
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actRegSize := actRegSize or NewRegSize;
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actRegTypes := actRegTypes or (insentry^.optypes[j] and (OT_MMXREG OR OT_XMMREG OR OT_YMMREG));
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actRegTypes := actRegTypes or (insentry^.optypes[j] and (OT_MMXREG or OT_XMMREG or OT_YMMREG or OT_REG_EXTRA_MASK));
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end
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end
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else if ((insentry^.optypes[j] and OT_MEMORY) <> 0) then
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else if ((insentry^.optypes[j] and OT_MEMORY) <> 0) then
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begin
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begin
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@ -4168,71 +4173,71 @@ implementation
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begin
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begin
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if (actMemCount=2) and ((AsmOp=A_MOVS) or (AsmOp=A_CMPS)) then
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if (actMemCount=2) and ((AsmOp=A_MOVS) or (AsmOp=A_CMPS)) then
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actMemCount:=1;
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actMemCount:=1;
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case actMemCount of
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case actMemCount of
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0: ; // nothing todo
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0: ; // nothing todo
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1: begin
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1: begin
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MRefInfo := msiUnkown;
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MRefInfo := msiUnkown;
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case actRegMemTypes and (OT_MMXRM OR OT_XMMRM OR OT_YMMRM) of
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case actRegMemTypes and (OT_MMXRM or OT_XMMRM or OT_YMMRM or OT_REG_EXTRA_MASK) of
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OT_MMXRM: actMemSize := actMemSize or OT_BITS64;
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OT_MMXRM: actMemSize := actMemSize or OT_BITS64;
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OT_XMMRM: actMemSize := actMemSize or OT_BITS128;
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OT_XMMRM: actMemSize := actMemSize or OT_BITS128;
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OT_YMMRM: actMemSize := actMemSize or OT_BITS256;
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OT_YMMRM: actMemSize := actMemSize or OT_BITS256;
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end;
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case actMemSize of
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0: MRefInfo := msiNoSize;
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OT_BITS8: MRefInfo := msiMem8;
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OT_BITS16: MRefInfo := msiMem16;
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OT_BITS32: MRefInfo := msiMem32;
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OT_BITS64: MRefInfo := msiMem64;
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OT_BITS128: MRefInfo := msiMem128;
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OT_BITS256: MRefInfo := msiMem256;
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OT_BITS80,
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OT_FAR,
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OT_NEAR,
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OT_SHORT: ; // ignore
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else
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begin
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bitcount := bitcnt(actMemSize);
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if bitcount > 1 then MRefInfo := msiMultiple
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else InternalError(777203);
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end;
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end;
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end;
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case actMemSize of
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if InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize = msiUnkown then
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0: MRefInfo := msiNoSize;
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begin
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OT_BITS8: MRefInfo := msiMem8;
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InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize := MRefInfo;
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OT_BITS16: MRefInfo := msiMem16;
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end
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OT_BITS32: MRefInfo := msiMem32;
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else if InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize <> MRefInfo then
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OT_BITS64: MRefInfo := msiMem64;
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begin
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OT_BITS128: MRefInfo := msiMem128;
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with InsTabMemRefSizeInfoCache^[AsmOp] do
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OT_BITS256: MRefInfo := msiMem256;
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begin
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OT_BITS80,
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if ((MemRefSize = msiMem8) OR (MRefInfo = msiMem8)) then MemRefSize := msiMultiple8
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OT_FAR,
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else if ((MemRefSize = msiMem16) OR (MRefInfo = msiMem16)) then MemRefSize := msiMultiple16
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OT_NEAR,
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else if ((MemRefSize = msiMem32) OR (MRefInfo = msiMem32)) then MemRefSize := msiMultiple32
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OT_SHORT: ; // ignore
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else if ((MemRefSize = msiMem64) OR (MRefInfo = msiMem64)) then MemRefSize := msiMultiple64
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else
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else if ((MemRefSize = msiMem128) OR (MRefInfo = msiMem128)) then MemRefSize := msiMultiple128
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begin
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else if ((MemRefSize = msiMem256) OR (MRefInfo = msiMem256)) then MemRefSize := msiMultiple256
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bitcount := bitcnt(actMemSize);
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else MemRefSize := msiMultiple;
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if bitcount > 1 then MRefInfo := msiMultiple
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else InternalError(777203);
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end;
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end;
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end;
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end;
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if InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize = msiUnkown then
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if actRegCount > 0 then
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begin
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begin
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InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize := MRefInfo;
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case actRegTypes and (OT_MMXREG or OT_XMMREG or OT_YMMREG or OT_REG_EXTRA_MASK) of
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end
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OT_MMXREG: RegMMXSizeMask := RegMMXSizeMask or actMemSize;
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else if InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize <> MRefInfo then
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OT_XMMREG: RegXMMSizeMask := RegXMMSizeMask or actMemSize;
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begin
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OT_YMMREG: RegYMMSizeMask := RegYMMSizeMask or actMemSize;
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with InsTabMemRefSizeInfoCache^[AsmOp] do
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else begin
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begin
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RegMMXSizeMask := not(0);
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if ((MemRefSize = msiMem8) OR (MRefInfo = msiMem8)) then MemRefSize := msiMultiple8
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RegXMMSizeMask := not(0);
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else if ((MemRefSize = msiMem16) OR (MRefInfo = msiMem16)) then MemRefSize := msiMultiple16
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RegYMMSizeMask := not(0);
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else if ((MemRefSize = msiMem32) OR (MRefInfo = msiMem32)) then MemRefSize := msiMultiple32
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end;
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else if ((MemRefSize = msiMem64) OR (MRefInfo = msiMem64)) then MemRefSize := msiMultiple64
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else if ((MemRefSize = msiMem128) OR (MRefInfo = msiMem128)) then MemRefSize := msiMultiple128
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else if ((MemRefSize = msiMem256) OR (MRefInfo = msiMem256)) then MemRefSize := msiMultiple256
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else MemRefSize := msiMultiple;
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end;
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end;
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end;
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if actRegCount > 0 then
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begin
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case actRegTypes and (OT_MMXREG or OT_XMMREG or OT_YMMREG) of
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OT_MMXREG: RegMMXSizeMask := RegMMXSizeMask or actMemSize;
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OT_XMMREG: RegXMMSizeMask := RegXMMSizeMask or actMemSize;
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OT_YMMREG: RegYMMSizeMask := RegYMMSizeMask or actMemSize;
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else begin
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RegMMXSizeMask := not(0);
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RegXMMSizeMask := not(0);
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RegYMMSizeMask := not(0);
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end;
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end;
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end;
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end;
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end;
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else InternalError(777202);
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end;
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end;
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else InternalError(777202);
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end;
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end;
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end;
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inc(insentry);
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inc(insentry);
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