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* SPARC, g_concatcopy and g_concatcopy_unaligned: removed strange (probably long outdated) comments and unnecessary operations.
* g_concatcopy: avoid taking address of references if possible. git-svn-id: trunk@26281 -
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@ -1381,6 +1381,14 @@ implementation
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src, dst: TReference;
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lab: tasmlabel;
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count, count2: aint;
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function reference_is_reusable(const ref: treference): boolean;
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begin
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result:=(ref.base<>NR_NO) and (ref.index=NR_NO) and
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(ref.symbol=nil) and
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(ref.offset>=simm13lo) and (ref.offset+len<=simm13hi);
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end;
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begin
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if len>high(longint) then
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internalerror(2002072704);
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@ -1389,27 +1397,27 @@ implementation
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g_concatcopy_move(list,source,dest,len)
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else
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begin
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reference_reset(src,source.alignment);
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reference_reset(dst,dest.alignment);
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{ load the address of source into src.base }
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src.base:=GetAddressRegister(list);
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a_loadaddr_ref_reg(list,source,src.base);
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{ load the address of dest into dst.base }
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dst.base:=GetAddressRegister(list);
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a_loadaddr_ref_reg(list,dest,dst.base);
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{ generate a loop }
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count:=len div 4;
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if (count<=4) and reference_is_reusable(source) then
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src:=source
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else
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begin
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reference_reset_base(src,getintregister(list,OS_ADDR),0,sizeof(aint));
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a_loadaddr_ref_reg(list,source,src.base);
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end;
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if (count<=4) and reference_is_reusable(dest) then
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dst:=dest
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else
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begin
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reference_reset_base(dst,getintregister(list,OS_ADDR),0,sizeof(aint));
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a_loadaddr_ref_reg(list,dest,dst.base);
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end;
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{ generate a loop }
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if count>4 then
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begin
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{ the offsets are zero after the a_loadaddress_ref_reg and just }
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{ have to be set to 8. I put an Inc there so debugging may be }
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{ easier (should offset be different from zero here, it will be }
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{ easy to notice in the generated assembler }
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countreg:=GetIntRegister(list,OS_INT);
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tmpreg1:=GetIntRegister(list,OS_INT);
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a_load_const_reg(list,OS_INT,count,countreg);
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{ explicitely allocate R_O0 since it can be used safely here }
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{ (for holding date that's being copied) }
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current_asmdata.getjumplabel(lab);
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a_label(list, lab);
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list.concat(taicpu.op_ref_reg(A_LD,src,tmpreg1));
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@ -1418,11 +1426,6 @@ implementation
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list.concat(taicpu.op_reg_const_reg(A_ADD,dst.base,4,dst.base));
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list.concat(taicpu.op_reg_const_reg(A_SUBcc,countreg,1,countreg));
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a_jmp_cond(list,OC_NE,lab);
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list.concat(taicpu.op_none(A_NOP));
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{ keep the registers alive }
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list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
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list.concat(taicpu.op_reg_reg(A_MOV,src.base,src.base));
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list.concat(taicpu.op_reg_reg(A_MOV,dst.base,dst.base));
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len := len mod 4;
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end;
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{ unrolled loop }
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@ -1489,15 +1492,9 @@ implementation
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{ generate a loop }
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if len>4 then
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begin
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{ the offsets are zero after the a_loadaddress_ref_reg and just }
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{ have to be set to 8. I put an Inc there so debugging may be }
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{ easier (should offset be different from zero here, it will be }
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{ easy to notice in the generated assembler }
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countreg:=GetIntRegister(list,OS_INT);
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tmpreg1:=GetIntRegister(list,OS_INT);
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a_load_const_reg(list,OS_INT,len,countreg);
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{ explicitely allocate R_O0 since it can be used safely here }
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{ (for holding date that's being copied) }
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current_asmdata.getjumplabel(lab);
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a_label(list, lab);
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list.concat(taicpu.op_ref_reg(A_LDUB,src,tmpreg1));
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@ -1506,11 +1503,6 @@ implementation
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list.concat(taicpu.op_reg_const_reg(A_ADD,dst.base,1,dst.base));
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list.concat(taicpu.op_reg_const_reg(A_SUBcc,countreg,1,countreg));
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a_jmp_cond(list,OC_NE,lab);
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list.concat(taicpu.op_none(A_NOP));
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{ keep the registers alive }
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list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
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list.concat(taicpu.op_reg_reg(A_MOV,src.base,src.base));
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list.concat(taicpu.op_reg_reg(A_MOV,dst.base,dst.base));
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end
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else
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begin
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