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* add restrictions for loaded/stored registers in case of references
with write-back git-svn-id: trunk@29958 -
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@ -103,7 +103,7 @@ implementation
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procedure trgintcpu.add_cpu_interferences(p: tai);
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procedure trgintcpu.add_cpu_interferences(p: tai);
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var
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var
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i: longint;
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i, j: longint;
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begin
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begin
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if p.typ=ait_instruction then
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if p.typ=ait_instruction then
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begin
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begin
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@ -153,6 +153,15 @@ implementation
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{ sp can always be base, never be index }
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{ sp can always be base, never be index }
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if taicpu(p).oper[i]^.ref^.index<>NR_NO then
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if taicpu(p).oper[i]^.ref^.index<>NR_NO then
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add_edge(getsupreg(taicpu(p).oper[i]^.ref^.index),RS_SP);
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add_edge(getsupreg(taicpu(p).oper[i]^.ref^.index),RS_SP);
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{ in case of write back, the base register must be
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different from the loaded/stored register }
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if (taicpu(p).oper[i]^.ref^.addressmode in [AM_PREINDEXED,AM_POSTINDEXED]) and
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(taicpu(p).oper[i]^.ref^.base<>NR_NO) then
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begin
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for j:=pred(i) downto 0 do
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if taicpu(p).oper[j]^.typ=TOP_REG then
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add_edge(getsupreg(taicpu(p).oper[j]^.reg),getsupreg(taicpu(p).oper[i]^.ref^.base));
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end;
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end;
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end;
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end;
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end;
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end;
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end;
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