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* factored out spilling code that deals with operand types into virtual
methods so they can be overridden by platform-specific variants
for platform-specific operand types
git-svn-id: trunk@30425 -
This commit is contained in:
Jonas Maebe
parent
ee7198aa57
commit
e750678f37
@ -192,6 +192,10 @@ unit rgobj;
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procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister);virtual;
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procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister);virtual;
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function addreginfo(var regs: tspillregsinfo; const r: tsuperregisterset; reg: tregister; operation: topertype): boolean;
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function instr_get_oper_spilling_info(var regs: tspillregsinfo; const r: tsuperregisterset; instr: tai_cpu_abstract_sym; opidx: longint): boolean; virtual;
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procedure substitute_spilled_registers(const regs: tspillregsinfo; instr: tai_cpu_abstract_sym; opidx: longint);
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procedure try_replace_reg(const regs: tspillregsinfo; var reg: tregister; useloadreg: boolean); virtual;
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function instr_spill_register(list:TAsmList;
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instr:tai_cpu_abstract_sym;
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const r:Tsuperregisterset;
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@ -2067,6 +2071,148 @@ unit rgobj;
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end;
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function trgobj.addreginfo(var regs: tspillregsinfo; const r: tsuperregisterset; reg: tregister; operation: topertype): boolean;
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var
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i, tmpindex: longint;
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supreg: tsuperregister;
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begin
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result:=false;
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tmpindex := regs.reginfocount;
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supreg := get_alias(getsupreg(reg));
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{ did we already encounter this register? }
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for i := 0 to pred(regs.reginfocount) do
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if (regs.reginfo[i].orgreg = supreg) then
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begin
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tmpindex := i;
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break;
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end;
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if tmpindex > high(regs.reginfo) then
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internalerror(2003120301);
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regs.reginfo[tmpindex].orgreg := supreg;
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include(regs.reginfo[tmpindex].spillregconstraints,get_spill_subreg(reg));
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if supregset_in(r,supreg) then
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begin
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{ add/update info on this register }
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regs.reginfo[tmpindex].mustbespilled := true;
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case operation of
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operand_read:
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regs.reginfo[tmpindex].regread := true;
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operand_write:
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regs.reginfo[tmpindex].regwritten := true;
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operand_readwrite:
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begin
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regs.reginfo[tmpindex].regread := true;
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regs.reginfo[tmpindex].regwritten := true;
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end;
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end;
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result:=true;
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end;
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inc(regs.reginfocount,ord(regs.reginfocount=tmpindex));
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end;
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function trgobj.instr_get_oper_spilling_info(var regs: tspillregsinfo; const r: tsuperregisterset; instr: tai_cpu_abstract_sym; opidx: longint): boolean;
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begin
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result:=false;
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with instr.oper[opidx]^ do
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begin
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case typ of
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top_reg:
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begin
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if (getregtype(reg) = regtype) then
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result:=addreginfo(regs,r,reg,instr.spilling_get_operation_type(opidx));
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end;
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top_ref:
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begin
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if regtype in [R_INTREGISTER,R_ADDRESSREGISTER] then
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with ref^ do
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begin
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if (base <> NR_NO) and
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(getregtype(base)=regtype) then
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result:=addreginfo(regs,r,base,instr.spilling_get_operation_type_ref(opidx,base));
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if (index <> NR_NO) and
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(getregtype(index)=regtype) then
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result:=addreginfo(regs,r,index,instr.spilling_get_operation_type_ref(opidx,index)) or result;
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{$if defined(x86)}
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if (segment <> NR_NO) and
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(getregtype(segment)=regtype) then
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result:=addreginfo(regs,r,segment,instr.spilling_get_operation_type_ref(opidx,segment)) or result;
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{$endif defined(x86)}
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end;
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end;
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{$ifdef ARM}
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top_shifterop:
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begin
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if regtype in [R_INTREGISTER,R_ADDRESSREGISTER] then
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if shifterop^.rs<>NR_NO then
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result:=addreginfo(regs,r,shifterop^.rs,operand_read);
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end;
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{$endif ARM}
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end;
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end;
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end;
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procedure trgobj.try_replace_reg(const regs: tspillregsinfo; var reg: tregister; useloadreg: boolean);
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var
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i: longint;
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supreg: tsuperregister;
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begin
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supreg:=get_alias(getsupreg(reg));
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for i:=0 to pred(regs.reginfocount) do
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if (regs.reginfo[i].mustbespilled) and
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(regs.reginfo[i].orgreg=supreg) then
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begin
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{ Only replace supreg }
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if useloadreg then
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setsupreg(reg, getsupreg(regs.reginfo[i].loadreg))
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else
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setsupreg(reg, getsupreg(regs.reginfo[i].storereg));
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break;
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end;
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end;
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procedure trgobj.substitute_spilled_registers(const regs: tspillregsinfo; instr: tai_cpu_abstract_sym; opidx: longint);
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begin
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with instr.oper[opidx]^ do
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case typ of
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top_reg:
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begin
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if (getregtype(reg) = regtype) then
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try_replace_reg(regs, reg, not ssa_safe or
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(instr.spilling_get_operation_type(opidx)=operand_read));
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end;
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top_ref:
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begin
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if regtype in [R_INTREGISTER, R_ADDRESSREGISTER] then
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begin
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if (ref^.base <> NR_NO) and
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(getregtype(ref^.base)=regtype) then
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try_replace_reg(regs, ref^.base,
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not ssa_safe or (instr.spilling_get_operation_type_ref(opidx, ref^.base)=operand_read));
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if (ref^.index <> NR_NO) and
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(getregtype(ref^.index)=regtype) then
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try_replace_reg(regs, ref^.index,
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not ssa_safe or (instr.spilling_get_operation_type_ref(opidx, ref^.index)=operand_read));
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{$if defined(x86)}
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if (ref^.segment <> NR_NO) and
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(getregtype(ref^.segment)=regtype) then
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try_replace_reg(regs, ref^.segment, true { always read-only });
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{$endif defined(x86)}
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end;
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end;
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{$ifdef ARM}
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top_shifterop:
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begin
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if regtype in [R_INTREGISTER, R_ADDRESSREGISTER] then
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try_replace_reg(regs, shifterop^.rs, true { always read-only });
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end;
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{$endif ARM}
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end;
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end;
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function trgobj.instr_spill_register(list:TAsmList;
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instr:tai_cpu_abstract_sym;
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const r:Tsuperregisterset;
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@ -2075,66 +2221,6 @@ unit rgobj;
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counter: longint;
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regs: tspillregsinfo;
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spilled: boolean;
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procedure addreginfo(reg: tregister; operation: topertype);
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var
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i, tmpindex: longint;
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supreg: tsuperregister;
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begin
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tmpindex := regs.reginfocount;
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supreg := get_alias(getsupreg(reg));
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{ did we already encounter this register? }
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for i := 0 to pred(regs.reginfocount) do
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if (regs.reginfo[i].orgreg = supreg) then
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begin
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tmpindex := i;
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break;
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end;
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if tmpindex > high(regs.reginfo) then
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internalerror(2003120301);
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regs.reginfo[tmpindex].orgreg := supreg;
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include(regs.reginfo[tmpindex].spillregconstraints,get_spill_subreg(reg));
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if supregset_in(r,supreg) then
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begin
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{ add/update info on this register }
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regs.reginfo[tmpindex].mustbespilled := true;
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case operation of
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operand_read:
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regs.reginfo[tmpindex].regread := true;
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operand_write:
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regs.reginfo[tmpindex].regwritten := true;
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operand_readwrite:
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begin
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regs.reginfo[tmpindex].regread := true;
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regs.reginfo[tmpindex].regwritten := true;
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end;
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end;
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spilled := true;
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end;
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inc(regs.reginfocount,ord(regs.reginfocount=tmpindex));
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end;
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procedure tryreplacereg(var reg: tregister; useloadreg: boolean);
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var
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i: longint;
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supreg: tsuperregister;
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begin
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supreg:=get_alias(getsupreg(reg));
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for i:=0 to pred(regs.reginfocount) do
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if (regs.reginfo[i].mustbespilled) and
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(regs.reginfo[i].orgreg=supreg) then
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begin
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{ Only replace supreg }
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if useloadreg then
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setsupreg(reg,getsupreg(regs.reginfo[i].loadreg))
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else
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setsupreg(reg,getsupreg(regs.reginfo[i].storereg));
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break;
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end;
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end;
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var
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loadpos,
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storepos : tai;
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@ -2153,42 +2239,7 @@ unit rgobj;
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{ check whether and if so which and how (read/written) this instructions contains
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registers that must be spilled }
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for counter := 0 to instr.ops-1 do
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with instr.oper[counter]^ do
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begin
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case typ of
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top_reg:
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begin
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if (getregtype(reg) = regtype) then
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addreginfo(reg,instr.spilling_get_operation_type(counter));
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end;
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top_ref:
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begin
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if regtype in [R_INTREGISTER,R_ADDRESSREGISTER] then
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with ref^ do
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begin
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if (base <> NR_NO) and
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(getregtype(base)=regtype) then
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addreginfo(base,instr.spilling_get_operation_type_ref(counter,base));
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if (index <> NR_NO) and
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(getregtype(index)=regtype) then
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addreginfo(index,instr.spilling_get_operation_type_ref(counter,index));
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{$if defined(x86)}
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if (segment <> NR_NO) and
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(getregtype(segment)=regtype) then
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addreginfo(segment,instr.spilling_get_operation_type_ref(counter,segment));
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{$endif defined(x86)}
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end;
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end;
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{$ifdef ARM}
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top_shifterop:
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begin
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if regtype in [R_INTREGISTER,R_ADDRESSREGISTER] then
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if shifterop^.rs<>NR_NO then
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addreginfo(shifterop^.rs,operand_read);
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end;
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{$endif ARM}
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end;
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end;
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spilled:=instr_get_oper_spilling_info(regs,r,instr,counter) or spilled;
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{ if no spilling for this instruction we can leave }
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if not spilled then
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@ -2352,45 +2403,11 @@ unit rgobj;
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{ substitute registers }
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for counter:=0 to instr.ops-1 do
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with instr.oper[counter]^ do
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case typ of
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top_reg:
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begin
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if (getregtype(reg) = regtype) then
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tryreplacereg(reg,not ssa_safe or
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(instr.spilling_get_operation_type(counter)=operand_read));
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end;
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top_ref:
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begin
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if regtype in [R_INTREGISTER,R_ADDRESSREGISTER] then
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begin
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if (ref^.base <> NR_NO) and
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(getregtype(ref^.base)=regtype) then
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tryreplacereg(ref^.base,
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not ssa_safe or (instr.spilling_get_operation_type_ref(counter,ref^.base)=operand_read));
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if (ref^.index <> NR_NO) and
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(getregtype(ref^.index)=regtype) then
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tryreplacereg(ref^.index,
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not ssa_safe or (instr.spilling_get_operation_type_ref(counter,ref^.index)=operand_read));
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{$if defined(x86)}
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if (ref^.segment <> NR_NO) and
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(getregtype(ref^.segment)=regtype) then
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tryreplacereg(ref^.segment,true { always read-only });
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{$endif defined(x86)}
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end;
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end;
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{$ifdef ARM}
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top_shifterop:
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begin
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if regtype in [R_INTREGISTER,R_ADDRESSREGISTER] then
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tryreplacereg(shifterop^.rs,true { always read-only });
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end;
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{$endif ARM}
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end;
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{We have modified the instruction; perhaps the new instruction has
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substitute_spilled_registers(regs,instr,counter);
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{ We have modified the instruction; perhaps the new instruction has
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certain constraints regarding which imaginary registers interfere
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with certain physical registers.}
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add_cpu_interferences(instr);
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with certain physical registers. }
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add_cpu_interferences(instr);
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end;
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end.
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