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* x86: New peephole optimisation for improving newly inserted (V)MOVD/(V)MOVQ instructions
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
67ea121250
commit
e7b6a08eae
@ -185,8 +185,11 @@ unit aoptcpu;
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Result:=OptPass1LEA(p);
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A_MOV:
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Result:=OptPass1MOV(p);
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A_MOVD,
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A_VMOVD:
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Result:=OptPass1MOVD(p);
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A_MOVSX,
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A_MOVZX :
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A_MOVZX:
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Result:=OptPass1Movx(p);
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A_TEST:
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Result:=OptPass1Test(p);
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@ -177,6 +177,7 @@ unit aoptx86;
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function OptPass1_V_MOVAP(var p : tai) : boolean;
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function OptPass1VOP(var p : tai) : boolean;
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function OptPass1MOV(var p : tai) : boolean;
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function OptPass1MOVD(var p : tai) : boolean;
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function OptPass1Movx(var p : tai) : boolean;
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function OptPass1MOVXX(var p : tai) : boolean;
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function OptPass1OP(var p : tai) : boolean;
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@ -4480,6 +4481,38 @@ unit aoptx86;
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if not GetNextInstruction_p or (hp1.typ <> ait_instruction) then
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Exit;
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{ Change:
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movl/q (ref), %reg
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movd/q %reg, %xmm0
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(dealloc %reg)
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To:
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movd/q (ref), %xmm0
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}
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if MatchOpType(taicpu(p),top_ref,top_reg) and
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MatchInstruction(hp1,[A_MOVD,A_VMOVD{$ifdef x86_64},A_MOVQ,A_VMOVQ{$endif x86_64}],[]) and
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MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[1]^.typ=top_reg) and
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(GetRegType(taicpu(hp1).oper[1]^.reg)=R_MMREGISTER) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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if not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp1,TmpUsedRegs) then
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begin
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taicpu(hp1).loadref(0,taicpu(p).oper[0]^.ref^);
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{ loadref increases the reference count, so decrement it again }
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if Assigned(taicpu(p).oper[0]^.ref^.symbol) then
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taicpu(p).oper[0]^.ref^.symbol.decrefs;
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if Assigned(taicpu(p).oper[0]^.ref^.relsymbol) then
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taicpu(p).oper[0]^.ref^.relsymbol.decrefs;
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DebugMsg(SPeepholeOptimization+'Merged MOV and (V)MOVD/(V)MOVQ to eliminate intermediate register (MovMovD/Q2MovD/Q)',p);
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RemoveCurrentP(p,hp1);
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Result:=True;
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Exit;
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end;
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end;
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{ Next instruction is also a MOV ? }
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if MatchInstruction(hp1,A_MOV,[taicpu(p).opsize]) then
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begin
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@ -5568,6 +5601,87 @@ unit aoptx86;
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end;
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function TX86AsmOptimizer.OptPass1MOVD(var p : tai) : boolean;
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{ This function also handles the 64-bit version, MOVQ }
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var
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hp1: tai;
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begin
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Result:=false;
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{ Change:
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movd/q %xmm0, %reg
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...
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movl/q %reg, (ref)
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(dealloc %reg)
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To:
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movd/q %xmm0, (ref)
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}
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if MatchOpType(taicpu(p),top_reg,top_reg) and
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(GetRegType(taicpu(p).oper[0]^.reg)=R_MMREGISTER) and
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(GetRegType(taicpu(p).oper[1]^.reg)=R_INTREGISTER) and
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GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[1]^.reg) and
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MatchInstruction(hp1, A_MOV, []) and
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MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[1]^.typ=top_ref) and
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not RegInRef(taicpu(p).oper[1]^.reg,taicpu(hp1).oper[1]^.ref^) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegsBetween(TmpUsedRegs,p,hp1);
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if not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp1,TmpUsedRegs) then
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begin
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if (
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{ Instructions are always adjacent under -O2 and under }
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not(cs_opt_level3 in current_settings.optimizerswitches) or
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(
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(
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(taicpu(hp1).oper[1]^.ref^.base=NR_NO) or
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not RegModifiedBetween(taicpu(hp1).oper[1]^.ref^.base,p,hp1)
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) and
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(
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(taicpu(hp1).oper[1]^.ref^.index=NR_NO) or
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not RegModifiedBetween(taicpu(hp1).oper[1]^.ref^.index,p,hp1)
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)
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)
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) then
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begin
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DebugMsg(SPeepholeOptimization+'Merged (V)MOVD/(V)MOVQ and MOV to eliminate intermediate register (MovD/QMov2MovD/Q 1a)',p);
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taicpu(p).loadref(1,taicpu(hp1).oper[1]^.ref^);
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{ loadref increases the reference count, so decrement it again }
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if Assigned(taicpu(hp1).oper[1]^.ref^.symbol) then
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taicpu(hp1).oper[1]^.ref^.symbol.decrefs;
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if Assigned(taicpu(hp1).oper[1]^.ref^.relsymbol) then
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taicpu(hp1).oper[1]^.ref^.relsymbol.decrefs;
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RemoveInstruction(hp1);
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Include(OptsToCheck, aoc_ForceNewIteration);
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end
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else if not RegModifiedBetween(taicpu(p).oper[0]^.reg,p,hp1) then
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begin
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{ Still possible to optimise if hp1 is converted instead }
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DebugMsg(SPeepholeOptimization+'Merged (V)MOVD/(V)MOVQ and MOV to eliminate intermediate register (MovD/QMov2MovD/Q 1b)',hp1);
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{ Decrement the reference prior to replacing it }
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if Assigned(taicpu(hp1).oper[1]^.ref^.symbol) then
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taicpu(hp1).oper[1]^.ref^.symbol.decrefs;
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if Assigned(taicpu(hp1).oper[1]^.ref^.relsymbol) then
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taicpu(hp1).oper[1]^.ref^.relsymbol.decrefs;
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taicpu(hp1).opcode:=taicpu(p).opcode;
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taicpu(hp1).opsize:=taicpu(p).opsize;
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taicpu(hp1).loadreg(0,taicpu(p).oper[0]^.reg);
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TransferUsedRegs(TmpUsedRegs);
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AllocRegBetween(taicpu(p).oper[0]^.reg,p,hp1,TmpUsedRegs);
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RemoveCurrentP(p);
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Result:=True;
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Exit;
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end;
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end;
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end;
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end;
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function TX86AsmOptimizer.OptPass1MOVXX(var p : tai) : boolean;
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var
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hp1 : tai;
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@ -100,6 +100,11 @@ uses
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Result:=OptPass1Imul(p);
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A_MOV:
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Result:=OptPass1MOV(p);
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A_MOVD,
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A_MOVQ,
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A_VMOVD,
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A_VMOVQ:
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Result:=OptPass1MOVD(p);
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A_MOVSX,
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A_MOVSXD,
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A_MOVZX:
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