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* always use the read window to read from video memory (patch by

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Nikolay Nikolov, mantis #16926)

git-svn-id: trunk@15597 -
This commit is contained in:
Jonas Maebe 2010-07-18 09:48:56 +00:00
parent 5b0962b735
commit e881e4aa22
1 changed files with 4 additions and 2 deletions
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6
packages/graph/src/go32v2/vesa.inc
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@ -1495,6 +1495,7 @@ end;
Y := Y + YOffset; { adjust pixel for correct virtual page } Y := Y + YOffset; { adjust pixel for correct virtual page }
{ } { }
offs := longint(y) * BytesPerLine + (x div 8); offs := longint(y) * BytesPerLine + (x div 8);
SetReadBank(smallint(offs shr 16));
SetWriteBank(smallint(offs shr 16)); SetWriteBank(smallint(offs shr 16));
PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes } PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes }
@ -1503,7 +1504,7 @@ end;
Port[$3ce] := 8; { Index 08 : Bitmask register. } Port[$3ce] := 8; { Index 08 : Bitmask register. }
Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify } Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify }
dummy := Mem[WinWriteSeg: word(offs)]; { Latch the data into host space. } dummy := Mem[WinReadSeg: word(offs)]; { Latch the data into host space. }
Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory } Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory }
PortW[$3ce] := $ff08; { Enable all bit planes. } PortW[$3ce] := $ff08; { Enable all bit planes. }
PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. } PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. }
@ -1568,6 +1569,7 @@ end;
end; end;
Y := Y + YOffset; Y := Y + YOffset;
offs := longint(y) * BytesPerLine + (x div 8); offs := longint(y) * BytesPerLine + (x div 8);
SetReadBank(smallint(offs shr 16));
SetWriteBank(smallint(offs shr 16)); SetWriteBank(smallint(offs shr 16));
PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes } PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes }
PortW[$3ce] := color shl 8; { Index 00 : Enable correct plane and write color } PortW[$3ce] := color shl 8; { Index 00 : Enable correct plane and write color }
@ -1575,7 +1577,7 @@ end;
Port[$3ce] := 8; { Index 08 : Bitmask register. } Port[$3ce] := 8; { Index 08 : Bitmask register. }
Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify } Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify }
dummy := Mem[WinWriteSeg: word(offs)]; { Latch the data into host space. } dummy := Mem[WinReadSeg: word(offs)]; { Latch the data into host space. }
Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory } Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory }
PortW[$3ce] := $ff08; { Enable all bit planes. } PortW[$3ce] := $ff08; { Enable all bit planes. }
PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. } PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. }