From e8a48be3bcc50859231ef4550e43f9f677164155 Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Fri, 1 Nov 2019 18:39:15 +0000
Subject: [PATCH]   * avr: more precise execution weigth for shift loops

git-svn-id: trunk@43349 -
---
 compiler/avr/cgcpu.pas | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/compiler/avr/cgcpu.pas b/compiler/avr/cgcpu.pas
index c67625d62c..5074d4f2b6 100644
--- a/compiler/avr/cgcpu.pas
+++ b/compiler/avr/cgcpu.pas
@@ -452,6 +452,7 @@ unit cgcpu;
          b, b2, i, j: byte;
          s1, s2, t1: integer;
          l1: TAsmLabel;
+         oldexecutionweight: LongInt;
        begin
          if (op in [OP_MUL,OP_IMUL]) and (size in [OS_16,OS_S16]) and (a in [2,4,8]) then
            begin
@@ -511,6 +512,8 @@ unit cgcpu;
                      countreg:=getintregister(list,OS_8);
                      a_load_const_reg(list,OS_8,b2,countreg);
                      cg.a_label(list,l1);
+                     oldexecutionweight:=executionweight;
+                     executionweight:=executionweight*b2;
                      if op=OP_SHL then
                        list.concat(taicpu.op_reg(A_LSL,GetOffsetReg64(dst,dsthi,b)))
                      else
@@ -526,6 +529,7 @@ unit cgcpu;
                        end;
                      list.concat(taicpu.op_reg(A_DEC,countreg));
                      a_jmp_flags(list,F_NE,l1);
+                     executionweight:=oldexecutionweight;
                      { keep registers alive }
                      a_reg_sync(list,countreg);
                    end